Lines Matching defs:imm
787 uint64_t imm);
845 void Mov(const Register& rd, uint64_t imm);
849 void Mvn(const Register& rd, uint64_t imm) {
850 Mov(rd, (rd.GetSizeInBits() == kXRegSize) ? ~imm : (~imm & kWRegMask));
857 bool TryOneInstrMoveImmediate(const Register& dst, uint64_t imm);
861 // into dst is not necessarily equal to imm; it may have had a shifting
865 uint64_t imm,
1683 void Fmov(VRegister vd, double imm);
1684 void Fmov(VRegister vd, float imm);
1685 void Fmov(VRegister vd, const Float16 imm);
1688 void Fmov(VRegister vd, T imm) {
1690 Fmov(vd, static_cast<double>(imm));
1993 void Ldr(const VRegister& vt, double imm) {
1999 literal = new Literal<double>(imm,
2003 literal = new Literal<float>(static_cast<float>(imm),
2009 literal = allocator_.New<Literal<double>>(imm,
2013 literal = allocator_.New<Literal<float>>(static_cast<float>(imm),
2020 void Ldr(const VRegister& vt, float imm) {
2026 literal = new Literal<float>(imm,
2030 literal = new Literal<double>(static_cast<double>(imm),
2036 literal = allocator_.New<Literal<float>>(imm,
2040 literal = allocator_.New<Literal<double>>(static_cast<double>(imm),
2065 void Ldr(const Register& rt, uint64_t imm) {
2072 literal = new Literal<uint64_t>(imm,
2077 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm));
2078 literal = new Literal<uint32_t>(static_cast<uint32_t>(imm),
2084 literal = allocator_.New<Literal<uint64_t>>(imm,
2089 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm));
2090 literal = allocator_.New<Literal<uint32_t>>(static_cast<uint32_t>(imm),
2097 void Ldrsw(const Register& rt, uint32_t imm) {
2103 new Literal<uint32_t>(imm,
2108 allocator_.New<Literal<uint32_t>>(imm,
2223 void Movk(const Register& rd, uint64_t imm, int shift = -1) {
2227 movk(rd, imm, shift);
3096 void MASM(const VRegister& vd, const VRegister& vn, double imm) { \
3099 ASM(vd, vn, imm); \
3266 void Cmeq(const VRegister& vd, const VRegister& vn, int imm) {
3269 cmeq(vd, vn, imm);
3271 void Cmge(const VRegister& vd, const VRegister& vn, int imm) {
3274 cmge(vd, vn, imm);
3276 void Cmgt(const VRegister& vd, const VRegister& vn, int imm) {
3279 cmgt(vd, vn, imm);
3281 void Cmle(const VRegister& vd, const VRegister& vn, int imm) {
3284 cmle(vd, vn, imm);
3286 void Cmlt(const VRegister& vd, const VRegister& vn, int imm) {
3289 cmlt(vd, vn, imm);
3479 uint64_t imm,
3659 void Add(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
3661 AddSubHelper(kAddImmediate, zd, zn, imm);
3679 void And(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
3682 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
3683 and_(zd, zn, imm);
3756 void Bic(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
3759 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
3760 bic(zd, zn, imm);
3917 IntegerOperand imm) {
3920 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
3924 CompareHelper(eq, pd, pg, zn, imm);
3938 IntegerOperand imm) {
3941 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
3945 CompareHelper(ge, pd, pg, zn, imm);
3959 IntegerOperand imm) {
3962 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
3966 CompareHelper(gt, pd, pg, zn, imm);
3980 IntegerOperand imm) {
3982 if (imm.IsUintN(7)) {
3984 cmphi(pd, pg, zn, static_cast<unsigned>(imm.AsUintN(7)));
3986 CompareHelper(hi, pd, pg, zn, imm);
4000 IntegerOperand imm) {
4001 if (imm.IsUintN(7)) {
4003 cmphs(pd, pg, zn, static_cast<unsigned>(imm.AsUintN(7)));
4005 CompareHelper(hs, pd, pg, zn, imm);
4019 IntegerOperand imm) {
4022 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
4026 CompareHelper(le, pd, pg, zn, imm);
4040 IntegerOperand imm) {
4041 if (imm.IsUintN(7)) {
4043 cmplo(pd, pg, zn, static_cast<unsigned>(imm.AsUintN(7)));
4045 CompareHelper(lo, pd, pg, zn, imm);
4059 IntegerOperand imm) {
4060 if (imm.IsUintN(7)) {
4062 cmpls(pd, pg, zn, static_cast<unsigned>(imm.AsUintN(7)));
4064 CompareHelper(ls, pd, pg, zn, imm);
4078 IntegerOperand imm) {
4081 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
4085 CompareHelper(lt, pd, pg, zn, imm);
4099 IntegerOperand imm) {
4102 if (imm.TryEncodeAsIntNForLane<5>(zn, &imm5)) {
4106 CompareHelper(ne, pd, pg, zn, imm);
4154 void Cpy(const ZRegister& zd, const PRegister& pg, IntegerOperand imm);
4233 void Dup(const ZRegister& zd, IntegerOperand imm);
4234 void Eon(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
4237 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
4238 eon(zd, zn, imm);
4252 void Eor(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
4255 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
4256 eor(zd, zn, imm);
4334 double imm) {
4337 fadd(zd, pg, zd, imm);
4516 void Fcpy(const ZRegister& zd, const PRegisterM& pg, double imm);
4517 void Fcpy(const ZRegister& zd, const PRegisterM& pg, float imm);
4518 void Fcpy(const ZRegister& zd, const PRegisterM& pg, Float16 imm);
4549 void Fdup(const ZRegister& zd, double imm);
4550 void Fdup(const ZRegister& zd, float imm);
4551 void Fdup(const ZRegister& zd, Float16 imm);
4568 double imm) {
4571 fmax(zd, pg, zd, imm);
4582 double imm) {
4585 fmaxnm(zd, pg, zd, imm);
4605 double imm) {
4608 fmin(zd, pg, zd, imm);
4619 double imm) {
4622 fminnm(zd, pg, zd, imm);
4665 void Fmov(const ZRegister& zd, double imm) {
4667 Fdup(zd, imm);
4669 void Fmov(const ZRegister& zd, float imm) {
4671 Fdup(zd, imm);
4673 void Fmov(const ZRegister& zd, Float16 imm) {
4675 Fdup(zd, imm);
4677 void Fmov(const ZRegister& zd, const PRegisterM& pg, double imm) {
4679 Fcpy(zd, pg, imm);
4681 void Fmov(const ZRegister& zd, const PRegisterM& pg, float imm) {
4683 Fcpy(zd, pg, imm);
4685 void Fmov(const ZRegister& zd, const PRegisterM& pg, Float16 imm) {
4687 Fcpy(zd, pg, imm);
4700 double imm) {
4703 fmul(zd, pg, zd, imm);
4864 double imm) {
4867 fsub(zd, pg, zd, imm);
4871 double imm,
4875 fsubr(zd, pg, zd, imm);
4959 void Insr(const ZRegister& zdn, IntegerOperand imm);
5486 void Mov(const ZRegister& zd, const PRegister& pg, IntegerOperand imm) {
5488 Cpy(zd, pg, imm);
5506 void Mov(const ZRegister& zd, IntegerOperand imm) {
5508 Dup(zd, imm);
5534 void Mul(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm);
5606 void Orn(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
5609 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
5610 orn(zd, zn, imm);
5632 void Orr(const ZRegister& zd, const ZRegister& zn, uint64_t imm) {
5635 if (IsImmLogical(imm, zd.GetLaneSizeInBits())) {
5636 orr(zd, zn, imm);
5839 void Smax(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm);
5845 void Smin(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm);
5860 void Sqadd(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
5862 VIXL_ASSERT(imm.IsUint8() ||
5863 (imm.IsUint16() && ((imm.AsUint16() & 0xff) == 0)));
5865 sqadd(zd, zd, imm.AsUint16());
6050 void Sqsub(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
6052 VIXL_ASSERT(imm.IsUint8() ||
6053 (imm.IsUint16() && ((imm.AsUint16() & 0xff) == 0)));
6055 sqsub(zd, zd, imm.AsUint16());
6202 void Sub(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
6204 AddSubHelper(kSubImmediate, zd, zn, imm);
6206 void Sub(const ZRegister& zd, IntegerOperand imm, const ZRegister& zm);
6284 void Umax(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm);
6290 void Umin(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm);
6301 void Uqadd(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
6303 VIXL_ASSERT(imm.IsUint8() ||
6304 (imm.IsUint16() && ((imm.AsUint16() & 0xff) == 0)));
6306 uqadd(zd, zd, imm.AsUint16());
6441 void Uqsub(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) {
6443 VIXL_ASSERT(imm.IsUint8() ||
6444 (imm.IsUint16() && ((imm.AsUint16() & 0xff) == 0)));
6446 uqsub(zd, zd, imm.AsUint16());
8289 void Movi16bitHelper(const VRegister& vd, uint64_t imm);
8290 void Movi32bitHelper(const VRegister& vd, uint64_t imm);
8291 void Movi64bitHelper(const VRegister& vd, uint64_t imm);
8326 IntegerOperand imm);
8386 IntegerOperand imm);
8390 int imm,
8404 int imm);
8409 int imm);
8420 IntegerOperand imm,
8428 IntegerOperand imm);
8430 // Try to emit an add- or sub-like instruction (imm_fn) with `imm`, or the
8431 // corresponding sub- or add-like instruction (n_imm_fn) with a negated `imm`.
8440 IntegerOperand imm);
8514 int imm);
8520 int imm);