Lines Matching defs:right
1295 Operand right,
1305 VIXL_ASSERT(right.IsImmediate() || !right.GetRegister().IsSP());
1313 // * up to 4 instructions to materialise the right constant
1323 bool right_is_immediate = right.IsImmediate() || right.IsZero();
1328 right.GetEquivalentImmediate(),
1340 right_is_immediate && ((-1 <= right.GetEquivalentImmediate()) &&
1341 (right.GetEquivalentImmediate() <= 1));
1345 std::swap(left, right);
1353 right,
1370 if (!right.IsPlainRegister()) {
1373 masm->Mov(temp, right);
1374 right = temp;
1379 VIXL_ASSERT(left.IsPlainRegister() && right.IsPlainRegister());
1380 if (left.GetRegister().Is(right.GetRegister())) {
1383 masm->csel(rd, left.GetRegister(), right.GetRegister(), cond);
1392 int64_t right,
1400 if (left == right) {
1403 } else if (left == -right) {
1406 masm->Mov(rd, right);
1412 if (CselSubHelperTwoOrderedImmediates(masm, rd, left, right, cond)) {
1415 std::swap(left, right);
1419 right,
1434 int64_t right,
1438 if ((left == 1) && (right == 0)) {
1441 } else if ((left == -1) && (right == 0)) {
1454 const Operand& right,
1458 VIXL_ASSERT((right.IsImmediate() || right.IsZero()) &&
1459 (-1 <= right.GetEquivalentImmediate()) &&
1460 (right.GetEquivalentImmediate() <= 1));
1473 int64_t imm = right.GetEquivalentImmediate();
1918 // only pre-shift the immediate right by values supported in the add/sub
2688 // it simple: Move each input that isn't already in the right place to a
2706 // If the argument is already in the right place, leave it where it is.