Lines Matching defs:reg4
3105 const Register& reg4) {
3108 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
3119 const VRegister& reg4) {
3121 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
3129 const CPURegister& reg4) {
3134 const CPURegister regs[] = {reg1, reg2, reg3, reg4};
3169 const Register& reg4) {
3171 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
3179 const VRegister& reg4) {
3181 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
3189 const CPURegister& reg4) {
3194 const CPURegister regs[] = {reg1, reg2, reg3, reg4};