Lines Matching refs:uzp1
640 uzp1(vform, temp1, src1, src2);
2729 uzp1(vform, src1_r, src1, zero);
2731 uzp1(vform, src2_r, src2, zero);
2770 uzp1(vform, src1_a, src1, zero);
2771 uzp1(vform, src2_a, src2, zero);
2776 uzp1(vform, src2_b, src2, zero);
2779 uzp1(vform, srca_r, srca, zero);
4082 uzp1(vform, src1_a, src1, zero);
4083 uzp1(vform, src2_a, src2, zero);
4088 uzp1(vform, src2_b, src2, zero);
4091 uzp1(vform, srca_r, srca, zero);
4410 LogicVRegister Simulator::uzp1(VectorFormat vform,
5540 uzp1(vform, temp1, src1, src2); \
7712 return uzp1(vform, dst, src, zero);