Lines Matching refs:lanes
1195 unsigned lanes = LaneCountFromFormat(vform);
1199 for (unsigned i = 0; i < lanes; i += 2) {
1208 VIXL_ASSERT(((i >> 1) + (j * lanes / 2)) < ArrayLength(result));
1209 result[(i >> 1) + (j * lanes / 2)] = dst_val;
1401 unsigned lanes = LaneCountFromFormat(vform);
1405 for (unsigned i = 0; i < lanes; i += 2) {
1414 VIXL_ASSERT(((i >> 1) + (j * lanes / 2)) < ArrayLength(result));
1415 result[(i >> 1) + (j * lanes / 2)] = dst_val;
2170 // always has S-lanes or smaller, so signed integer overflow -- undefined
7091 // which occupies the corresponding lanes of the value to be shifted.
7265 // For unpacked forms (e.g. `st1b { z0.h }, ...`, the upper parts of the lanes
7486 // The architecture permits a few possible results for inactive FFR lanes
7509 // Log accessed lanes that are active in both pg and ffr. PrintZStructAccess
7730 // Set even lanes to the result of the addition.
7733 // Set odd lanes to the carry flag from the addition.