Lines Matching defs:shift
834 // Add/sub/adds/subs don't allow ROR as a shift mode.
1469 // Print the shift separately for movk, to make it clear which half word will
1471 // shift calculation.
5737 // Convert shift_dist from a right to left shift. Valid xtn instructions
6601 int shift = instr->GetSizeLS();
6602 AppendToOutput(", #%" PRId32, instr->GetImmLSUnsigned() << shift);
6677 // SVE predicated shift immediate encoding, lsl.
6686 // SVE predicated shift immediate encoding, asr and lsr.
6694 // SVE unpredicated shift immediate encoding, left shifts.
6703 // SVE unpredicated shift immediate encoding, right shifts.
6757 int shift = 16 << HighestSetBitPosition(instr->GetImmNEONImmh());
6758 shift -= instr->GetImmNEONImmhImmb();
6759 AppendToOutput("#%d", shift);
6763 int shift = instr->GetImmNEONImmhImmb();
6764 shift -= 8 << HighestSetBitPosition(instr->GetImmNEONImmh());
6765 AppendToOutput("#%d", shift);
6847 case 'L': { // IVLSLane[0123] - suffix indicates access size shift.
7076 case 'S': { // NSveS (SVE structured load/store indexing shift).
7230 unsigned shift = instr->GetImmShiftLS();
7241 // Extend mode UXTX is an alias for shift mode LSL here.
7242 if (!((ext == UXTX) && (shift == 0))) {
7244 if (shift != 0) {