Lines Matching refs:xn
4253 const Register& xn,
4262 Emit(LDFF1B_z_p_bz_d_64_unscaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4289 const Register& xn,
4298 Emit(LDFF1D_z_p_bz_d_64_scaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4322 const Register& xn,
4331 Emit(LDFF1H_z_p_bz_d_64_scaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4356 const Register& xn,
4365 Emit(LDFF1SB_z_p_bz_d_64_unscaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4393 const Register& xn,
4402 Emit(LDFF1SH_z_p_bz_d_64_scaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4430 const Register& xn,
4439 Emit(LDFF1SW_z_p_bz_d_64_scaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
4464 const Register& xn,
4473 Emit(LDFF1W_z_p_bz_d_64_scaled | Rt(zt) | PgLow8(pg) | RnSP(xn) | Rm(zm));
5086 Register xn = addr.GetScalarBase();
5113 op = RnSP(xn) | Rm(zm) | xs;
5962 void Assembler::dup(const ZRegister& zd, const Register& xn) {
5969 Emit(DUP_z_r | SVESize(zd) | Rd(zd) | RnSP(xn));
6412 void Assembler::addpl(const Register& xd, const Register& xn, int imm6) {
6419 VIXL_ASSERT(xn.IsX());
6421 Emit(ADDPL_r_ri | RdSP(xd) | RmSP(xn) | ImmField<10, 5>(imm6));
6424 void Assembler::addvl(const Register& xd, const Register& xn, int imm6) {
6431 VIXL_ASSERT(xn.IsX());
6433 Emit(ADDVL_r_ri | RdSP(xd) | RmSP(xn) | ImmField<10, 5>(imm6));
6543 void Assembler::mov(const ZRegister& zd, const Register& xn) { dup(zd, xn); }