assembler-sve-aarch64.cc - OpenGrok cross reference for /third_party/vixl/src/aarch64/assembler-sve-aarch64.cc

Lines Matching refs:IsLaneSizeS
1575     VIXL_ASSERT(zm.IsLaneSizeS());
1596     VIXL_ASSERT(zm.IsLaneSizeS());
2458   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
2475   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
2588   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
2605   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
3235   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
3246   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
3941   VIXL_ASSERT(zt.IsLaneSizeS() || zt.IsLaneSizeD());
3949       if (zt.IsLaneSizeS()) {
3955       if (zt.IsLaneSizeS()) {
3965     if (zt.IsLaneSizeS()) {
4500   VIXL_ASSERT(zn.IsLaneSizeS() || zn.IsLaneSizeD());
4505       op = zn.IsLaneSizeS() ? static_cast<Instr>(PRFB_i_p_ai_s)
4509       op = zn.IsLaneSizeS() ? static_cast<Instr>(PRFH_i_p_ai_s)
4513       op = zn.IsLaneSizeS() ? static_cast<Instr>(PRFW_i_p_ai_s)
4517       op = zn.IsLaneSizeS() ? static_cast<Instr>(PRFD_i_p_ai_s)
4656     VIXL_ASSERT(zm.IsLaneSizeS() || zm.IsLaneSizeD());
4660         op = zm.IsLaneSizeS() ? static_cast<Instr>(PRFB_i_p_bz_s_x32_scaled)
4664         op = zm.IsLaneSizeS() ? static_cast<Instr>(PRFH_i_p_bz_s_x32_scaled)
4668         op = zm.IsLaneSizeS() ? static_cast<Instr>(PRFW_i_p_bz_s_x32_scaled)
4672         op = zm.IsLaneSizeS() ? static_cast<Instr>(PRFD_i_p_bz_s_x32_scaled)
4774   VIXL_ASSERT(zn.IsLaneSizeS() || zn.IsLaneSizeD());
4779   if (!is_signed) b14_13 = zn.IsLaneSizeS() ? 0x1 : 0x2;
4794   VIXL_ASSERT(zn.IsLaneSizeS() || zn.IsLaneSizeD());
4797   uint32_t bit22 = zn.IsLaneSizeS() ? (1 << 22) : 0;
5073     VIXL_ASSERT(zn.IsLaneSizeS() || zn.IsLaneSizeD());
5080     VIXL_ASSERT(zn.IsLaneSizeS() || zn.IsLaneSizeD());
5106       VIXL_ASSERT(zm.IsLaneSizeS() || zm.IsLaneSizeD());
5890   VIXL_ASSERT(zd.IsLaneSizeH() || zd.IsLaneSizeS() || zd.IsLaneSizeD());
5904   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
6630   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6645   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6837   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6868   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6979   if (zd.IsLaneSizeD() && zn.IsLaneSizeS()) {
6982     VIXL_ASSERT(zd.IsLaneSizeS() && zn.IsLaneSizeH());
6999   if (zd.IsLaneSizeS() && zn.IsLaneSizeD()) {
7002     VIXL_ASSERT(zd.IsLaneSizeH() && zn.IsLaneSizeS());
7016   VIXL_ASSERT(zd.IsLaneSizeS() && zn.IsLaneSizeD());
7125   VIXL_ASSERT(zda.IsLaneSizeS());
7136   VIXL_ASSERT(zda.IsLaneSizeS());
7153   VIXL_ASSERT(zda.IsLaneSizeS());
7168   VIXL_ASSERT(zda.IsLaneSizeS());
7185   VIXL_ASSERT(zda.IsLaneSizeS());
7200   VIXL_ASSERT(zda.IsLaneSizeS());
7217   VIXL_ASSERT(zda.IsLaneSizeS());
7232   VIXL_ASSERT(zda.IsLaneSizeS());
7251   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeD());
7414   VIXL_ASSERT(!zd.IsLaneSizeB() && !zd.IsLaneSizeS());
7431   VIXL_ASSERT(!zd.IsLaneSizeB() && !zd.IsLaneSizeS());
7644   VIXL_ASSERT(zd.IsLaneSizeD() || zd.IsLaneSizeH() || zd.IsLaneSizeS());
7704   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
7719   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
7841     VIXL_ASSERT(zda.IsLaneSizeD() || zda.IsLaneSizeS());                  \
8012   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8023     VIXL_ASSERT(zm.IsLaneSizeS());
8075   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8086     VIXL_ASSERT(zm.IsLaneSizeS());
8123   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8134     VIXL_ASSERT(zm.IsLaneSizeS());
8186   VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8197     VIXL_ASSERT(zm.IsLaneSizeS());
8585   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
8599   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
8613   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
8627   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
8797   VIXL_ASSERT(zd.IsLaneSizeD() || zd.IsLaneSizeH() || zd.IsLaneSizeS());
8828   VIXL_ASSERT(zd.IsLaneSizeD() || zd.IsLaneSizeH() || zd.IsLaneSizeS());
9462   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
9476   VIXL_ASSERT(zd.IsLaneSizeS() || zd.IsLaneSizeH() || zd.IsLaneSizeB());
9492   VIXL_ASSERT(zd.IsLaneSizeS() && zn.IsLaneSizeS());
9572   VIXL_ASSERT(zd.IsLaneSizeS() && zn.IsLaneSizeS());
9819   VIXL_ASSERT((CPUHas(CPUFeatures::kSVEF32MM) && zda.IsLaneSizeS()) ||
9831   VIXL_ASSERT(zda.IsLaneSizeS());
9842   VIXL_ASSERT(zda.IsLaneSizeS());
9853   VIXL_ASSERT(zda.IsLaneSizeS());
9864   VIXL_ASSERT(zda.IsLaneSizeS());
9876   VIXL_ASSERT(zda.IsLaneSizeS());
9890   VIXL_ASSERT(zda.IsLaneSizeS());