Lines Matching defs:zda
1289 void Assembler::fcmla(const ZRegister& zda,
1299 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1300 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
1304 Emit(FCMLA_z_p_zzz | rotate_bit | SVESize(zda) | Rd(zda) | PgLow8(pg) |
1310 void Assembler::fcmla(const ZRegister& zda,
1316 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1321 Rd(zda) | Rn(zn));
1418 void Assembler::fmla(const ZRegister& zda,
1427 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1428 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
1430 Emit(FMLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
1433 void Assembler::fmls(const ZRegister& zda,
1442 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1443 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
1445 Emit(FMLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
1478 void Assembler::fnmla(const ZRegister& zda,
1487 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1488 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
1490 Emit(FNMLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
1493 void Assembler::fnmls(const ZRegister& zda,
1502 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1503 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
1505 Emit(FNMLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
1607 void Assembler::fmla(const ZRegister& zda,
1612 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1616 Instr synthesized_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
1623 Emit(synthesized_op | Rd(zda) | Rn(zn));
1626 void Assembler::fmls(const ZRegister& zda,
1631 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
1635 Instr synthesized_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
1642 Emit(synthesized_op | Rd(zda) | Rn(zn));
3187 void Assembler::mla(const ZRegister& zda,
3196 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
3198 Emit(MLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
3201 void Assembler::mls(const ZRegister& zda,
3210 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
3212 Emit(MLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm));
3231 void Assembler::sdot(const ZRegister& zda,
3235 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
3236 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
3239 Emit(SDOT_z_zzz | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
3242 void Assembler::udot(const ZRegister& zda,
3246 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
3247 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
3250 Emit(UDOT_z_zzz | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
5325 void Assembler::sdot(const ZRegister& zda,
5330 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
5334 switch (zda.GetLaneSizeInBits()) {
5337 op = SDOT_z_zzzi_s | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn);
5341 op = SDOT_z_zzzi_d | Rx<19, 16>(zm) | (index << 20) | Rd(zda) | Rn(zn);
5351 void Assembler::udot(const ZRegister& zda,
5356 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
5360 switch (zda.GetLaneSizeInBits()) {
5363 op = UDOT_z_zzzi_s | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn);
5367 op = UDOT_z_zzzi_d | Rx<19, 16>(zm) | (index << 20) | Rd(zda) | Rn(zn);
6621 void Assembler::adclb(const ZRegister& zda,
6629 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
6630 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6632 Instr sz = zda.IsLaneSizeD() ? (1 << 22) : 0;
6633 Emit(0x4500d000 | sz | Rd(zda) | Rn(zn) | Rm(zm));
6636 void Assembler::adclt(const ZRegister& zda,
6644 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
6645 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6647 Instr sz = zda.IsLaneSizeD() ? (1 << 22) : 0;
6648 Emit(0x4500d400 | sz | Rd(zda) | Rn(zn) | Rm(zm));
6825 void Assembler::cdot(const ZRegister& zda,
6837 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6838 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
6854 Emit(0x44a04000 | zm_and_idx | rotate_bits | SVESize(zda) | Rd(zda) | Rn(zn));
6857 void Assembler::cdot(const ZRegister& zda,
6868 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
6869 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4));
6872 Emit(0x44001000 | rotate_bits | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
6875 void Assembler::cmla(const ZRegister& zda,
6885 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
6889 Emit(0x44a06000 | SVEMulComplexIndexHelper(zm, index) | rotate_bit | Rd(zda) |
6893 void Assembler::cmla(const ZRegister& zda,
6902 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
6906 Emit(0x44002000 | rotate_bit | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7117 void Assembler::fmlalb(const ZRegister& zda,
7125 VIXL_ASSERT(zda.IsLaneSizeS());
7128 Emit(0x64a08000 | Rd(zda) | Rn(zn) | Rm(zm));
7131 void Assembler::fmlalb(const ZRegister& zda,
7136 VIXL_ASSERT(zda.IsLaneSizeS());
7142 Emit(0x64a04000 | Rd(zda) | Rn(zn) | zm_and_idx);
7145 void Assembler::fmlalt(const ZRegister& zda,
7153 VIXL_ASSERT(zda.IsLaneSizeS());
7156 Emit(0x64a08400 | Rd(zda) | Rn(zn) | Rm(zm));
7159 void Assembler::fmlalt(const ZRegister& zda,
7168 VIXL_ASSERT(zda.IsLaneSizeS());
7174 Emit(0x64a04400 | Rd(zda) | Rn(zn) | zm_and_idx);
7177 void Assembler::fmlslb(const ZRegister& zda,
7185 VIXL_ASSERT(zda.IsLaneSizeS());
7188 Emit(0x64a0a000 | Rd(zda) | Rn(zn) | Rm(zm));
7191 void Assembler::fmlslb(const ZRegister& zda,
7200 VIXL_ASSERT(zda.IsLaneSizeS());
7206 Emit(0x64a06000 | Rd(zda) | Rn(zn) | zm_and_idx);
7209 void Assembler::fmlslt(const ZRegister& zda,
7217 VIXL_ASSERT(zda.IsLaneSizeS());
7220 Emit(0x64a0a400 | Rd(zda) | Rn(zn) | Rm(zm));
7223 void Assembler::fmlslt(const ZRegister& zda,
7232 VIXL_ASSERT(zda.IsLaneSizeS());
7238 Emit(0x64a06400 | Rd(zda) | Rn(zn) | zm_and_idx);
7285 void Assembler::mla(const ZRegister& zda,
7294 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
7296 Instr synthesised_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
7303 Emit(synthesised_op | Rd(zda) | Rn(zn));
7306 void Assembler::mls(const ZRegister& zda,
7315 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
7317 Instr synthesised_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
7324 Emit(synthesised_op | Rd(zda) | Rn(zn));
7529 void Assembler::saba(const ZRegister& zda,
7537 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
7539 Emit(0x4500f800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7542 void Assembler::sabalb(const ZRegister& zda,
7551 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7552 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
7554 Emit(0x4500c000 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7557 void Assembler::sabalt(const ZRegister& zda,
7566 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7567 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
7569 Emit(0x4500c400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7604 void Assembler::sadalp(const ZRegister& zda,
7612 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7613 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
7615 Emit(0x4404a000 | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn));
7695 void Assembler::sbclb(const ZRegister& zda,
7703 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
7704 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
7706 Instr sz = zda.IsLaneSizeD() ? (1 << 22) : 0;
7707 Emit(0x4580d000 | sz | Rd(zda) | Rn(zn) | Rm(zm));
7710 void Assembler::sbclt(const ZRegister& zda,
7718 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
7719 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
7721 Instr sz = zda.IsLaneSizeD() ? (1 << 22) : 0;
7722 Emit(0x4580d400 | sz | Rd(zda) | Rn(zn) | Rm(zm));
7835 void Assembler::MNE(const ZRegister& zda, \
7841 VIXL_ASSERT(zda.IsLaneSizeD() || zda.IsLaneSizeS()); \
7842 VIXL_ASSERT(zda.GetLaneSizeInBytes() == zn.GetLaneSizeInBytes() * 2); \
7844 Emit(OP | SVESize(zda) | Rd(zda) | Rn(zn) | zm_with_index); \
7849 void Assembler::smlalb(const ZRegister& zda,
7857 VIXL_ASSERT(!zda.IsLaneSizeB());
7859 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7861 Emit(0x44004000 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7864 void Assembler::smlalt(const ZRegister& zda,
7872 VIXL_ASSERT(!zda.IsLaneSizeB());
7874 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7876 Emit(0x44004400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7879 void Assembler::smlslb(const ZRegister& zda,
7887 VIXL_ASSERT(!zda.IsLaneSizeB());
7889 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7891 Emit(0x44005000 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
7894 void Assembler::smlslt(const ZRegister& zda,
7902 VIXL_ASSERT(!zda.IsLaneSizeB());
7904 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
7906 Emit(0x44005400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8002 void Assembler::sqdmlalb(const ZRegister& zda,
8012 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8029 Emit(0x44202000 | zm_and_idx | SVESize(zda) | Rd(zda) | Rn(zn));
8032 void Assembler::sqdmlalb(const ZRegister& zda,
8041 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8042 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8044 Emit(0x44006000 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8047 void Assembler::sqdmlalbt(const ZRegister& zda,
8056 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8057 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8059 Emit(0x44000800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8065 void Assembler::sqdmlalt(const ZRegister& zda,
8075 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8092 Emit(0x44202400 | zm_and_idx | SVESize(zda) | Rd(zda) | Rn(zn));
8095 void Assembler::sqdmlalt(const ZRegister& zda,
8104 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8105 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8107 Emit(0x44006400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8113 void Assembler::sqdmlslb(const ZRegister& zda,
8123 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8140 Emit(0x44203000 | zm_and_idx | SVESize(zda) | Rd(zda) | Rn(zn));
8143 void Assembler::sqdmlslb(const ZRegister& zda,
8152 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8153 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8155 Emit(0x44006800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8158 void Assembler::sqdmlslbt(const ZRegister& zda,
8167 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8168 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8170 Emit(0x44000c00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8176 void Assembler::sqdmlslt(const ZRegister& zda,
8186 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD());
8203 Emit(0x44203400 | zm_and_idx | SVESize(zda) | Rd(zda) | Rn(zn));
8206 void Assembler::sqdmlslt(const ZRegister& zda,
8215 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
8216 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
8218 Emit(0x44006c00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8298 void Assembler::sqrdcmlah(const ZRegister& zda,
8308 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8312 Emit(0x44a07000 | SVEMulComplexIndexHelper(zm, index) | rotate_bit | Rd(zda) |
8316 void Assembler::sqrdcmlah(const ZRegister& zda,
8325 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8329 Emit(0x44003000 | rotate_bit | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8336 void Assembler::sqrdmlah(const ZRegister& zda,
8341 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8348 Instr synthesized_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
8355 Emit(synthesized_op | Rd(zda) | Rn(zn));
8358 void Assembler::sqrdmlah(const ZRegister& zda,
8366 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8368 Emit(0x44007000 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8375 void Assembler::sqrdmlsh(const ZRegister& zda,
8380 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8387 Instr synthesized_op = SVEMulIndexHelper(zda.GetLaneSizeInBytesLog2(),
8394 Emit(synthesized_op | Rd(zda) | Rn(zn));
8397 void Assembler::sqrdmlsh(const ZRegister& zda,
8405 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8407 Emit(0x44007400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
8715 void Assembler::srsra(const ZRegister& zda, const ZRegister& zn, int shift) {
8722 VIXL_ASSERT(AreSameLaneSize(zda, zn));
8724 EncodeSVEShiftRightImmediate(shift, zda.GetLaneSizeInBits());
8726 SVEBitwiseShiftImmediate(zda, zn, encoded_imm, 0x4500e800);
8757 void Assembler::ssra(const ZRegister& zda, const ZRegister& zn, int shift) {
8764 VIXL_ASSERT(AreSameLaneSize(zda, zn));
8766 EncodeSVEShiftRightImmediate(shift, zda.GetLaneSizeInBits());
8768 SVEBitwiseShiftImmediate(zda, zn, encoded_imm, 0x4500e000);
8989 void Assembler::uaba(const ZRegister& zda,
8997 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
8999 Emit(0x4500fc00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9002 void Assembler::uabalb(const ZRegister& zda,
9011 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9012 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
9014 Emit(0x4500c800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9017 void Assembler::uabalt(const ZRegister& zda,
9026 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9027 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
9029 Emit(0x4500cc00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9064 void Assembler::uadalp(const ZRegister& zda,
9072 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9073 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes);
9075 Emit(0x4405a000 | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn));
9220 void Assembler::umlalb(const ZRegister& zda,
9228 VIXL_ASSERT(!zda.IsLaneSizeB());
9230 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9232 Emit(0x44004800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9235 void Assembler::umlalt(const ZRegister& zda,
9243 VIXL_ASSERT(!zda.IsLaneSizeB());
9245 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9247 Emit(0x44004c00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9250 void Assembler::umlslb(const ZRegister& zda,
9258 VIXL_ASSERT(!zda.IsLaneSizeB());
9260 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9262 Emit(0x44005800 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9265 void Assembler::umlslt(const ZRegister& zda,
9273 VIXL_ASSERT(!zda.IsLaneSizeB());
9275 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 2));
9277 Emit(0x44005c00 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9577 void Assembler::ursra(const ZRegister& zda, const ZRegister& zn, int shift) {
9584 VIXL_ASSERT(AreSameLaneSize(zda, zn));
9586 EncodeSVEShiftRightImmediate(shift, zda.GetLaneSizeInBits());
9588 SVEBitwiseShiftImmediate(zda, zn, encoded_imm, 0x4500ec00);
9635 void Assembler::usra(const ZRegister& zda, const ZRegister& zn, int shift) {
9642 VIXL_ASSERT(AreSameLaneSize(zda, zn));
9644 EncodeSVEShiftRightImmediate(shift, zda.GetLaneSizeInBits());
9646 SVEBitwiseShiftImmediate(zda, zn, encoded_imm, 0x4500e400);
9815 void Assembler::fmmla(const ZRegister& zda,
9819 VIXL_ASSERT((CPUHas(CPUFeatures::kSVEF32MM) && zda.IsLaneSizeS()) ||
9820 (CPUHas(CPUFeatures::kSVEF64MM) && zda.IsLaneSizeD()));
9821 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm));
9823 Emit(0x6420e400 | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm));
9826 void Assembler::smmla(const ZRegister& zda,
9831 VIXL_ASSERT(zda.IsLaneSizeS());
9834 Emit(0x45009800 | Rd(zda) | Rn(zn) | Rm(zm));
9837 void Assembler::usmmla(const ZRegister& zda,
9842 VIXL_ASSERT(zda.IsLaneSizeS());
9845 Emit(0x45809800 | Rd(zda) | Rn(zn) | Rm(zm));
9848 void Assembler::ummla(const ZRegister& zda,
9853 VIXL_ASSERT(zda.IsLaneSizeS());
9856 Emit(0x45c09800 | Rd(zda) | Rn(zn) | Rm(zm));
9859 void Assembler::usdot(const ZRegister& zda,
9864 VIXL_ASSERT(zda.IsLaneSizeS());
9867 Emit(0x44807800 | Rd(zda) | Rn(zn) | Rm(zm));
9870 void Assembler::usdot(const ZRegister& zda,
9876 VIXL_ASSERT(zda.IsLaneSizeS());
9881 Emit(0x44a01800 | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn));
9884 void Assembler::sudot(const ZRegister& zda,
9890 VIXL_ASSERT(zda.IsLaneSizeS());
9895 Emit(0x44a01c00 | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn));