Lines Matching defs:shift
748 // Logical shift left by variable.
751 // Logical shift right by variable.
754 // Arithmetic shift right by variable.
812 // Arithmetic shift right.
813 void asr(const Register& rd, const Register& rn, unsigned shift) {
814 VIXL_ASSERT(shift < static_cast<unsigned>(rd.GetSizeInBits()));
815 sbfm(rd, rn, shift, rd.GetSizeInBits() - 1);
852 // Logical shift left.
853 void lsl(const Register& rd, const Register& rn, unsigned shift) {
855 VIXL_ASSERT(shift < reg_size);
857 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
860 // Logical shift right.
861 void lsr(const Register& rd, const Register& rn, unsigned shift) {
862 VIXL_ASSERT(shift < static_cast<unsigned>(rd.GetSizeInBits()));
863 ubfm(rd, rn, shift, rd.GetSizeInBits() - 1);
944 void ror(const Register& rd, const Register& rs, unsigned shift) {
945 extr(rd, rs, rs, shift);
2109 // Move instructions. The default shift of -1 indicates that the move
2110 // instruction will calculate an appropriate 16-bit immediate and left shift
2111 // that is equal to the 64-bit immediate argument. If an explicit left shift
2114 // For movk, an explicit shift can be used to indicate which half word should
2120 void movk(const Register& rd, uint64_t imm, int shift = -1) {
2121 MoveWide(rd, imm, shift, MOVK);
2125 void movn(const Register& rd, uint64_t imm, int shift = -1) {
2126 MoveWide(rd, imm, shift, MOVN);
2130 void movz(const Register& rd, uint64_t imm, int shift = -1) {
2131 MoveWide(rd, imm, shift, MOVZ);
2709 // Signed shift left by register.
2712 // Unsigned shift left by register.
2715 // Signed saturating shift left by register.
2718 // Unsigned saturating shift left by register.
2721 // Signed rounding shift left by register.
2724 // Unsigned rounding shift left by register.
2727 // Signed saturating rounding shift left by register.
2730 // Unsigned saturating rounding shift left by register.
2772 Shift shift = LSL,
2781 Shift shift = LSL,
2989 void shl(const VRegister& vd, const VRegister& vn, int shift);
2991 // Signed saturating shift left by immediate.
2992 void sqshl(const VRegister& vd, const VRegister& vn, int shift);
2994 // Signed saturating shift left unsigned by immediate.
2995 void sqshlu(const VRegister& vd, const VRegister& vn, int shift);
2997 // Unsigned saturating shift left by immediate.
2998 void uqshl(const VRegister& vd, const VRegister& vn, int shift);
3000 // Signed shift left long by immediate.
3001 void sshll(const VRegister& vd, const VRegister& vn, int shift);
3003 // Signed shift left long by immediate (second part).
3004 void sshll2(const VRegister& vd, const VRegister& vn, int shift);
3012 // Unsigned shift left long by immediate.
3013 void ushll(const VRegister& vd, const VRegister& vn, int shift);
3015 // Unsigned shift left long by immediate (second part).
3016 void ushll2(const VRegister& vd, const VRegister& vn, int shift);
3019 void shll(const VRegister& vd, const VRegister& vn, int shift);
3022 void shll2(const VRegister& vd, const VRegister& vn, int shift);
3031 void sli(const VRegister& vd, const VRegister& vn, int shift);
3034 void sri(const VRegister& vd, const VRegister& vn, int shift);
3218 // Signed shift right by immediate.
3219 void sshr(const VRegister& vd, const VRegister& vn, int shift);
3221 // Unsigned shift right by immediate.
3222 void ushr(const VRegister& vd, const VRegister& vn, int shift);
3224 // Signed rounding shift right by immediate.
3225 void srshr(const VRegister& vd, const VRegister& vn, int shift);
3227 // Unsigned rounding shift right by immediate.
3228 void urshr(const VRegister& vd, const VRegister& vn, int shift);
3230 // Signed shift right by immediate and accumulate.
3231 void ssra(const VRegister& vd, const VRegister& vn, int shift);
3233 // Unsigned shift right by immediate and accumulate.
3234 void usra(const VRegister& vd, const VRegister& vn, int shift);
3236 // Signed rounding shift right by immediate and accumulate.
3237 void srsra(const VRegister& vd, const VRegister& vn, int shift);
3239 // Unsigned rounding shift right by immediate and accumulate.
3240 void ursra(const VRegister& vd, const VRegister& vn, int shift);
3243 void shrn(const VRegister& vd, const VRegister& vn, int shift);
3246 void shrn2(const VRegister& vd, const VRegister& vn, int shift);
3248 // Rounding shift right narrow by immediate.
3249 void rshrn(const VRegister& vd, const VRegister& vn, int shift);
3251 // Rounding shift right narrow by immediate (second part).
3252 void rshrn2(const VRegister& vd, const VRegister& vn, int shift);
3254 // Unsigned saturating shift right narrow by immediate.
3255 void uqshrn(const VRegister& vd, const VRegister& vn, int shift);
3257 // Unsigned saturating shift right narrow by immediate (second part).
3258 void uqshrn2(const VRegister& vd, const VRegister& vn, int shift);
3260 // Unsigned saturating rounding shift right narrow by immediate.
3261 void uqrshrn(const VRegister& vd, const VRegister& vn, int shift);
3263 // Unsigned saturating rounding shift right narrow by immediate (second part).
3264 void uqrshrn2(const VRegister& vd, const VRegister& vn, int shift);
3266 // Signed saturating shift right narrow by immediate.
3267 void sqshrn(const VRegister& vd, const VRegister& vn, int shift);
3269 // Signed saturating shift right narrow by immediate (second part).
3270 void sqshrn2(const VRegister& vd, const VRegister& vn, int shift);
3272 // Signed saturating rounded shift right narrow by immediate.
3273 void sqrshrn(const VRegister& vd, const VRegister& vn, int shift);
3275 // Signed saturating rounded shift right narrow by immediate (second part).
3276 void sqrshrn2(const VRegister& vd, const VRegister& vn, int shift);
3278 // Signed saturating shift right unsigned narrow by immediate.
3279 void sqshrun(const VRegister& vd, const VRegister& vn, int shift);
3281 // Signed saturating shift right unsigned narrow by immediate (second part).
3282 void sqshrun2(const VRegister& vd, const VRegister& vn, int shift);
3284 // Signed sat rounded shift right unsigned narrow by immediate.
3285 void sqrshrun(const VRegister& vd, const VRegister& vn, int shift);
3287 // Signed sat rounded shift right unsigned narrow by immediate (second part).
3288 void sqrshrun2(const VRegister& vd, const VRegister& vn, int shift);
3661 void add(const ZRegister& zd, const ZRegister& zn, int imm8, int shift = -1);
3699 // Arithmetic shift right by immediate (predicated).
3703 int shift);
3705 // Arithmetic shift right by 64-bit wide elements (predicated).
3711 // Arithmetic shift right by immediate (unpredicated).
3712 void asr(const ZRegister& zd, const ZRegister& zn, int shift);
3714 // Arithmetic shift right by 64-bit wide elements (unpredicated).
3717 // Arithmetic shift right for divide by immediate (predicated).
3721 int shift);
3723 // Reversed arithmetic shift right by vector (predicated).
4004 void cpy(const ZRegister& zd, const PRegister& pg, int imm8, int shift = -1);
4051 // As for movz/movk/movn, if the default shift of -1 is specified to dup, the
4052 // assembler will pick an appropriate immediate and left shift that is
4053 // equivalent to the immediate argument. If an explicit left shift is
4057 void dup(const ZRegister& zd, int imm8, int shift = -1);
4958 // Logical shift left by immediate (predicated).
4962 int shift);
4964 // Logical shift left by 64-bit wide elements (predicated).
4970 // Logical shift left by immediate (unpredicated).
4971 void lsl(const ZRegister& zd, const ZRegister& zn, int shift);
4973 // Logical shift left by 64-bit wide elements (unpredicated).
4976 // Reversed logical shift left by vector (predicated).
4982 // Logical shift right by immediate (predicated).
4986 int shift);
4988 // Logical shift right by 64-bit wide elements (predicated).
4994 // Logical shift right by immediate (unpredicated).
4995 void lsr(const ZRegister& zd, const ZRegister& zn, int shift);
4997 // Logical shift right by 64-bit wide elements (unpredicated).
5000 // Reversed logical shift right by vector (predicated).
5072 void mov(const ZRegister& zd, const PRegister& pg, int imm8, int shift = -1);
5075 void mov(const ZRegister& zd, int imm8, int shift);
5359 int shift = -1);
5502 int shift = -1);
5641 void sub(const ZRegister& zd, const ZRegister& zn, int imm8, int shift = -1);
5650 void subr(const ZRegister& zd, const ZRegister& zn, int imm8, int shift = -1);
5757 int shift = -1);
5834 int shift = -1);
6168 // Rounding shift right narrow by immediate (bottom).
6169 void rshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6171 // Rounding shift right narrow by immediate (top).
6172 void rshrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6226 void shrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6229 void shrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6244 void sli(const ZRegister& zd, const ZRegister& zn, int shift);
6460 // Signed saturating rounding shift left by vector (predicated).
6466 // Signed saturating rounding shift left reversed vectors (predicated).
6472 // Signed saturating rounding shift right narrow by immediate (bottom).
6473 void sqrshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6475 // Signed saturating rounding shift right narrow by immediate (top).
6476 void sqrshrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6478 // Signed saturating rounding shift right unsigned narrow by immediate
6480 void sqrshrunb(const ZRegister& zd, const ZRegister& zn, int shift);
6482 // Signed saturating rounding shift right unsigned narrow by immediate
6484 void sqrshrunt(const ZRegister& zd, const ZRegister& zn, int shift);
6486 // Signed saturating shift left by immediate.
6490 int shift);
6492 // Signed saturating shift left by vector (predicated).
6498 // Signed saturating shift left reversed vectors (predicated).
6504 // Signed saturating shift left unsigned by immediate.
6508 int shift);
6510 // Signed saturating shift right narrow by immediate (bottom).
6511 void sqshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6513 // Signed saturating shift right narrow by immediate (top).
6514 void sqshrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6516 // Signed saturating shift right unsigned narrow by immediate (bottom).
6517 void sqshrunb(const ZRegister& zd, const ZRegister& zn, int shift);
6519 // Signed saturating shift right unsigned narrow by immediate (top).
6520 void sqshrunt(const ZRegister& zd, const ZRegister& zn, int shift);
6553 void sri(const ZRegister& zd, const ZRegister& zn, int shift);
6555 // Signed rounding shift left by vector (predicated).
6561 // Signed rounding shift left reversed vectors (predicated).
6567 // Signed rounding shift right by immediate.
6571 int shift);
6573 // Signed rounding shift right and accumulate (immediate).
6574 void srsra(const ZRegister& zda, const ZRegister& zn, int shift);
6576 // Signed shift left long by immediate (bottom).
6577 void sshllb(const ZRegister& zd, const ZRegister& zn, int shift);
6579 // Signed shift left long by immediate (top).
6580 void sshllt(const ZRegister& zd, const ZRegister& zn, int shift);
6582 // Signed shift right and accumulate (immediate).
6583 void ssra(const ZRegister& zda, const ZRegister& zn, int shift);
6747 // Unsigned saturating rounding shift left by vector (predicated).
6753 // Unsigned saturating rounding shift left reversed vectors (predicated).
6759 // Unsigned saturating rounding shift right narrow by immediate (bottom).
6760 void uqrshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6762 // Unsigned saturating rounding shift right narrow by immediate (top).
6763 void uqrshrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6765 // Unsigned saturating shift left by immediate.
6769 int shift);
6771 // Unsigned saturating shift left by vector (predicated).
6777 // Unsigned saturating shift left reversed vectors (predicated).
6783 // Unsigned saturating shift right narrow by immediate (bottom).
6784 void uqshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
6786 // Unsigned saturating shift right narrow by immediate (top).
6787 void uqshrnt(const ZRegister& zd, const ZRegister& zn, int shift);
6816 // Unsigned rounding shift left by vector (predicated).
6822 // Unsigned rounding shift left reversed vectors (predicated).
6828 // Unsigned rounding shift right by immediate.
6832 int shift);
6837 // Unsigned rounding shift right and accumulate (immediate).
6838 void ursra(const ZRegister& zda, const ZRegister& zn, int shift);
6840 // Unsigned shift left long by immediate (bottom).
6841 void ushllb(const ZRegister& zd, const ZRegister& zn, int shift);
6843 // Unsigned shift left long by immediate (top).
6844 void ushllt(const ZRegister& zd, const ZRegister& zn, int shift);
6852 // Unsigned shift right and accumulate (immediate).
6853 void usra(const ZRegister& zda, const ZRegister& zn, int shift);
6901 int shift);
7265 // Subtract five from the shift offset, as we need bit 5 from bit_pos.
7280 if (IsUint12(imm)) { // No shift required.
7380 static Instr ShiftDP(Shift shift) {
7381 VIXL_ASSERT(shift == LSL || shift == LSR || shift == ASR || shift == ROR);
7382 return shift << ShiftDP_offset;
7510 static Instr ShiftMoveWide(int64_t shift) {
7511 VIXL_ASSERT(IsUint2(shift));
7512 return static_cast<Instr>(shift << ShiftMoveWide_offset);
8017 int shift);
8024 Instr EncodeSVEShiftLeftImmediate(int shift, int lane_size_in_bits);
8026 Instr EncodeSVEShiftRightImmediate(int shift, int lane_size_in_bits);
8089 Shift shift,
8150 int shift,
8269 int shift,
8273 int shift,
8277 int shift,
8281 int shift,
8285 // If *shift is -1, find values of *imm8 and *shift such that IsInt8(*imm8)
8286 // and *shift is either 0 or 8. Otherwise, leave the values unchanged.
8287 void ResolveSVEImm8Shift(int* imm8, int* shift);