Lines Matching defs:reg_size
854 unsigned reg_size = rd.GetSizeInBits();
855 VIXL_ASSERT(shift < reg_size);
857 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
7337 static Instr ImmS(unsigned imms, unsigned reg_size) {
7338 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) ||
7339 ((reg_size == kWRegSize) && IsUint5(imms)));
7340 USE(reg_size);
7344 static Instr ImmR(unsigned immr, unsigned reg_size) {
7345 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
7346 ((reg_size == kWRegSize) && IsUint5(immr)));
7347 USE(reg_size);
7352 static Instr ImmSetBits(unsigned imms, unsigned reg_size) {
7353 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7355 VIXL_ASSERT((reg_size == kXRegSize) || IsUint6(imms + 3));
7356 USE(reg_size);
7360 static Instr ImmRotate(unsigned immr, unsigned reg_size) {
7361 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7362 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
7363 ((reg_size == kWRegSize) && IsUint5(immr)));
7364 USE(reg_size);
7373 static Instr BitN(unsigned bitn, unsigned reg_size) {
7374 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7375 VIXL_ASSERT((reg_size == kXRegSize) || (bitn == 0));
7376 USE(reg_size);
7561 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
7562 static bool IsImmMovz(uint64_t imm, unsigned reg_size);