Lines Matching refs:fbits
3702 void Assembler::fcvtzs(const Register& rd, const VRegister& vn, int fbits) {
3706 VIXL_ASSERT((fbits >= 0) && (fbits <= rd.GetSizeInBits()));
3707 if (fbits == 0) {
3710 Emit(SF(rd) | FPType(vn) | FCVTZS_fixed | FPScale(64 - fbits) | Rn(vn) |
3716 void Assembler::fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) {
3720 VIXL_ASSERT(fbits >= 0);
3721 if (fbits == 0) {
3730 NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZS_imm);
3735 void Assembler::fcvtzu(const Register& rd, const VRegister& vn, int fbits) {
3739 VIXL_ASSERT((fbits >= 0) && (fbits <= rd.GetSizeInBits()));
3740 if (fbits == 0) {
3743 Emit(SF(rd) | FPType(vn) | FCVTZU_fixed | FPScale(64 - fbits) | Rn(vn) |
3749 void Assembler::fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) {
3753 VIXL_ASSERT(fbits >= 0);
3754 if (fbits == 0) {
3763 NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZU_imm);
3767 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) {
3771 VIXL_ASSERT(fbits >= 0);
3772 if (fbits == 0) {
3781 NEONShiftRightImmediate(vd, vn, fbits, NEON_UCVTF_imm);
3785 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) {
3789 VIXL_ASSERT(fbits >= 0);
3790 if (fbits == 0) {
3799 NEONShiftRightImmediate(vd, vn, fbits, NEON_SCVTF_imm);
3804 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) {
3808 VIXL_ASSERT(fbits >= 0);
3809 if (fbits == 0) {
3812 Emit(SF(rn) | FPType(vd) | SCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |
3818 void Assembler::ucvtf(const VRegister& vd, const Register& rn, int fbits) {
3822 VIXL_ASSERT(fbits >= 0);
3823 if (fbits == 0) {
3826 Emit(SF(rn) | FPType(vd) | UCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |