Lines Matching defs:offset
61 void Assembler::BindToOffset(Label* label, ptrdiff_t offset) {
62 VIXL_ASSERT((offset >= 0) && (offset <= GetBuffer()->GetCursorOffset()));
63 VIXL_ASSERT(offset % kInstructionSize == 0);
65 label->Bind(offset);
78 // The offset is calculated by aligning the PC and label addresses down to a
79 // multiple of 1 << element_shift, then calculating the (scaled) offset between
117 ptrdiff_t offset = literal->GetLastUse();
120 Instruction* ldr = GetBuffer()->GetOffsetAddress<Instruction*>(offset);
126 offset += imm19 * kLiteralEntrySize;
159 // The literal is "behind", the offset will be negative.
164 ptrdiff_t offset = 0;
167 offset =
176 return offset;
268 int64_t offset = LinkAndGetInstructionOffsetTo(label);
269 VIXL_ASSERT(Instruction::IsValidImmPCOffset(UncondBranchType, offset));
270 b(static_cast<int>(offset));
275 int64_t offset = LinkAndGetInstructionOffsetTo(label);
276 VIXL_ASSERT(Instruction::IsValidImmPCOffset(CondBranchType, offset));
277 b(static_cast<int>(offset), cond);
285 int64_t offset = LinkAndGetInstructionOffsetTo(label);
286 VIXL_ASSERT(Instruction::IsValidImmPCOffset(UncondBranchType, offset));
287 bl(static_cast<int>(offset));
297 int64_t offset = LinkAndGetInstructionOffsetTo(label);
298 VIXL_ASSERT(Instruction::IsValidImmPCOffset(CompareBranchType, offset));
299 cbz(rt, static_cast<int>(offset));
309 int64_t offset = LinkAndGetInstructionOffsetTo(label);
310 VIXL_ASSERT(Instruction::IsValidImmPCOffset(CompareBranchType, offset));
311 cbnz(rt, static_cast<int>(offset));
428 ptrdiff_t offset = LinkAndGetInstructionOffsetTo(label);
429 VIXL_ASSERT(Instruction::IsValidImmPCOffset(TestBranchType, offset));
430 tbz(rt, bit_pos, static_cast<int>(offset));
441 ptrdiff_t offset = LinkAndGetInstructionOffsetTo(label);
442 VIXL_ASSERT(Instruction::IsValidImmPCOffset(TestBranchType, offset));
443 tbnz(rt, bit_pos, static_cast<int>(offset));
1130 int offset = static_cast<int>(addr.GetOffset());
1132 ImmLSPair(offset, CalcLSPairDataSize(op));
1182 int offset = static_cast<int>(addr.GetOffset());
1184 ImmLSPair(offset, size));
1543 int64_t offset = dst.GetOffset();
1544 Emit(STLURB | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1558 int64_t offset = dst.GetOffset();
1559 Emit(STLURH | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1574 int64_t offset = dst.GetOffset();
1576 Emit(op | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1797 int64_t offset = src.GetOffset();
1798 Emit(LDAPURB | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1806 int64_t offset = src.GetOffset();
1808 Emit(op | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1823 int64_t offset = src.GetOffset();
1824 Emit(LDAPURH | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1832 int64_t offset = src.GetOffset();
1834 Emit(op | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1849 int64_t offset = src.GetOffset();
1851 Emit(op | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1860 int64_t offset = src.GetOffset();
1861 Emit(LDAPURSW | Rt(rt) | base | ImmLS(static_cast<int>(offset)));
1947 int offset,
1950 VIXL_ASSERT(IsMultiple(offset, kMTETagGranuleInBytes));
1953 ImmUnsignedField<21, 16>(offset / kMTETagGranuleInBytes) |
1976 int offset = static_cast<int>(addr.GetOffset());
1977 VIXL_ASSERT(IsMultiple(offset, kMTETagGranuleInBytes));
1980 ImmField<20, 12>(offset / static_cast<int>(kMTETagGranuleInBytes)));
1986 int offset = static_cast<int>(addr.GetOffset());
1987 VIXL_ASSERT(IsMultiple(offset, kMTETagGranuleInBytes));
2000 ImmField<20, 12>(offset / static_cast<int>(kMTETagGranuleInBytes)));
2017 int offset = static_cast<int>(addr.GetOffset());
2018 VIXL_ASSERT(IsMultiple(offset, kMTETagGranuleInBytes));
2031 ImmField<21, 15>(offset / static_cast<int>(kMTETagGranuleInBytes)) |
2047 int offset,
2050 VIXL_ASSERT(IsMultiple(offset, kMTETagGranuleInBytes));
2053 ImmUnsignedField<21, 16>(offset / kMTETagGranuleInBytes) |
2506 // Assert that addressing mode is either offset (with immediate 0), post
2513 int offset = vt.GetSizeInBytes();
2517 offset *= 1;
2522 offset = (offset / vt.GetLanes()) * 1;
2529 offset *= 2;
2534 offset = (offset / vt.GetLanes()) * 2;
2541 offset *= 3;
2546 offset = (offset / vt.GetLanes()) * 3;
2553 offset *= 4;
2558 offset = (offset / vt.GetLanes()) * 4;
2564 addr.GetOffset() == offset);
6286 int64_t offset = addr.GetOffset();
6291 if (prefer_unscaled && IsImmLSUnscaled(offset)) {
6293 return base | LoadStoreUnscaledOffsetFixed | ImmLS(offset);
6297 IsImmLSScaled(offset, access_size_in_bytes_log2)) {
6298 // We need `offset` to be positive for the shift to be well-defined.
6300 VIXL_ASSERT(offset >= 0);
6303 ImmLSUnsigned(offset >> access_size_in_bytes_log2);
6306 if ((option != RequireScaledOffset) && IsImmLSUnscaled(offset)) {
6308 return base | LoadStoreUnscaledOffsetFixed | ImmLS(offset);
6312 // All remaining addressing modes are register-offset, pre-indexed or
6334 if (addr.IsImmediatePreIndex() && IsImmLSUnscaled(offset)) {
6335 return base | LoadStorePreIndexFixed | ImmLS(offset);
6338 if (addr.IsImmediatePostIndex() && IsImmLSUnscaled(offset)) {
6339 return base | LoadStorePostIndexFixed | ImmLS(offset);
6368 int64_t offset = addr.GetOffset();
6370 Emit(pac_op | Rt(xt) | base | ImmLSPAC(static_cast<int>(offset)));
6474 bool Assembler::IsImmLSPair(int64_t offset, unsigned access_size_in_bytes_log2) {
6477 return IsMultiple(offset, access_size_in_bytes) &&
6478 IsInt7(offset / access_size_in_bytes);
6482 bool Assembler::IsImmLSScaled(int64_t offset, unsigned access_size_in_bytes_log2) {
6485 return IsMultiple(offset, access_size_in_bytes) &&
6486 IsUint12(offset / access_size_in_bytes);
6490 bool Assembler::IsImmLSUnscaled(int64_t offset) { return IsInt9(offset); }