Lines Matching refs:rs_
57 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
59 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
66 : imm_(0), rm_(rm), shift_(LSL), amount_(0), rs_(NoReg) {
74 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(NoReg) {
84 : imm_(0), rm_(rm), shift_(shift), amount_(amount), rs_(NoReg) {
112 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(rs) {
113 VIXL_ASSERT(rm_.IsValid() && rs_.IsValid());
145 return rm_.IsValid() && !shift_.IsRRX() && !rs_.IsValid() && (amount_ == 0);
149 return rm_.IsValid() && !rs_.IsValid();
153 return rm_.IsValid() && rs_.IsValid();
185 return rs_;
219 Register rs_;