Lines Matching refs:VIXL_ASSERT

67     VIXL_ASSERT(rm_.IsValid());
75 VIXL_ASSERT(rm_.IsValid());
76 VIXL_ASSERT(shift_.IsRRX());
85 VIXL_ASSERT(rm_.IsValid());
86 VIXL_ASSERT(!shift_.IsRRX());
90 VIXL_ASSERT(amount_ <= 31);
93 VIXL_ASSERT(amount_ <= 31);
97 VIXL_ASSERT(amount_ <= 32);
113 VIXL_ASSERT(rm_.IsValid() && rs_.IsValid());
114 VIXL_ASSERT(!shift_.IsRRX());
131 VIXL_ASSERT(IsInt32(immediate) || IsUint32(immediate));
138 VIXL_ASSERT(IsUint32(address_as_integral));
157 VIXL_ASSERT(IsImmediate());
162 VIXL_ASSERT(IsImmediate());
169 VIXL_ASSERT(IsImmediateShiftedRegister() || IsRegisterShiftedRegister());
174 VIXL_ASSERT(IsImmediateShiftedRegister() || IsRegisterShiftedRegister());
179 VIXL_ASSERT(IsImmediateShiftedRegister());
184 VIXL_ASSERT(IsRegisterShiftedRegister());
269 VIXL_ASSERT(sizeof(T) <= sizeof(uint32_t));
270 VIXL_ASSERT(CanConvert<T>());
278 VIXL_ASSERT(CanConvert<uint64_t>());
284 VIXL_ASSERT(CanConvert<float>());
289 VIXL_ASSERT(CanConvert<double>());
312 VIXL_ASSERT(sizeof(T) < sizeof(uint32_t));
374 VIXL_ASSERT(rm_.IsValid());
380 VIXL_ASSERT(IsImmediate());
387 VIXL_ASSERT(IsRegister());
426 VIXL_ASSERT(IsRegister() && (rm_.GetType() == CPURegister::kSRegister));
468 VIXL_ASSERT(IsRegister() && (rm_.GetType() == CPURegister::kDRegister));
503 VIXL_ASSERT(rm_.IsValid());
507 VIXL_ASSERT(IsRegister() && (rm_.GetType() == CPURegister::kQRegister));
645 VIXL_ASSERT(rn_.IsValid());
662 VIXL_ASSERT(rn_.IsValid());
672 VIXL_ASSERT(rn_.IsValid());
674 VIXL_ASSERT(offset >= 0);
689 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
703 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
723 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
724 VIXL_ASSERT(shift_.IsRRX());
739 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
740 VIXL_ASSERT(shift_.IsRRX());
762 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
783 VIXL_ASSERT(rn_.IsValid() && rm_.IsValid());
848 VIXL_ASSERT(shift_amount_ <= 31);
851 VIXL_ASSERT(shift_amount_ <= 31);
855 VIXL_ASSERT(shift_amount_ <= 32);
879 VIXL_ASSERT(addrmode != PreIndex);
887 VIXL_ASSERT(addrmode != PreIndex);