Lines Matching defs:shift_
57 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
59 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
66 : imm_(0), rm_(rm), shift_(LSL), amount_(0), rs_(NoReg) {
74 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(NoReg) {
76 VIXL_ASSERT(shift_.IsRRX());
84 : imm_(0), rm_(rm), shift_(shift), amount_(amount), rs_(NoReg) {
86 VIXL_ASSERT(!shift_.IsRRX());
88 switch (shift_.GetType()) {
112 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(rs) {
114 VIXL_ASSERT(!shift_.IsRRX());
145 return rm_.IsValid() && !shift_.IsRRX() && !rs_.IsValid() && (amount_ == 0);
175 return shift_;
189 return shift_.IsRRX() ? kRRXEncodedValue : shift_.GetValue();
217 Shift shift_;
642 shift_(LSL),
659 shift_(LSL),
669 shift_(LSL),
686 shift_(LSL),
700 shift_(LSL),
720 shift_(shift),
724 VIXL_ASSERT(shift_.IsRRX());
736 shift_(shift),
740 VIXL_ASSERT(shift_.IsRRX());
759 shift_(shift),
780 shift_(shift),
797 Shift GetShift() const { return shift_; }
809 return rm_.IsValid() && shift_.IsLSL() && (shift_amount_ == 0);
819 return (GetAddrMode() == Offset) && rm_.IsValid() && shift_.IsLSL() &&
826 return shift_.IsRRX() ? kRRXEncodedValue : shift_.GetValue();
831 bool IsShiftValid() const { return shift_.IsValidAmount(shift_amount_); }
839 if ((shift_amount_ == 0) && shift_.IsRRX()) return;
840 if ((shift_amount_ == 0) && !shift_.IsLSL()) {
846 switch (shift_.GetType()) {
868 Shift shift_;