Lines Matching refs:rn
1001 Register rn,
1008 Register rn,
1016 Register rn,
1029 Register rn,
1037 Register rn,
1042 Register rn,
1125 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1127 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1134 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1141 adc(cond, rd, rn, operand);
1143 void Adc(Register rd, Register rn, const Operand& operand) {
1144 Adc(al, rd, rn, operand);
1149 Register rn,
1153 Adc(cond, rd, rn, operand);
1156 Adcs(cond, rd, rn, operand);
1160 rn.Is(rd) && operand.IsPlainRegister() &&
1163 Adcs(cond, rd, rn, operand);
1165 Adc(cond, rd, rn, operand);
1172 Register rn,
1174 Adc(flags, al, rd, rn, operand);
1177 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1179 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1189 adcs(cond, rd, rn, operand);
1191 void Adcs(Register rd, Register rn, const Operand& operand) {
1192 Adcs(al, rd, rn, operand);
1195 void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1197 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1202 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1210 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1214 rd.IsLow() && rn.Is(rd)) ||
1217 ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1219 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1222 (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1226 (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1233 add(cond, rd, rn, operand);
1235 void Add(Register rd, Register rn, const Operand& operand) {
1236 Add(al, rd, rn, operand);
1241 Register rn,
1245 Add(cond, rd, rn, operand);
1248 Adds(cond, rd, rn, operand);
1253 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1254 !rd.Is(rn) && operand.GetBaseRegister().IsLow()) ||
1256 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1257 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1259 Adds(cond, rd, rn, operand);
1263 ((rd.IsLow() && rn.IsLow() &&
1265 (rd.IsLow() && rn.Is(rd) &&
1268 Subs(cond, rd, rn, -operand.GetSignedImmediate());
1270 Add(cond, rd, rn, operand);
1278 Register rn,
1280 Add(flags, al, rd, rn, operand);
1283 void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1295 adds(cond, rd, rn, operand);
1297 void Adds(Register rd, Register rn, const Operand& operand) {
1298 Adds(al, rd, rn, operand);
1301 void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1303 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1308 if (rd.Is(rn) && operand.IsPlainRegister() &&
1318 if ((immediate == 0xffffffff) && rd.Is(rn)) {
1324 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1331 and_(cond, rd, rn, operand);
1333 void And(Register rd, Register rn, const Operand& operand) {
1334 And(al, rd, rn, operand);
1339 Register rn,
1343 And(cond, rd, rn, operand);
1346 Ands(cond, rd, rn, operand);
1349 if (operand.IsPlainRegister() && rd.Is(rn) &&
1354 rn.Is(rd) && operand.IsPlainRegister() &&
1357 Ands(cond, rd, rn, operand);
1359 And(cond, rd, rn, operand);
1366 Register rn,
1368 And(flags, al, rd, rn, operand);
1371 void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1373 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1383 ands(cond, rd, rn, operand);
1385 void Ands(Register rd, Register rn, const Operand& operand) {
1386 Ands(al, rd, rn, operand);
1506 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
1508 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1517 bfi(cond, rd, rn, lsb, width);
1519 void Bfi(Register rd, Register rn, uint32_t lsb, uint32_t width) {
1520 Bfi(al, rd, rn, lsb, width);
1523 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1532 if ((immediate == 0) && rd.Is(rn)) {
1542 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1549 bic(cond, rd, rn, operand);
1551 void Bic(Register rd, Register rn, const Operand& operand) {
1552 Bic(al, rd, rn, operand);
1557 Register rn,
1561 Bic(cond, rd, rn, operand);
1564 Bics(cond, rd, rn, operand);
1568 rn.Is(rd) && operand.IsPlainRegister() &&
1571 Bics(cond, rd, rn, operand);
1573 Bic(cond, rd, rn, operand);
1580 Register rn,
1582 Bic(flags, al, rd, rn, operand);
1585 void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1587 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1597 bics(cond, rd, rn, operand);
1599 void Bics(Register rd, Register rn, const Operand& operand) {
1600 Bics(al, rd, rn, operand);
1712 void Cbnz(Register rn, Label* label) {
1713 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1720 bool can_encode = cbnz_info(rn, label, &info);
1727 cbnz(rn, label);
1731 void Cbz(Register rn, Label* label) {
1732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1739 bool can_encode = cbz_info(rn, label, &info);
1746 cbz(rn, label);
1778 void Cmn(Condition cond, Register rn, const Operand& operand) {
1779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1786 operand.IsPlainRegister() && rn.IsLow() &&
1793 cmn(cond, rn, operand);
1795 void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1797 void Cmp(Condition cond, Register rn, const Operand& operand) {
1798 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1806 rn.IsLow()) ||
1808 (operand.IsPlainRegister() && !rn.IsPC() &&
1815 cmp(cond, rn, operand);
1817 void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1819 void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1821 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1831 crc32b(cond, rd, rn, rm);
1833 void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1835 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1847 crc32cb(cond, rd, rn, rm);
1849 void Crc32cb(Register rd, Register rn, Register rm) {
1850 Crc32cb(al, rd, rn, rm);
1853 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1855 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1865 crc32ch(cond, rd, rn, rm);
1867 void Crc32ch(Register rd, Register rn, Register rm) {
1868 Crc32ch(al, rd, rn, rm);
1871 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1883 crc32cw(cond, rd, rn, rm);
1885 void Crc32cw(Register rd, Register rn, Register rm) {
1886 Crc32cw(al, rd, rn, rm);
1889 void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1891 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1901 crc32h(cond, rd, rn, rm);
1903 void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1905 void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1917 crc32w(cond, rd, rn, rm);
1919 void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1947 void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1954 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1960 mvn(rd, rn);
1966 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1973 eor(cond, rd, rn, operand);
1975 void Eor(Register rd, Register rn, const Operand& operand) {
1976 Eor(al, rd, rn, operand);
1981 Register rn,
1985 Eor(cond, rd, rn, operand);
1988 Eors(cond, rd, rn, operand);
1992 rn.Is(rd) && operand.IsPlainRegister() &&
1995 Eors(cond, rd, rn, operand);
1997 Eor(cond, rd, rn, operand);
2004 Register rn,
2006 Eor(flags, al, rd, rn, operand);
2009 void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
2011 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2021 eors(cond, rd, rn, operand);
2023 void Eors(Register rd, Register rn, const Operand& operand) {
2024 Eors(al, rd, rn, operand);
2028 Register rn,
2031 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2041 fldmdbx(cond, rn, write_back, dreglist);
2043 void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
2044 Fldmdbx(al, rn, write_back, dreglist);
2048 Register rn,
2051 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2061 fldmiax(cond, rn, write_back, dreglist);
2063 void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
2064 Fldmiax(al, rn, write_back, dreglist);
2068 Register rn,
2071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2081 fstmdbx(cond, rn, write_back, dreglist);
2083 void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
2084 Fstmdbx(al, rn, write_back, dreglist);
2088 Register rn,
2091 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2101 fstmiax(cond, rn, write_back, dreglist);
2103 void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
2104 Fstmiax(al, rn, write_back, dreglist);
2262 Register rn,
2265 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2275 ldm(cond, rn, write_back, registers);
2277 void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
2278 Ldm(al, rn, write_back, registers);
2282 Register rn,
2285 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2295 ldmda(cond, rn, write_back, registers);
2297 void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
2298 Ldmda(al, rn, write_back, registers);
2302 Register rn,
2305 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2315 ldmdb(cond, rn, write_back, registers);
2317 void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
2318 Ldmdb(al, rn, write_back, registers);
2322 Register rn,
2325 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2335 ldmea(cond, rn, write_back, registers);
2337 void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2338 Ldmea(al, rn, write_back, registers);
2342 Register rn,
2345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2355 ldmed(cond, rn, write_back, registers);
2357 void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2358 Ldmed(al, rn, write_back, registers);
2362 Register rn,
2365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2375 ldmfa(cond, rn, write_back, registers);
2377 void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2378 Ldmfa(al, rn, write_back, registers);
2382 Register rn,
2385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2395 ldmfd(cond, rn, write_back, registers);
2397 void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2398 Ldmfd(al, rn, write_back, registers);
2402 Register rn,
2405 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2415 ldmib(cond, rn, write_back, registers);
2417 void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2418 Ldmib(al, rn, write_back, registers);
2793 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2795 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2806 mla(cond, rd, rn, rm, ra);
2808 void Mla(Register rd, Register rn, Register rm, Register ra) {
2809 Mla(al, rd, rn, rm, ra);
2814 Register rn,
2819 Mla(cond, rd, rn, rm, ra);
2822 Mlas(cond, rd, rn, rm, ra);
2825 Mla(cond, rd, rn, rm, ra);
2830 FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2831 Mla(flags, al, rd, rn, rm, ra);
2835 Condition cond, Register rd, Register rn, Register rm, Register ra) {
2837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2848 mlas(cond, rd, rn, rm, ra);
2850 void Mlas(Register rd, Register rn, Register rm, Register ra) {
2851 Mlas(al, rd, rn, rm, ra);
2854 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2867 mls(cond, rd, rn, rm, ra);
2869 void Mls(Register rd, Register rn, Register rm, Register ra) {
2870 Mls(al, rd, rn, rm, ra);
3016 void Mul(Condition cond, Register rd, Register rn, Register rm) {
3018 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3025 rd.Is(rm) && rn.IsLow() && rm.IsLow();
3031 mul(cond, rd, rn, rm);
3033 void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
3037 Register rn,
3041 Mul(cond, rd, rn, rm);
3044 Muls(cond, rd, rn, rm);
3048 rn.IsLow() && rm.Is(rd);
3050 Muls(cond, rd, rn, rm);
3052 Mul(cond, rd, rn, rm);
3057 void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
3058 Mul(flags, al, rd, rn, rm);
3061 void Muls(Condition cond, Register rd, Register rn, Register rm) {
3063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3073 muls(cond, rd, rn, rm);
3075 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
3150 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
3152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3163 if ((immediate == 0xffffffff) && rd.Is(rn)) {
3172 orn(cond, rd, rn, operand);
3174 void Orn(Register rd, Register rn, const Operand& operand) {
3175 Orn(al, rd, rn, operand);
3180 Register rn,
3184 Orn(cond, rd, rn, operand);
3187 Orns(cond, rd, rn, operand);
3190 Orn(cond, rd, rn, operand);
3196 Register rn,
3198 Orn(flags, al, rd, rn, operand);
3201 void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
3203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3213 orns(cond, rd, rn, operand);
3215 void Orns(Register rd, Register rn, const Operand& operand) {
3216 Orns(al, rd, rn, operand);
3219 void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
3221 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3226 if (rd.Is(rn) && operand.IsPlainRegister() &&
3232 if ((immediate == 0) && rd.Is(rn)) {
3242 operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
3249 orr(cond, rd, rn, operand);
3251 void Orr(Register rd, Register rn, const Operand& operand) {
3252 Orr(al, rd, rn, operand);
3257 Register rn,
3261 Orr(cond, rd, rn, operand);
3264 Orrs(cond, rd, rn, operand);
3267 if (operand.IsPlainRegister() && rd.Is(rn) &&
3272 rn.Is(rd) && operand.IsPlainRegister() &&
3275 Orrs(cond, rd, rn, operand);
3277 Orr(cond, rd, rn, operand);
3284 Register rn,
3286 Orr(flags, al, rd, rn, operand);
3289 void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
3291 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3301 orrs(cond, rd, rn, operand);
3303 void Orrs(Register rd, Register rn, const Operand& operand) {
3304 Orrs(al, rd, rn, operand);
3307 void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
3309 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3319 pkhbt(cond, rd, rn, operand);
3321 void Pkhbt(Register rd, Register rn, const Operand& operand) {
3322 Pkhbt(al, rd, rn, operand);
3325 void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
3327 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3337 pkhtb(cond, rd, rn, operand);
3339 void Pkhtb(Register rd, Register rn, const Operand& operand) {
3340 Pkhtb(al, rd, rn, operand);
3458 void Qadd(Condition cond, Register rd, Register rm, Register rn) {
3461 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3470 qadd(cond, rd, rm, rn);
3472 void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
3474 void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
3476 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3486 qadd16(cond, rd, rn, rm);
3488 void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
3490 void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
3492 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3502 qadd8(cond, rd, rn, rm);
3504 void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
3506 void Qasx(Condition cond, Register rd, Register rn, Register rm) {
3508 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3518 qasx(cond, rd, rn, rm);
3520 void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3522 void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3525 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3534 qdadd(cond, rd, rm, rn);
3536 void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3538 void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3541 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3550 qdsub(cond, rd, rm, rn);
3552 void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3554 void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3566 qsax(cond, rd, rn, rm);
3568 void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3570 void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3582 qsub(cond, rd, rm, rn);
3584 void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3586 void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3598 qsub16(cond, rd, rn, rm);
3600 void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3602 void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3604 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3614 qsub8(cond, rd, rn, rm);
3616 void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3794 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3796 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3803 operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3810 rsb(cond, rd, rn, operand);
3812 void Rsb(Register rd, Register rn, const Operand& operand) {
3813 Rsb(al, rd, rn, operand);
3818 Register rn,
3822 Rsb(cond, rd, rn, operand);
3825 Rsbs(cond, rd, rn, operand);
3829 rn.IsLow() && operand.IsImmediate() &&
3832 Rsbs(cond, rd, rn, operand);
3834 Rsb(cond, rd, rn, operand);
3841 Register rn,
3843 Rsb(flags, al, rd, rn, operand);
3846 void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3848 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3858 rsbs(cond, rd, rn, operand);
3860 void Rsbs(Register rd, Register rn, const Operand& operand) {
3861 Rsbs(al, rd, rn, operand);
3864 void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3876 rsc(cond, rd, rn, operand);
3878 void Rsc(Register rd, Register rn, const Operand& operand) {
3879 Rsc(al, rd, rn, operand);
3884 Register rn,
3888 Rsc(cond, rd, rn, operand);
3891 Rscs(cond, rd, rn, operand);
3894 Rsc(cond, rd, rn, operand);
3900 Register rn,
3902 Rsc(flags, al, rd, rn, operand);
3905 void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3907 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3917 rscs(cond, rd, rn, operand);
3919 void Rscs(Register rd, Register rn, const Operand& operand) {
3920 Rscs(al, rd, rn, operand);
3923 void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3925 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3935 sadd16(cond, rd, rn, rm);
3937 void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3939 void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3951 sadd8(cond, rd, rn, rm);
3953 void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3955 void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3957 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3967 sasx(cond, rd, rn, rm);
3969 void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3971 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3980 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3987 sbc(cond, rd, rn, operand);
3989 void Sbc(Register rd, Register rn, const Operand& operand) {
3990 Sbc(al, rd, rn, operand);
3995 Register rn,
3999 Sbc(cond, rd, rn, operand);
4002 Sbcs(cond, rd, rn, operand);
4006 rn.Is(rd) && operand.IsPlainRegister() &&
4009 Sbcs(cond, rd, rn, operand);
4011 Sbc(cond, rd, rn, operand);
4018 Register rn,
4020 Sbc(flags, al, rd, rn, operand);
4023 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
4025 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4035 sbcs(cond, rd, rn, operand);
4037 void Sbcs(Register rd, Register rn, const Operand& operand) {
4038 Sbcs(al, rd, rn, operand);
4042 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
4044 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4053 sbfx(cond, rd, rn, lsb, width);
4055 void Sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width) {
4056 Sbfx(al, rd, rn, lsb, width);
4059 void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
4061 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4071 sdiv(cond, rd, rn, rm);
4073 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
4075 void Sel(Condition cond, Register rd, Register rn, Register rm) {
4077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4087 sel(cond, rd, rn, rm);
4089 void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
4091 void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
4093 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4103 shadd16(cond, rd, rn, rm);
4105 void Shadd16(Register rd, Register rn, Register rm) {
4106 Shadd16(al, rd, rn, rm);
4109 void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
4111 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4121 shadd8(cond, rd, rn, rm);
4123 void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
4125 void Shasx(Condition cond, Register rd, Register rn, Register rm) {
4127 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4137 shasx(cond, rd, rn, rm);
4139 void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
4141 void Shsax(Condition cond, Register rd, Register rn, Register rm) {
4143 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4153 shsax(cond, rd, rn, rm);
4155 void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
4157 void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
4159 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4169 shsub16(cond, rd, rn, rm);
4171 void Shsub16(Register rd, Register rn, Register rm) {
4172 Shsub16(al, rd, rn, rm);
4175 void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
4177 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4187 shsub8(cond, rd, rn, rm);
4189 void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
4192 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4194 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4205 smlabb(cond, rd, rn, rm, ra);
4207 void Smlabb(Register rd, Register rn, Register rm, Register ra) {
4208 Smlabb(al, rd, rn, rm, ra);
4212 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4214 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4225 smlabt(cond, rd, rn, rm, ra);
4227 void Smlabt(Register rd, Register rn, Register rm, Register ra) {
4228 Smlabt(al, rd, rn, rm, ra);
4232 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4234 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4245 smlad(cond, rd, rn, rm, ra);
4247 void Smlad(Register rd, Register rn, Register rm, Register ra) {
4248 Smlad(al, rd, rn, rm, ra);
4252 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4254 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4265 smladx(cond, rd, rn, rm, ra);
4267 void Smladx(Register rd, Register rn, Register rm, Register ra) {
4268 Smladx(al, rd, rn, rm, ra);
4272 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4285 smlal(cond, rdlo, rdhi, rn, rm);
4287 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4288 Smlal(al, rdlo, rdhi, rn, rm);
4292 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4305 smlalbb(cond, rdlo, rdhi, rn, rm);
4307 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
4308 Smlalbb(al, rdlo, rdhi, rn, rm);
4312 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4325 smlalbt(cond, rdlo, rdhi, rn, rm);
4327 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
4328 Smlalbt(al, rdlo, rdhi, rn, rm);
4332 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4335 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4345 smlald(cond, rdlo, rdhi, rn, rm);
4347 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
4348 Smlald(al, rdlo, rdhi, rn, rm);
4352 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4355 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4365 smlaldx(cond, rdlo, rdhi, rn, rm);
4367 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4368 Smlaldx(al, rdlo, rdhi, rn, rm);
4372 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4375 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4385 smlals(cond, rdlo, rdhi, rn, rm);
4387 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
4388 Smlals(al, rdlo, rdhi, rn, rm);
4392 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4395 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4405 smlaltb(cond, rdlo, rdhi, rn, rm);
4407 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
4408 Smlaltb(al, rdlo, rdhi, rn, rm);
4412 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4425 smlaltt(cond, rdlo, rdhi, rn, rm);
4427 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
4428 Smlaltt(al, rdlo, rdhi, rn, rm);
4432 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4434 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4445 smlatb(cond, rd, rn, rm, ra);
4447 void Smlatb(Register rd, Register rn, Register rm, Register ra) {
4448 Smlatb(al, rd, rn, rm, ra);
4452 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4454 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4465 smlatt(cond, rd, rn, rm, ra);
4467 void Smlatt(Register rd, Register rn, Register rm, Register ra) {
4468 Smlatt(al, rd, rn, rm, ra);
4472 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4474 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4485 smlawb(cond, rd, rn, rm, ra);
4487 void Smlawb(Register rd, Register rn, Register rm, Register ra) {
4488 Smlawb(al, rd, rn, rm, ra);
4492 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4505 smlawt(cond, rd, rn, rm, ra);
4507 void Smlawt(Register rd, Register rn, Register rm, Register ra) {
4508 Smlawt(al, rd, rn, rm, ra);
4512 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4514 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4525 smlsd(cond, rd, rn, rm, ra);
4527 void Smlsd(Register rd, Register rn, Register rm, Register ra) {
4528 Smlsd(al, rd, rn, rm, ra);
4532 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4545 smlsdx(cond, rd, rn, rm, ra);
4547 void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
4548 Smlsdx(al, rd, rn, rm, ra);
4552 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4555 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4565 smlsld(cond, rdlo, rdhi, rn, rm);
4567 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
4568 Smlsld(al, rdlo, rdhi, rn, rm);
4572 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4575 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4585 smlsldx(cond, rdlo, rdhi, rn, rm);
4587 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4588 Smlsldx(al, rdlo, rdhi, rn, rm);
4592 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4594 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4605 smmla(cond, rd, rn, rm, ra);
4607 void Smmla(Register rd, Register rn, Register rm, Register ra) {
4608 Smmla(al, rd, rn, rm, ra);
4612 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4625 smmlar(cond, rd, rn, rm, ra);
4627 void Smmlar(Register rd, Register rn, Register rm, Register ra) {
4628 Smmlar(al, rd, rn, rm, ra);
4632 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4634 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4645 smmls(cond, rd, rn, rm, ra);
4647 void Smmls(Register rd, Register rn, Register rm, Register ra) {
4648 Smmls(al, rd, rn, rm, ra);
4652 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4654 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4665 smmlsr(cond, rd, rn, rm, ra);
4667 void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
4668 Smmlsr(al, rd, rn, rm, ra);
4671 void Smmul(Condition cond, Register rd, Register rn, Register rm) {
4673 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4683 smmul(cond, rd, rn, rm);
4685 void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
4687 void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
4689 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4699 smmulr(cond, rd, rn, rm);
4701 void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
4703 void Smuad(Condition cond, Register rd, Register rn, Register rm) {
4705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4715 smuad(cond, rd, rn, rm);
4717 void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
4719 void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
4721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4731 smuadx(cond, rd, rn, rm);
4733 void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
4735 void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
4737 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4747 smulbb(cond, rd, rn, rm);
4749 void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
4751 void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
4753 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4763 smulbt(cond, rd, rn, rm);
4765 void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4768 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4771 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4781 smull(cond, rdlo, rdhi, rn, rm);
4783 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4784 Smull(al, rdlo, rdhi, rn, rm);
4790 Register rn,
4794 Smull(cond, rdlo, rdhi, rn, rm);
4797 Smulls(cond, rdlo, rdhi, rn, rm);
4800 Smull(cond, rdlo, rdhi, rn, rm);
4807 Register rn,
4809 Smull(flags, al, rdlo, rdhi, rn, rm);
4813 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4826 smulls(cond, rdlo, rdhi, rn, rm);
4828 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4829 Smulls(al, rdlo, rdhi, rn, rm);
4832 void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4834 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4844 smultb(cond, rd, rn, rm);
4846 void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4848 void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4850 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4860 smultt(cond, rd, rn, rm);
4862 void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4864 void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4866 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4876 smulwb(cond, rd, rn, rm);
4878 void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4880 void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4892 smulwt(cond, rd, rn, rm);
4894 void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4896 void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4898 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4908 smusd(cond, rd, rn, rm);
4910 void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4912 void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4914 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4924 smusdx(cond, rd, rn, rm);
4926 void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4945 void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4956 ssat16(cond, rd, imm, rn);
4958 void Ssat16(Register rd, uint32_t imm, Register rn) {
4959 Ssat16(al, rd, imm, rn);
4962 void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4964 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4974 ssax(cond, rd, rn, rm);
4976 void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4978 void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4980 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4990 ssub16(cond, rd, rn, rm);
4992 void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4994 void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4996 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5006 ssub8(cond, rd, rn, rm);
5008 void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
5145 Register rn,
5148 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5158 stm(cond, rn, write_back, registers);
5160 void Stm(Register rn, WriteBack write_back, RegisterList registers) {
5161 Stm(al, rn, write_back, registers);
5165 Register rn,
5168 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5178 stmda(cond, rn, write_back, registers);
5180 void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
5181 Stmda(al, rn, write_back, registers);
5185 Register rn,
5188 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5198 stmdb(cond, rn, write_back, registers);
5200 void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
5201 Stmdb(al, rn, write_back, registers);
5205 Register rn,
5208 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5218 stmea(cond, rn, write_back, registers);
5220 void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
5221 Stmea(al, rn, write_back, registers);
5225 Register rn,
5228 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5238 stmed(cond, rn, write_back, registers);
5240 void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
5241 Stmed(al, rn, write_back, registers);
5245 Register rn,
5248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5258 stmfa(cond, rn, write_back, registers);
5260 void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
5261 Stmfa(al, rn, write_back, registers);
5265 Register rn,
5268 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5278 stmfd(cond, rn, write_back, registers);
5280 void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
5281 Stmfd(al, rn, write_back, registers);
5285 Register rn,
5288 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5298 stmib(cond, rn, write_back, registers);
5300 void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
5301 Stmib(al, rn, write_back, registers);
5497 void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
5499 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5504 if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
5512 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
5516 rd.IsLow() && rn.Is(rd)) ||
5518 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
5525 sub(cond, rd, rn, operand);
5527 void Sub(Register rd, Register rn, const Operand& operand) {
5528 Sub(al, rd, rn, operand);
5533 Register rn,
5537 Sub(cond, rd, rn, operand);
5540 Subs(cond, rd, rn, operand);
5545 ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
5548 ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
5549 (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
5551 Subs(cond, rd, rn, operand);
5555 ((rd.IsLow() && rn.IsLow() &&
5557 (rd.IsLow() && rn.Is(rd) &&
5560 Adds(cond, rd, rn, -operand.GetSignedImmediate());
5562 Sub(cond, rd, rn, operand);
5570 Register rn,
5572 Sub(flags, al, rd, rn, operand);
5575 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
5577 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5587 subs(cond, rd, rn, operand);
5589 void Subs(Register rd, Register rn, const Operand& operand) {
5590 Subs(al, rd, rn, operand);
5606 void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5618 sxtab(cond, rd, rn, operand);
5620 void Sxtab(Register rd, Register rn, const Operand& operand) {
5621 Sxtab(al, rd, rn, operand);
5626 Register rn,
5629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5639 sxtab16(cond, rd, rn, operand);
5641 void Sxtab16(Register rd, Register rn, const Operand& operand) {
5642 Sxtab16(al, rd, rn, operand);
5645 void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5647 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5657 sxtah(cond, rd, rn, operand);
5659 void Sxtah(Register rd, Register rn, const Operand& operand) {
5660 Sxtah(al, rd, rn, operand);
5708 void Teq(Condition cond, Register rn, const Operand& operand) {
5709 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5719 teq(cond, rn, operand);
5721 void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
5723 void Tst(Condition cond, Register rn, const Operand& operand) {
5724 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5731 operand.IsPlainRegister() && rn.IsLow() &&
5738 tst(cond, rn, operand);
5740 void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
5742 void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
5744 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5754 uadd16(cond, rd, rn, rm);
5756 void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
5758 void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
5760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5770 uadd8(cond, rd, rn, rm);
5772 void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
5774 void Uasx(Condition cond, Register rd, Register rn, Register rm) {
5776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5786 uasx(cond, rd, rn, rm);
5788 void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
5791 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
5793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5802 ubfx(cond, rd, rn, lsb, width);
5804 void Ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width) {
5805 Ubfx(al, rd, rn, lsb, width);
5821 void Udiv(Condition cond, Register rd, Register rn, Register rm) {
5823 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5833 udiv(cond, rd, rn, rm);
5835 void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
5837 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
5839 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5849 uhadd16(cond, rd, rn, rm);
5851 void Uhadd16(Register rd, Register rn, Register rm) {
5852 Uhadd16(al, rd, rn, rm);
5855 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
5857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5867 uhadd8(cond, rd, rn, rm);
5869 void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
5871 void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
5873 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5883 uhasx(cond, rd, rn, rm);
5885 void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
5887 void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
5889 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5899 uhsax(cond, rd, rn, rm);
5901 void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
5903 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
5905 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5915 uhsub16(cond, rd, rn, rm);
5917 void Uhsub16(Register rd, Register rn, Register rm) {
5918 Uhsub16(al, rd, rn, rm);
5921 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
5923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5933 uhsub8(cond, rd, rn, rm);
5935 void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
5938 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5941 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5951 umaal(cond, rdlo, rdhi, rn, rm);
5953 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5954 Umaal(al, rdlo, rdhi, rn, rm);
5958 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5961 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5971 umlal(cond, rdlo, rdhi, rn, rm);
5973 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5974 Umlal(al, rdlo, rdhi, rn, rm);
5980 Register rn,
5984 Umlal(cond, rdlo, rdhi, rn, rm);
5987 Umlals(cond, rdlo, rdhi, rn, rm);
5990 Umlal(cond, rdlo, rdhi, rn, rm);
5997 Register rn,
5999 Umlal(flags, al, rdlo, rdhi, rn, rm);
6003 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6006 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6016 umlals(cond, rdlo, rdhi, rn, rm);
6018 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
6019 Umlals(al, rdlo, rdhi, rn, rm);
6023 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6026 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6036 umull(cond, rdlo, rdhi, rn, rm);
6038 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
6039 Umull(al, rdlo, rdhi, rn, rm);
6045 Register rn,
6049 Umull(cond, rdlo, rdhi, rn, rm);
6052 Umulls(cond, rdlo, rdhi, rn, rm);
6055 Umull(cond, rdlo, rdhi, rn, rm);
6062 Register rn,
6064 Umull(flags, al, rdlo, rdhi, rn, rm);
6068 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6071 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6081 umulls(cond, rdlo, rdhi, rn, rm);
6083 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
6084 Umulls(al, rdlo, rdhi, rn, rm);
6087 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
6089 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6099 uqadd16(cond, rd, rn, rm);
6101 void Uqadd16(Register rd, Register rn, Register rm) {
6102 Uqadd16(al, rd, rn, rm);
6105 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
6107 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6117 uqadd8(cond, rd, rn, rm);
6119 void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
6121 void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
6123 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6133 uqasx(cond, rd, rn, rm);
6135 void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
6137 void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
6139 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6149 uqsax(cond, rd, rn, rm);
6151 void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
6153 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
6155 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6165 uqsub16(cond, rd, rn, rm);
6167 void Uqsub16(Register rd, Register rn, Register rm) {
6168 Uqsub16(al, rd, rn, rm);
6171 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
6173 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6183 uqsub8(cond, rd, rn, rm);
6185 void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
6187 void Usad8(Condition cond, Register rd, Register rn, Register rm) {
6189 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6199 usad8(cond, rd, rn, rm);
6201 void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
6204 Condition cond, Register rd, Register rn, Register rm, Register ra) {
6206 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6217 usada8(cond, rd, rn, rm, ra);
6219 void Usada8(Register rd, Register rn, Register rm, Register ra) {
6220 Usada8(al, rd, rn, rm, ra);
6240 void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
6242 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6251 usat16(cond, rd, imm, rn);
6253 void Usat16(Register rd, uint32_t imm, Register rn) {
6254 Usat16(al, rd, imm, rn);
6257 void Usax(Condition cond, Register rd, Register rn, Register rm) {
6259 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6269 usax(cond, rd, rn, rm);
6271 void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
6273 void Usub16(Condition cond, Register rd, Register rn, Register rm) {
6275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6285 usub16(cond, rd, rn, rm);
6287 void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
6289 void Usub8(Condition cond, Register rd, Register rn, Register rm) {
6291 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6301 usub8(cond, rd, rn, rm);
6303 void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
6305 void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
6307 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6317 uxtab(cond, rd, rn, operand);
6319 void Uxtab(Register rd, Register rn, const Operand& operand) {
6320 Uxtab(al, rd, rn, operand);
6325 Register rn,
6328 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6338 uxtab16(cond, rd, rn, operand);
6340 void Uxtab16(Register rd, Register rn, const Operand& operand) {
6341 Uxtab16(al, rd, rn, operand);
6344 void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
6346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6356 uxtah(cond, rd, rn, operand);
6358 void Uxtah(Register rd, Register rn, const Operand& operand) {
6359 Uxtah(al, rd, rn, operand);
6408 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6410 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6420 vaba(cond, dt, rd, rn, rm);
6422 void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6423 Vaba(al, dt, rd, rn, rm);
6427 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6429 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6439 vaba(cond, dt, rd, rn, rm);
6441 void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6442 Vaba(al, dt, rd, rn, rm);
6446 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6458 vabal(cond, dt, rd, rn, rm);
6460 void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6461 Vabal(al, dt, rd, rn, rm);
6465 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6467 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6477 vabd(cond, dt, rd, rn, rm);
6479 void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6480 Vabd(al, dt, rd, rn, rm);
6484 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6486 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6496 vabd(cond, dt, rd, rn, rm);
6498 void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6499 Vabd(al, dt, rd, rn, rm);
6503 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6505 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6515 vabdl(cond, dt, rd, rn, rm);
6517 void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6518 Vabdl(al, dt, rd, rn, rm);
6567 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6569 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6579 vacge(cond, dt, rd, rn, rm);
6581 void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6582 Vacge(al, dt, rd, rn, rm);
6586 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6588 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6598 vacge(cond, dt, rd, rn, rm);
6600 void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6601 Vacge(al, dt, rd, rn, rm);
6605 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6607 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6617 vacgt(cond, dt, rd, rn, rm);
6619 void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6620 Vacgt(al, dt, rd, rn, rm);
6624 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6636 vacgt(cond, dt, rd, rn, rm);
6638 void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6639 Vacgt(al, dt, rd, rn, rm);
6643 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6645 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6655 vacle(cond, dt, rd, rn, rm);
6657 void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6658 Vacle(al, dt, rd, rn, rm);
6662 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6674 vacle(cond, dt, rd, rn, rm);
6676 void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6677 Vacle(al, dt, rd, rn, rm);
6681 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6683 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6693 vaclt(cond, dt, rd, rn, rm);
6695 void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6696 Vaclt(al, dt, rd, rn, rm);
6700 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6702 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6712 vaclt(cond, dt, rd, rn, rm);
6714 void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6715 Vaclt(al, dt, rd, rn, rm);
6719 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6731 vadd(cond, dt, rd, rn, rm);
6733 void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6734 Vadd(al, dt, rd, rn, rm);
6738 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6750 vadd(cond, dt, rd, rn, rm);
6752 void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6753 Vadd(al, dt, rd, rn, rm);
6757 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6769 vadd(cond, dt, rd, rn, rm);
6771 void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6772 Vadd(al, dt, rd, rn, rm);
6776 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
6778 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6788 vaddhn(cond, dt, rd, rn, rm);
6790 void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
6791 Vaddhn(al, dt, rd, rn, rm);
6795 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6797 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6807 vaddl(cond, dt, rd, rn, rm);
6809 void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6810 Vaddl(al, dt, rd, rn, rm);
6814 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
6816 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6826 vaddw(cond, dt, rd, rn, rm);
6828 void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
6829 Vaddw(al, dt, rd, rn, rm);
6835 DRegister rn,
6838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6848 vand(cond, dt, rd, rn, operand);
6850 void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
6851 Vand(al, dt, rd, rn, operand);
6857 QRegister rn,
6860 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6870 vand(cond, dt, rd, rn, operand);
6872 void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
6873 Vand(al, dt, rd, rn, operand);
6879 DRegister rn,
6882 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6892 vbic(cond, dt, rd, rn, operand);
6894 void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
6895 Vbic(al, dt, rd, rn, operand);
6901 QRegister rn,
6904 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6914 vbic(cond, dt, rd, rn, operand);
6916 void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
6917 Vbic(al, dt, rd, rn, operand);
6921 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6923 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6933 vbif(cond, dt, rd, rn, rm);
6935 void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6936 Vbif(al, dt, rd, rn, rm);
6938 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6939 Vbif(cond, kDataTypeValueNone, rd, rn, rm);
6941 void Vbif(DRegister rd, DRegister rn, DRegister rm) {
6942 Vbif(al, kDataTypeValueNone, rd, rn, rm);
6946 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6948 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6958 vbif(cond, dt, rd, rn, rm);
6960 void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6961 Vbif(al, dt, rd, rn, rm);
6963 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6964 Vbif(cond, kDataTypeValueNone, rd, rn, rm);
6966 void Vbif(QRegister rd, QRegister rn, QRegister rm) {
6967 Vbif(al, kDataTypeValueNone, rd, rn, rm);
6971 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6983 vbit(cond, dt, rd, rn, rm);
6985 void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6986 Vbit(al, dt, rd, rn, rm);
6988 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6989 Vbit(cond, kDataTypeValueNone, rd, rn, rm);
6991 void Vbit(DRegister rd, DRegister rn, DRegister rm) {
6992 Vbit(al, kDataTypeValueNone, rd, rn, rm);
6996 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6998 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7008 vbit(cond, dt, rd, rn, rm);
7010 void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7011 Vbit(al, dt, rd, rn, rm);
7013 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
7014 Vbit(cond, kDataTypeValueNone, rd, rn, rm);
7016 void Vbit(QRegister rd, QRegister rn, QRegister rm) {
7017 Vbit(al, kDataTypeValueNone, rd, rn, rm);
7021 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7023 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7033 vbsl(cond, dt, rd, rn, rm);
7035 void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7036 Vbsl(al, dt, rd, rn, rm);
7038 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
7039 Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
7041 void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
7042 Vbsl(al, kDataTypeValueNone, rd, rn, rm);
7046 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7048 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7058 vbsl(cond, dt, rd, rn, rm);
7060 void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7061 Vbsl(al, dt, rd, rn, rm);
7063 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
7064 Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
7066 void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
7067 Vbsl(al, kDataTypeValueNone, rd, rn, rm);
7115 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7117 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7127 vceq(cond, dt, rd, rn, rm);
7129 void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7130 Vceq(al, dt, rd, rn, rm);
7134 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7146 vceq(cond, dt, rd, rn, rm);
7148 void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7149 Vceq(al, dt, rd, rn, rm);
7197 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7199 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7209 vcge(cond, dt, rd, rn, rm);
7211 void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7212 Vcge(al, dt, rd, rn, rm);
7216 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7218 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7228 vcge(cond, dt, rd, rn, rm);
7230 void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7231 Vcge(al, dt, rd, rn, rm);
7279 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7281 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7291 vcgt(cond, dt, rd, rn, rm);
7293 void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7294 Vcgt(al, dt, rd, rn, rm);
7298 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7300 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7310 vcgt(cond, dt, rd, rn, rm);
7312 void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7313 Vcgt(al, dt, rd, rn, rm);
7361 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7363 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7373 vcle(cond, dt, rd, rn, rm);
7375 void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7376 Vcle(al, dt, rd, rn, rm);
7380 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7392 vcle(cond, dt, rd, rn, rm);
7394 void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7395 Vcle(al, dt, rd, rn, rm);
7473 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7485 vclt(cond, dt, rd, rn, rm);
7487 void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7488 Vclt(al, dt, rd, rn, rm);
7492 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7494 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7504 vclt(cond, dt, rd, rn, rm);
7506 void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7507 Vclt(al, dt, rd, rn, rm);
8134 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8136 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8146 vdiv(cond, dt, rd, rn, rm);
8148 void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8149 Vdiv(al, dt, rd, rn, rm);
8153 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8155 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8165 vdiv(cond, dt, rd, rn, rm);
8167 void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8168 Vdiv(al, dt, rd, rn, rm);
8236 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8238 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8248 veor(cond, dt, rd, rn, rm);
8250 void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8251 Veor(al, dt, rd, rn, rm);
8253 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
8254 Veor(cond, kDataTypeValueNone, rd, rn, rm);
8256 void Veor(DRegister rd, DRegister rn, DRegister rm) {
8257 Veor(al, kDataTypeValueNone, rd, rn, rm);
8261 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8263 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8273 veor(cond, dt, rd, rn, rm);
8275 void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8276 Veor(al, dt, rd, rn, rm);
8278 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
8279 Veor(cond, kDataTypeValueNone, rd, rn, rm);
8281 void Veor(QRegister rd, QRegister rn, QRegister rm) {
8282 Veor(al, kDataTypeValueNone, rd, rn, rm);
8288 DRegister rn,
8292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8303 vext(cond, dt, rd, rn, rm, operand);
8307 DRegister rn,
8310 Vext(al, dt, rd, rn, rm, operand);
8316 QRegister rn,
8320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8331 vext(cond, dt, rd, rn, rm, operand);
8335 QRegister rn,
8338 Vext(al, dt, rd, rn, rm, operand);
8342 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8344 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8354 vfma(cond, dt, rd, rn, rm);
8356 void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8357 Vfma(al, dt, rd, rn, rm);
8361 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8363 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8373 vfma(cond, dt, rd, rn, rm);
8375 void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8376 Vfma(al, dt, rd, rn, rm);
8380 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8382 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8392 vfma(cond, dt, rd, rn, rm);
8394 void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8395 Vfma(al, dt, rd, rn, rm);
8399 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8401 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8411 vfms(cond, dt, rd, rn, rm);
8413 void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8414 Vfms(al, dt, rd, rn, rm);
8418 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8420 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8430 vfms(cond, dt, rd, rn, rm);
8432 void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8433 Vfms(al, dt, rd, rn, rm);
8437 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8439 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8449 vfms(cond, dt, rd, rn, rm);
8451 void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8452 Vfms(al, dt, rd, rn, rm);
8456 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8458 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8468 vfnma(cond, dt, rd, rn, rm);
8470 void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8471 Vfnma(al, dt, rd, rn, rm);
8475 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8477 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8487 vfnma(cond, dt, rd, rn, rm);
8489 void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8490 Vfnma(al, dt, rd, rn, rm);
8494 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8496 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8506 vfnms(cond, dt, rd, rn, rm);
8508 void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8509 Vfnms(al, dt, rd, rn, rm);
8513 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8515 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8525 vfnms(cond, dt, rd, rn, rm);
8527 void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8528 Vfnms(al, dt, rd, rn, rm);
8532 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8544 vhadd(cond, dt, rd, rn, rm);
8546 void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8547 Vhadd(al, dt, rd, rn, rm);
8551 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8563 vhadd(cond, dt, rd, rn, rm);
8565 void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8566 Vhadd(al, dt, rd, rn, rm);
8570 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8582 vhsub(cond, dt, rd, rn, rm);
8584 void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8585 Vhsub(al, dt, rd, rn, rm);
8589 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8601 vhsub(cond, dt, rd, rn, rm);
8603 void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8604 Vhsub(al, dt, rd, rn, rm);
8719 Register rn,
8722 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8732 vldm(cond, dt, rn, write_back, dreglist);
8735 Register rn,
8738 Vldm(al, dt, rn, write_back, dreglist);
8741 Register rn,
8744 Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
8746 void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
8747 Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
8752 Register rn,
8755 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8765 vldm(cond, dt, rn, write_back, sreglist);
8768 Register rn,
8771 Vldm(al, dt, rn, write_back, sreglist);
8774 Register rn,
8777 Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
8779 void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
8780 Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
8785 Register rn,
8788 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8798 vldmdb(cond, dt, rn, write_back, dreglist);
8801 Register rn,
8804 Vldmdb(al, dt, rn, write_back, dreglist);
8807 Register rn,
8810 Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
8812 void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
8813 Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
8818 Register rn,
8821 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8831 vldmdb(cond, dt, rn, write_back, sreglist);
8834 Register rn,
8837 Vldmdb(al, dt, rn, write_back, sreglist);
8840 Register rn,
8843 Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
8845 void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
8846 Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
8851 Register rn,
8854 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8864 vldmia(cond, dt, rn, write_back, dreglist);
8867 Register rn,
8870 Vldmia(al, dt, rn, write_back, dreglist);
8873 Register rn,
8876 Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
8878 void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
8879 Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
8884 Register rn,
8887 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8897 vldmia(cond, dt, rn, write_back, sreglist);
8900 Register rn,
8903 Vldmia(al, dt, rn, write_back, sreglist);
8906 Register rn,
8909 Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
8911 void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
8912 Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
8970 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8982 vmax(cond, dt, rd, rn, rm);
8984 void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8985 Vmax(al, dt, rd, rn, rm);
8989 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9001 vmax(cond, dt, rd, rn, rm);
9003 void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9004 Vmax(al, dt, rd, rn, rm);
9007 void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9014 vmaxnm(dt, rd, rn, rm);
9017 void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9019 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9024 vmaxnm(dt, rd, rn, rm);
9027 void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9029 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9034 vmaxnm(dt, rd, rn, rm);
9038 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9040 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9050 vmin(cond, dt, rd, rn, rm);
9052 void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9053 Vmin(al, dt, rd, rn, rm);
9057 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9059 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9069 vmin(cond, dt, rd, rn, rm);
9071 void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9072 Vmin(al, dt, rd, rn, rm);
9075 void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9077 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9082 vminnm(dt, rd, rn, rm);
9085 void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9092 vminnm(dt, rd, rn, rm);
9095 void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9097 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9102 vminnm(dt, rd, rn, rm);
9108 DRegister rn,
9111 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9121 vmla(cond, dt, rd, rn, rm);
9123 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
9124 Vmla(al, dt, rd, rn, rm);
9130 QRegister rn,
9133 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9143 vmla(cond, dt, rd, rn, rm);
9145 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
9146 Vmla(al, dt, rd, rn, rm);
9150 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9152 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9162 vmla(cond, dt, rd, rn, rm);
9164 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9165 Vmla(al, dt, rd, rn, rm);
9169 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9171 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9181 vmla(cond, dt, rd, rn, rm);
9183 void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9184 Vmla(al, dt, rd, rn, rm);
9188 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9190 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9200 vmla(cond, dt, rd, rn, rm);
9202 void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9203 Vmla(al, dt, rd, rn, rm);
9209 DRegister rn,
9212 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9222 vmlal(cond, dt, rd, rn, rm);
9224 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
9225 Vmlal(al, dt, rd, rn, rm);
9229 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9231 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9241 vmlal(cond, dt, rd, rn, rm);
9243 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9244 Vmlal(al, dt, rd, rn, rm);
9250 DRegister rn,
9253 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9263 vmls(cond, dt, rd, rn, rm);
9265 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
9266 Vmls(al, dt, rd, rn, rm);
9272 QRegister rn,
9275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9285 vmls(cond, dt, rd, rn, rm);
9287 void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
9288 Vmls(al, dt, rd, rn, rm);
9292 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9294 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9304 vmls(cond, dt, rd, rn, rm);
9306 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9307 Vmls(al, dt, rd, rn, rm);
9311 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9313 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9323 vmls(cond, dt, rd, rn, rm);
9325 void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9326 Vmls(al, dt, rd, rn, rm);
9330 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9332 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9342 vmls(cond, dt, rd, rn, rm);
9344 void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9345 Vmls(al, dt, rd, rn, rm);
9351 DRegister rn,
9354 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9364 vmlsl(cond, dt, rd, rn, rm);
9366 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
9367 Vmlsl(al, dt, rd, rn, rm);
9371 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9373 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9383 vmlsl(cond, dt, rd, rn, rm);
9385 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9386 Vmlsl(al, dt, rd, rn, rm);
9389 void Vmov(Condition cond, Register rt, SRegister rn) {
9391 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9400 vmov(cond, rt, rn);
9402 void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
9404 void Vmov(Condition cond, SRegister rn, Register rt) {
9405 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9415 vmov(cond, rn, rt);
9417 void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
9574 void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
9576 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9585 vmov(cond, dt, rt, rn);
9587 void Vmov(DataType dt, Register rt, DRegisterLane rn) {
9588 Vmov(al, dt, rt, rn);
9590 void Vmov(Condition cond, Register rt, DRegisterLane rn) {
9591 Vmov(cond, kDataTypeValueNone, rt, rn);
9593 void Vmov(Register rt, DRegisterLane rn) {
9594 Vmov(al, kDataTypeValueNone, rt, rn);
9662 DRegister rn,
9666 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9676 vmul(cond, dt, rd, rn, dm, index);
9679 DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
9680 Vmul(al, dt, rd, rn, dm, index);
9686 QRegister rn,
9690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9700 vmul(cond, dt, rd, rn, dm, index);
9703 DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
9704 Vmul(al, dt, rd, rn, dm, index);
9708 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9720 vmul(cond, dt, rd, rn, rm);
9722 void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9723 Vmul(al, dt, rd, rn, rm);
9727 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9739 vmul(cond, dt, rd, rn, rm);
9741 void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9742 Vmul(al, dt, rd, rn, rm);
9746 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9748 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9758 vmul(cond, dt, rd, rn, rm);
9760 void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9761 Vmul(al, dt, rd, rn, rm);
9767 DRegister rn,
9771 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9781 vmull(cond, dt, rd, rn, dm, index);
9784 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
9785 Vmull(al, dt, rd, rn, dm, index);
9789 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9791 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9801 vmull(cond, dt, rd, rn, rm);
9803 void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9804 Vmull(al, dt, rd, rn, rm);
9893 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9895 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9905 vnmla(cond, dt, rd, rn, rm);
9907 void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9908 Vnmla(al, dt, rd, rn, rm);
9912 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9914 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9924 vnmla(cond, dt, rd, rn, rm);
9926 void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9927 Vnmla(al, dt, rd, rn, rm);
9931 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9933 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9943 vnmls(cond, dt, rd, rn, rm);
9945 void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9946 Vnmls(al, dt, rd, rn, rm);
9950 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9952 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9962 vnmls(cond, dt, rd, rn, rm);
9964 void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9965 Vnmls(al, dt, rd, rn, rm);
9969 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9981 vnmul(cond, dt, rd, rn, rm);
9983 void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9984 Vnmul(al, dt, rd, rn, rm);
9988 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10000 vnmul(cond, dt, rd, rn, rm);
10002 void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10003 Vnmul(al, dt, rd, rn, rm);
10009 DRegister rn,
10012 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10022 vorn(cond, dt, rd, rn, operand);
10024 void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
10025 Vorn(al, dt, rd, rn, operand);
10031 QRegister rn,
10034 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10044 vorn(cond, dt, rd, rn, operand);
10046 void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
10047 Vorn(al, dt, rd, rn, operand);
10053 DRegister rn,
10056 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10066 vorr(cond, dt, rd, rn, operand);
10068 void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
10069 Vorr(al, dt, rd, rn, operand);
10073 DRegister rn,
10075 Vorr(cond, kDataTypeValueNone, rd, rn, operand);
10077 void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
10078 Vorr(al, kDataTypeValueNone, rd, rn, operand);
10084 QRegister rn,
10087 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10097 vorr(cond, dt, rd, rn, operand);
10099 void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
10100 Vorr(al, dt, rd, rn, operand);
10104 QRegister rn,
10106 Vorr(cond, kDataTypeValueNone, rd, rn, operand);
10108 void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
10109 Vorr(al, kDataTypeValueNone, rd, rn, operand);
10147 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10149 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10159 vpadd(cond, dt, rd, rn, rm);
10161 void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10162 Vpadd(al, dt, rd, rn, rm);
10200 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10212 vpmax(cond, dt, rd, rn, rm);
10214 void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10215 Vpmax(al, dt, rd, rn, rm);
10219 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10221 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10231 vpmin(cond, dt, rd, rn, rm);
10233 void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10234 Vpmin(al, dt, rd, rn, rm);
10344 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10346 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10356 vqadd(cond, dt, rd, rn, rm);
10358 void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10359 Vqadd(al, dt, rd, rn, rm);
10363 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10365 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10375 vqadd(cond, dt, rd, rn, rm);
10377 void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10378 Vqadd(al, dt, rd, rn, rm);
10382 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10384 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10394 vqdmlal(cond, dt, rd, rn, rm);
10396 void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10397 Vqdmlal(al, dt, rd, rn, rm);
10403 DRegister rn,
10407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10417 vqdmlal(cond, dt, rd, rn, dm, index);
10420 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
10421 Vqdmlal(al, dt, rd, rn, dm, index);
10425 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10427 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10437 vqdmlsl(cond, dt, rd, rn, rm);
10439 void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10440 Vqdmlsl(al, dt, rd, rn, rm);
10446 DRegister rn,
10450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10460 vqdmlsl(cond, dt, rd, rn, dm, index);
10463 DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
10464 Vqdmlsl(al, dt, rd, rn, dm, index);
10468 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10470 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10480 vqdmulh(cond, dt, rd, rn, rm);
10482 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10483 Vqdmulh(al, dt, rd, rn, rm);
10487 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10489 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10499 vqdmulh(cond, dt, rd, rn, rm);
10501 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10502 Vqdmulh(al, dt, rd, rn, rm);
10508 DRegister rn,
10511 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10521 vqdmulh(cond, dt, rd, rn, rm);
10523 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
10524 Vqdmulh(al, dt, rd, rn, rm);
10530 QRegister rn,
10533 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10543 vqdmulh(cond, dt, rd, rn, rm);
10545 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
10546 Vqdmulh(al, dt, rd, rn, rm);
10550 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10552 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10562 vqdmull(cond, dt, rd, rn, rm);
10564 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10565 Vqdmull(al, dt, rd, rn, rm);
10571 DRegister rn,
10574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10584 vqdmull(cond, dt, rd, rn, rm);
10586 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
10587 Vqdmull(al, dt, rd, rn, rm);
10655 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10657 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10667 vqrdmulh(cond, dt, rd, rn, rm);
10669 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10670 Vqrdmulh(al, dt, rd, rn, rm);
10674 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10676 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10686 vqrdmulh(cond, dt, rd, rn, rm);
10688 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10689 Vqrdmulh(al, dt, rd, rn, rm);
10695 DRegister rn,
10698 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10708 vqrdmulh(cond, dt, rd, rn, rm);
10710 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
10711 Vqrdmulh(al, dt, rd, rn, rm);
10717 QRegister rn,
10720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10730 vqrdmulh(cond, dt, rd, rn, rm);
10732 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
10733 Vqrdmulh(al, dt, rd, rn, rm);
10737 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
10740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10749 vqrshl(cond, dt, rd, rm, rn);
10751 void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
10752 Vqrshl(al, dt, rd, rm, rn);
10756 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
10759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10768 vqrshl(cond, dt, rd, rm, rn);
10770 void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
10771 Vqrshl(al, dt, rd, rm, rn);
10969 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10971 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10981 vqsub(cond, dt, rd, rn, rm);
10983 void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10984 Vqsub(al, dt, rd, rn, rm);
10988 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10990 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11000 vqsub(cond, dt, rd, rn, rm);
11002 void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11003 Vqsub(al, dt, rd, rn, rm);
11007 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11019 vraddhn(cond, dt, rd, rn, rm);
11021 void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11022 Vraddhn(al, dt, rd, rn, rm);
11060 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11072 vrecps(cond, dt, rd, rn, rm);
11074 void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11075 Vrecps(al, dt, rd, rn, rm);
11079 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11081 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11091 vrecps(cond, dt, rd, rn, rm);
11093 void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11094 Vrecps(al, dt, rd, rn, rm);
11200 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11202 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11212 vrhadd(cond, dt, rd, rn, rm);
11214 void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11215 Vrhadd(al, dt, rd, rn, rm);
11219 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11221 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11231 vrhadd(cond, dt, rd, rn, rm);
11233 void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11234 Vrhadd(al, dt, rd, rn, rm);
11466 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
11469 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11478 vrshl(cond, dt, rd, rm, rn);
11480 void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
11481 Vrshl(al, dt, rd, rm, rn);
11485 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
11488 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11497 vrshl(cond, dt, rd, rm, rn);
11499 void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
11500 Vrshl(al, dt, rd, rm, rn);
11607 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11619 vrsqrts(cond, dt, rd, rn, rm);
11621 void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11622 Vrsqrts(al, dt, rd, rn, rm);
11626 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11628 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11638 vrsqrts(cond, dt, rd, rn, rm);
11640 void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11641 Vrsqrts(al, dt, rd, rn, rm);
11689 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11691 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11701 vrsubhn(cond, dt, rd, rn, rm);
11703 void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11704 Vrsubhn(al, dt, rd, rn, rm);
11707 void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11709 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11714 vseleq(dt, rd, rn, rm);
11717 void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11719 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11724 vseleq(dt, rd, rn, rm);
11727 void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11729 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11734 vselge(dt, rd, rn, rm);
11737 void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11739 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11744 vselge(dt, rd, rn, rm);
11747 void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11754 vselgt(dt, rd, rn, rm);
11757 void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11759 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11764 vselgt(dt, rd, rn, rm);
11767 void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11774 vselvs(dt, rd, rn, rm);
11777 void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
11784 vselvs(dt, rd, rn, rm);
12193 Register rn,
12196 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12206 vstm(cond, dt, rn, write_back, dreglist);
12209 Register rn,
12212 Vstm(al, dt, rn, write_back, dreglist);
12215 Register rn,
12218 Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
12220 void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
12221 Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
12226 Register rn,
12229 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12239 vstm(cond, dt, rn, write_back, sreglist);
12242 Register rn,
12245 Vstm(al, dt, rn, write_back, sreglist);
12248 Register rn,
12251 Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
12253 void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
12254 Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
12259 Register rn,
12262 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12272 vstmdb(cond, dt, rn, write_back, dreglist);
12275 Register rn,
12278 Vstmdb(al, dt, rn, write_back, dreglist);
12281 Register rn,
12284 Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
12286 void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
12287 Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
12292 Register rn,
12295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12305 vstmdb(cond, dt, rn, write_back, sreglist);
12308 Register rn,
12311 Vstmdb(al, dt, rn, write_back, sreglist);
12314 Register rn,
12317 Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
12319 void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
12320 Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
12325 Register rn,
12328 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12338 vstmia(cond, dt, rn, write_back, dreglist);
12341 Register rn,
12344 Vstmia(al, dt, rn, write_back, dreglist);
12347 Register rn,
12350 Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
12352 void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
12353 Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
12358 Register rn,
12361 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12371 vstmia(cond, dt, rn, write_back, sreglist);
12374 Register rn,
12377 Vstmia(al, dt, rn, write_back, sreglist);
12380 Register rn,
12383 Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
12385 void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
12386 Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
12442 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12444 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12454 vsub(cond, dt, rd, rn, rm);
12456 void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12457 Vsub(al, dt, rd, rn, rm);
12461 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12463 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12473 vsub(cond, dt, rd, rn, rm);
12475 void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12476 Vsub(al, dt, rd, rn, rm);
12480 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
12482 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12492 vsub(cond, dt, rd, rn, rm);
12494 void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
12495 Vsub(al, dt, rd, rn, rm);
12499 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
12501 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12511 vsubhn(cond, dt, rd, rn, rm);
12513 void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
12514 Vsubhn(al, dt, rd, rn, rm);
12518 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
12520 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12530 vsubl(cond, dt, rd, rn, rm);
12532 void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
12533 Vsubl(al, dt, rd, rn, rm);
12537 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
12539 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12549 vsubw(cond, dt, rd, rn, rm);
12551 void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
12552 Vsubw(al, dt, rd, rn, rm);
12678 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12690 vtst(cond, dt, rd, rn, rm);
12692 void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12693 Vtst(al, dt, rd, rn, rm);
12697 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
12709 vtst(cond, dt, rd, rn, rm);
12711 void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12712 Vtst(al, dt, rd, rn, rm);
12797 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12799 VIXL_ASSERT(rd.GetType() == rn.GetType());
12802 Vadd(cond, F32, rd.S(), rn.S(), rm.S());
12804 Vadd(cond, F64, rd.D(), rn.D(), rm.D());
12807 void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
12828 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12830 VIXL_ASSERT(rd.GetType() == rn.GetType());
12833 Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
12835 Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
12838 void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
12839 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12841 VIXL_ASSERT(rd.GetType() == rn.GetType());
12844 Vfma(cond, F32, rd.S(), rn.S(), rm.S());
12846 Vfma(cond, F64, rd.D(), rn.D(), rm.D());
12849 void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
12850 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12852 VIXL_ASSERT(rd.GetType() == rn.GetType());
12855 Vfms(cond, F32, rd.S(), rn.S(), rm.S());
12857 Vfms(cond, F64, rd.D(), rn.D(), rm.D());
12860 void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
12861 void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12863 VIXL_ASSERT(rd.GetType() == rn.GetType());
12866 Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
12868 Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
12871 void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
12872 Vfnma(al, rd, rn, rm);
12874 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12876 VIXL_ASSERT(rd.GetType() == rn.GetType());
12879 Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
12881 Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
12884 void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
12885 Vfnms(al, rd, rn, rm);
12887 void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
12889 VIXL_ASSERT(rd.GetType() == rn.GetType());
12892 Vmaxnm(F32, rd.S(), rn.S(), rm.S());
12894 Vmaxnm(F64, rd.D(), rn.D(), rm.D());
12897 void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
12899 VIXL_ASSERT(rd.GetType() == rn.GetType());
12902 Vminnm(F32, rd.S(), rn.S(), rm.S());
12904 Vminnm(F64, rd.D(), rn.D(), rm.D());
12907 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12909 VIXL_ASSERT(rd.GetType() == rn.GetType());
12912 Vmla(cond, F32, rd.S(), rn.S(), rm.S());
12914 Vmla(cond, F64, rd.D(), rn.D(), rm.D());
12917 void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
12918 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12920 VIXL_ASSERT(rd.GetType() == rn.GetType());
12923 Vmls(cond, F32, rd.S(), rn.S(), rm.S());
12925 Vmls(cond, F64, rd.D(), rn.D(), rm.D());
12928 void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
12939 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12941 VIXL_ASSERT(rd.GetType() == rn.GetType());
12944 Vmul(cond, F32, rd.S(), rn.S(), rm.S());
12946 Vmul(cond, F64, rd.D(), rn.D(), rm.D());
12949 void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
12960 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12962 VIXL_ASSERT(rd.GetType() == rn.GetType());
12965 Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
12967 Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
12970 void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
12971 Vnmla(al, rd, rn, rm);
12973 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12975 VIXL_ASSERT(rd.GetType() == rn.GetType());
12978 Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
12980 Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
12983 void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
12984 Vnmls(al, rd, rn, rm);
12986 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12988 VIXL_ASSERT(rd.GetType() == rn.GetType());
12991 Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
12993 Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
12996 void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
12997 Vnmul(al, rd, rn, rm);
13065 void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
13067 VIXL_ASSERT(rd.GetType() == rn.GetType());
13070 Vseleq(F32, rd.S(), rn.S(), rm.S());
13072 Vseleq(F64, rd.D(), rn.D(), rm.D());
13075 void Vselge(VRegister rd, VRegister rn, VRegister rm) {
13077 VIXL_ASSERT(rd.GetType() == rn.GetType());
13080 Vselge(F32, rd.S(), rn.S(), rm.S());
13082 Vselge(F64, rd.D(), rn.D(), rm.D());
13085 void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
13087 VIXL_ASSERT(rd.GetType() == rn.GetType());
13090 Vselgt(F32, rd.S(), rn.S(), rm.S());
13092 Vselgt(F64, rd.D(), rn.D(), rm.D());
13095 void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
13097 VIXL_ASSERT(rd.GetType() == rn.GetType());
13100 Vselvs(F32, rd.S(), rn.S(), rm.S());
13102 Vselvs(F64, rd.D(), rn.D(), rm.D());
13115 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
13117 VIXL_ASSERT(rd.GetType() == rn.GetType());
13120 Vsub(cond, F32, rd.S(), rn.S(), rm.S());
13122 Vsub(cond, F64, rd.D(), rn.D(), rm.D());
13125 void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }