Lines Matching refs:rm
1389 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1391 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1399 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1401 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1408 asr(cond, rd, rm, operand);
1410 void Asr(Register rd, Register rm, const Operand& operand) {
1411 Asr(al, rd, rm, operand);
1416 Register rm,
1420 Asr(cond, rd, rm, operand);
1423 Asrs(cond, rd, rm, operand);
1427 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1430 (operand.IsPlainRegister() && rd.Is(rm)));
1432 Asrs(cond, rd, rm, operand);
1434 Asr(cond, rd, rm, operand);
1441 Register rm,
1443 Asr(flags, al, rd, rm, operand);
1446 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1448 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1458 asrs(cond, rd, rm, operand);
1460 void Asrs(Register rd, Register rm, const Operand& operand) {
1461 Asrs(al, rd, rm, operand);
1664 void Blx(Condition cond, Register rm) {
1665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1671 !rm.IsPC();
1677 blx(cond, rm);
1679 void Blx(Register rm) { Blx(al, rm); }
1681 void Bx(Condition cond, Register rm) {
1682 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1688 !rm.IsPC();
1694 bx(cond, rm);
1696 void Bx(Register rm) { Bx(al, rm); }
1698 void Bxj(Condition cond, Register rm) {
1699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1708 bxj(cond, rm);
1710 void Bxj(Register rm) { Bxj(al, rm); }
1763 void Clz(Condition cond, Register rd, Register rm) {
1765 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1774 clz(cond, rd, rm);
1776 void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1819 void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1822 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1831 crc32b(cond, rd, rn, rm);
1833 void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1835 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1847 crc32cb(cond, rd, rn, rm);
1849 void Crc32cb(Register rd, Register rn, Register rm) {
1850 Crc32cb(al, rd, rn, rm);
1853 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1865 crc32ch(cond, rd, rn, rm);
1867 void Crc32ch(Register rd, Register rn, Register rm) {
1868 Crc32ch(al, rd, rn, rm);
1871 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1883 crc32cw(cond, rd, rn, rm);
1885 void Crc32cw(Register rd, Register rn, Register rm) {
1886 Crc32cw(al, rd, rn, rm);
1889 void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1892 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1901 crc32h(cond, rd, rn, rm);
1903 void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1905 void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1908 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1917 crc32w(cond, rd, rn, rm);
1919 void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
2643 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2645 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2653 (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2655 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2662 lsl(cond, rd, rm, operand);
2664 void Lsl(Register rd, Register rm, const Operand& operand) {
2665 Lsl(al, rd, rm, operand);
2670 Register rm,
2674 Lsl(cond, rd, rm, operand);
2677 Lsls(cond, rd, rm, operand);
2681 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2684 (operand.IsPlainRegister() && rd.Is(rm)));
2686 Lsls(cond, rd, rm, operand);
2688 Lsl(cond, rd, rm, operand);
2695 Register rm,
2697 Lsl(flags, al, rd, rm, operand);
2700 void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2702 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2712 lsls(cond, rd, rm, operand);
2714 void Lsls(Register rd, Register rm, const Operand& operand) {
2715 Lsls(al, rd, rm, operand);
2718 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2728 (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2730 (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2737 lsr(cond, rd, rm, operand);
2739 void Lsr(Register rd, Register rm, const Operand& operand) {
2740 Lsr(al, rd, rm, operand);
2745 Register rm,
2749 Lsr(cond, rd, rm, operand);
2752 Lsrs(cond, rd, rm, operand);
2756 IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2759 (operand.IsPlainRegister() && rd.Is(rm)));
2761 Lsrs(cond, rd, rm, operand);
2763 Lsr(cond, rd, rm, operand);
2770 Register rm,
2772 Lsr(flags, al, rd, rm, operand);
2775 void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2787 lsrs(cond, rd, rm, operand);
2789 void Lsrs(Register rd, Register rm, const Operand& operand) {
2790 Lsrs(al, rd, rm, operand);
2793 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2796 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2806 mla(cond, rd, rn, rm, ra);
2808 void Mla(Register rd, Register rn, Register rm, Register ra) {
2809 Mla(al, rd, rn, rm, ra);
2815 Register rm,
2819 Mla(cond, rd, rn, rm, ra);
2822 Mlas(cond, rd, rn, rm, ra);
2825 Mla(cond, rd, rn, rm, ra);
2830 FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2831 Mla(flags, al, rd, rn, rm, ra);
2835 Condition cond, Register rd, Register rn, Register rm, Register ra) {
2838 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2848 mlas(cond, rd, rn, rm, ra);
2850 void Mlas(Register rd, Register rn, Register rm, Register ra) {
2851 Mlas(al, rd, rn, rm, ra);
2854 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2857 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2867 mls(cond, rd, rn, rm, ra);
2869 void Mls(Register rd, Register rn, Register rm, Register ra) {
2870 Mls(al, rd, rn, rm, ra);
3016 void Mul(Condition cond, Register rd, Register rn, Register rm) {
3019 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3025 rd.Is(rm) && rn.IsLow() && rm.IsLow();
3031 mul(cond, rd, rn, rm);
3033 void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
3038 Register rm) {
3041 Mul(cond, rd, rn, rm);
3044 Muls(cond, rd, rn, rm);
3048 rn.IsLow() && rm.Is(rd);
3050 Muls(cond, rd, rn, rm);
3052 Mul(cond, rd, rn, rm);
3057 void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
3058 Mul(flags, al, rd, rn, rm);
3061 void Muls(Condition cond, Register rd, Register rn, Register rm) {
3064 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3073 muls(cond, rd, rn, rm);
3075 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
3458 void Qadd(Condition cond, Register rd, Register rm, Register rn) {
3460 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3470 qadd(cond, rd, rm, rn);
3472 void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
3474 void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
3477 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3486 qadd16(cond, rd, rn, rm);
3488 void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
3490 void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
3493 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3502 qadd8(cond, rd, rn, rm);
3504 void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
3506 void Qasx(Condition cond, Register rd, Register rn, Register rm) {
3509 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3518 qasx(cond, rd, rn, rm);
3520 void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3522 void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3524 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3534 qdadd(cond, rd, rm, rn);
3536 void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3538 void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3540 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3550 qdsub(cond, rd, rm, rn);
3552 void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3554 void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3566 qsax(cond, rd, rn, rm);
3568 void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3570 void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3572 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3582 qsub(cond, rd, rm, rn);
3584 void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3586 void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3598 qsub16(cond, rd, rn, rm);
3600 void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3602 void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3605 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3614 qsub8(cond, rd, rn, rm);
3616 void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3618 void Rbit(Condition cond, Register rd, Register rm) {
3620 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3629 rbit(cond, rd, rm);
3631 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3633 void Rev(Condition cond, Register rd, Register rm) {
3635 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3644 rev(cond, rd, rm);
3646 void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3648 void Rev16(Condition cond, Register rd, Register rm) {
3650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3659 rev16(cond, rd, rm);
3661 void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3663 void Revsh(Condition cond, Register rd, Register rm) {
3665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3674 revsh(cond, rd, rm);
3676 void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3678 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3680 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3687 operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3694 ror(cond, rd, rm, operand);
3696 void Ror(Register rd, Register rm, const Operand& operand) {
3697 Ror(al, rd, rm, operand);
3702 Register rm,
3706 Ror(cond, rd, rm, operand);
3709 Rors(cond, rd, rm, operand);
3713 rm.IsLow() && operand.IsPlainRegister() &&
3714 rd.Is(rm);
3716 Rors(cond, rd, rm, operand);
3718 Ror(cond, rd, rm, operand);
3725 Register rm,
3727 Ror(flags, al, rd, rm, operand);
3730 void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3742 rors(cond, rd, rm, operand);
3744 void Rors(Register rd, Register rm, const Operand& operand) {
3745 Rors(al, rd, rm, operand);
3748 void Rrx(Condition cond, Register rd, Register rm) {
3750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3759 rrx(cond, rd, rm);
3761 void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
3762 void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3765 Rrx(cond, rd, rm);
3768 Rrxs(cond, rd, rm);
3771 Rrx(cond, rd, rm);
3775 void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3776 Rrx(flags, al, rd, rm);
3779 void Rrxs(Condition cond, Register rd, Register rm) {
3781 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3790 rrxs(cond, rd, rm);
3792 void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3923 void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3926 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3935 sadd16(cond, rd, rn, rm);
3937 void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3939 void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3951 sadd8(cond, rd, rn, rm);
3953 void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3955 void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3958 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3967 sasx(cond, rd, rn, rm);
3969 void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
4059 void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
4062 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4071 sdiv(cond, rd, rn, rm);
4073 void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
4075 void Sel(Condition cond, Register rd, Register rn, Register rm) {
4078 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4087 sel(cond, rd, rn, rm);
4089 void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
4091 void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
4094 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4103 shadd16(cond, rd, rn, rm);
4105 void Shadd16(Register rd, Register rn, Register rm) {
4106 Shadd16(al, rd, rn, rm);
4109 void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
4112 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4121 shadd8(cond, rd, rn, rm);
4123 void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
4125 void Shasx(Condition cond, Register rd, Register rn, Register rm) {
4128 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4137 shasx(cond, rd, rn, rm);
4139 void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
4141 void Shsax(Condition cond, Register rd, Register rn, Register rm) {
4144 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4153 shsax(cond, rd, rn, rm);
4155 void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
4157 void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
4160 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4169 shsub16(cond, rd, rn, rm);
4171 void Shsub16(Register rd, Register rn, Register rm) {
4172 Shsub16(al, rd, rn, rm);
4175 void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
4178 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4187 shsub8(cond, rd, rn, rm);
4189 void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
4192 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4195 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4205 smlabb(cond, rd, rn, rm, ra);
4207 void Smlabb(Register rd, Register rn, Register rm, Register ra) {
4208 Smlabb(al, rd, rn, rm, ra);
4212 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4215 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4225 smlabt(cond, rd, rn, rm, ra);
4227 void Smlabt(Register rd, Register rn, Register rm, Register ra) {
4228 Smlabt(al, rd, rn, rm, ra);
4232 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4235 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4245 smlad(cond, rd, rn, rm, ra);
4247 void Smlad(Register rd, Register rn, Register rm, Register ra) {
4248 Smlad(al, rd, rn, rm, ra);
4252 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4255 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4265 smladx(cond, rd, rn, rm, ra);
4267 void Smladx(Register rd, Register rn, Register rm, Register ra) {
4268 Smladx(al, rd, rn, rm, ra);
4272 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4276 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4285 smlal(cond, rdlo, rdhi, rn, rm);
4287 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4288 Smlal(al, rdlo, rdhi, rn, rm);
4292 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4296 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4305 smlalbb(cond, rdlo, rdhi, rn, rm);
4307 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
4308 Smlalbb(al, rdlo, rdhi, rn, rm);
4312 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4316 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4325 smlalbt(cond, rdlo, rdhi, rn, rm);
4327 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
4328 Smlalbt(al, rdlo, rdhi, rn, rm);
4332 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4336 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4345 smlald(cond, rdlo, rdhi, rn, rm);
4347 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
4348 Smlald(al, rdlo, rdhi, rn, rm);
4352 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4356 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4365 smlaldx(cond, rdlo, rdhi, rn, rm);
4367 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4368 Smlaldx(al, rdlo, rdhi, rn, rm);
4372 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4376 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4385 smlals(cond, rdlo, rdhi, rn, rm);
4387 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
4388 Smlals(al, rdlo, rdhi, rn, rm);
4392 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4396 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4405 smlaltb(cond, rdlo, rdhi, rn, rm);
4407 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
4408 Smlaltb(al, rdlo, rdhi, rn, rm);
4412 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4416 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4425 smlaltt(cond, rdlo, rdhi, rn, rm);
4427 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
4428 Smlaltt(al, rdlo, rdhi, rn, rm);
4432 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4435 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4445 smlatb(cond, rd, rn, rm, ra);
4447 void Smlatb(Register rd, Register rn, Register rm, Register ra) {
4448 Smlatb(al, rd, rn, rm, ra);
4452 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4455 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4465 smlatt(cond, rd, rn, rm, ra);
4467 void Smlatt(Register rd, Register rn, Register rm, Register ra) {
4468 Smlatt(al, rd, rn, rm, ra);
4472 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4475 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4485 smlawb(cond, rd, rn, rm, ra);
4487 void Smlawb(Register rd, Register rn, Register rm, Register ra) {
4488 Smlawb(al, rd, rn, rm, ra);
4492 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4505 smlawt(cond, rd, rn, rm, ra);
4507 void Smlawt(Register rd, Register rn, Register rm, Register ra) {
4508 Smlawt(al, rd, rn, rm, ra);
4512 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4515 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4525 smlsd(cond, rd, rn, rm, ra);
4527 void Smlsd(Register rd, Register rn, Register rm, Register ra) {
4528 Smlsd(al, rd, rn, rm, ra);
4532 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4545 smlsdx(cond, rd, rn, rm, ra);
4547 void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
4548 Smlsdx(al, rd, rn, rm, ra);
4552 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4556 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4565 smlsld(cond, rdlo, rdhi, rn, rm);
4567 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
4568 Smlsld(al, rdlo, rdhi, rn, rm);
4572 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4576 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4585 smlsldx(cond, rdlo, rdhi, rn, rm);
4587 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4588 Smlsldx(al, rdlo, rdhi, rn, rm);
4592 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4595 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4605 smmla(cond, rd, rn, rm, ra);
4607 void Smmla(Register rd, Register rn, Register rm, Register ra) {
4608 Smmla(al, rd, rn, rm, ra);
4612 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4615 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4625 smmlar(cond, rd, rn, rm, ra);
4627 void Smmlar(Register rd, Register rn, Register rm, Register ra) {
4628 Smmlar(al, rd, rn, rm, ra);
4632 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4635 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4645 smmls(cond, rd, rn, rm, ra);
4647 void Smmls(Register rd, Register rn, Register rm, Register ra) {
4648 Smmls(al, rd, rn, rm, ra);
4652 Condition cond, Register rd, Register rn, Register rm, Register ra) {
4655 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4665 smmlsr(cond, rd, rn, rm, ra);
4667 void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
4668 Smmlsr(al, rd, rn, rm, ra);
4671 void Smmul(Condition cond, Register rd, Register rn, Register rm) {
4674 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4683 smmul(cond, rd, rn, rm);
4685 void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
4687 void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
4690 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4699 smmulr(cond, rd, rn, rm);
4701 void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
4703 void Smuad(Condition cond, Register rd, Register rn, Register rm) {
4706 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4715 smuad(cond, rd, rn, rm);
4717 void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
4719 void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
4722 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4731 smuadx(cond, rd, rn, rm);
4733 void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
4735 void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
4738 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4747 smulbb(cond, rd, rn, rm);
4749 void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
4751 void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
4754 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4763 smulbt(cond, rd, rn, rm);
4765 void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
4768 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4772 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4781 smull(cond, rdlo, rdhi, rn, rm);
4783 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4784 Smull(al, rdlo, rdhi, rn, rm);
4791 Register rm) {
4794 Smull(cond, rdlo, rdhi, rn, rm);
4797 Smulls(cond, rdlo, rdhi, rn, rm);
4800 Smull(cond, rdlo, rdhi, rn, rm);
4808 Register rm) {
4809 Smull(flags, al, rdlo, rdhi, rn, rm);
4813 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4826 smulls(cond, rdlo, rdhi, rn, rm);
4828 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4829 Smulls(al, rdlo, rdhi, rn, rm);
4832 void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4835 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4844 smultb(cond, rd, rn, rm);
4846 void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4848 void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4851 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4860 smultt(cond, rd, rn, rm);
4862 void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4864 void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4867 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4876 smulwb(cond, rd, rn, rm);
4878 void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4880 void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4883 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4892 smulwt(cond, rd, rn, rm);
4894 void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4896 void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4899 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4908 smusd(cond, rd, rn, rm);
4910 void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4912 void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4915 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4924 smusdx(cond, rd, rn, rm);
4926 void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4962 void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4965 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4974 ssax(cond, rd, rn, rm);
4976 void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4978 void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4981 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4990 ssub16(cond, rd, rn, rm);
4992 void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4994 void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4997 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5006 ssub8(cond, rd, rn, rm);
5008 void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
5742 void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
5745 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5754 uadd16(cond, rd, rn, rm);
5756 void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
5758 void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
5761 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5770 uadd8(cond, rd, rn, rm);
5772 void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
5774 void Uasx(Condition cond, Register rd, Register rn, Register rm) {
5777 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5786 uasx(cond, rd, rn, rm);
5788 void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
5821 void Udiv(Condition cond, Register rd, Register rn, Register rm) {
5824 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5833 udiv(cond, rd, rn, rm);
5835 void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
5837 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
5840 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5849 uhadd16(cond, rd, rn, rm);
5851 void Uhadd16(Register rd, Register rn, Register rm) {
5852 Uhadd16(al, rd, rn, rm);
5855 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
5858 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5867 uhadd8(cond, rd, rn, rm);
5869 void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
5871 void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
5874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5883 uhasx(cond, rd, rn, rm);
5885 void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
5887 void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
5890 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5899 uhsax(cond, rd, rn, rm);
5901 void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
5903 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
5906 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5915 uhsub16(cond, rd, rn, rm);
5917 void Uhsub16(Register rd, Register rn, Register rm) {
5918 Uhsub16(al, rd, rn, rm);
5921 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
5924 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5933 uhsub8(cond, rd, rn, rm);
5935 void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
5938 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5942 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5951 umaal(cond, rdlo, rdhi, rn, rm);
5953 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5954 Umaal(al, rdlo, rdhi, rn, rm);
5958 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5962 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5971 umlal(cond, rdlo, rdhi, rn, rm);
5973 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5974 Umlal(al, rdlo, rdhi, rn, rm);
5981 Register rm) {
5984 Umlal(cond, rdlo, rdhi, rn, rm);
5987 Umlals(cond, rdlo, rdhi, rn, rm);
5990 Umlal(cond, rdlo, rdhi, rn, rm);
5998 Register rm) {
5999 Umlal(flags, al, rdlo, rdhi, rn, rm);
6003 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6007 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6016 umlals(cond, rdlo, rdhi, rn, rm);
6018 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
6019 Umlals(al, rdlo, rdhi, rn, rm);
6023 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6036 umull(cond, rdlo, rdhi, rn, rm);
6038 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
6039 Umull(al, rdlo, rdhi, rn, rm);
6046 Register rm) {
6049 Umull(cond, rdlo, rdhi, rn, rm);
6052 Umulls(cond, rdlo, rdhi, rn, rm);
6055 Umull(cond, rdlo, rdhi, rn, rm);
6063 Register rm) {
6064 Umull(flags, al, rdlo, rdhi, rn, rm);
6068 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6072 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6081 umulls(cond, rdlo, rdhi, rn, rm);
6083 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
6084 Umulls(al, rdlo, rdhi, rn, rm);
6087 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
6090 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6099 uqadd16(cond, rd, rn, rm);
6101 void Uqadd16(Register rd, Register rn, Register rm) {
6102 Uqadd16(al, rd, rn, rm);
6105 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
6108 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6117 uqadd8(cond, rd, rn, rm);
6119 void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
6121 void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
6124 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6133 uqasx(cond, rd, rn, rm);
6135 void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
6137 void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
6140 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6149 uqsax(cond, rd, rn, rm);
6151 void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
6153 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
6156 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6165 uqsub16(cond, rd, rn, rm);
6167 void Uqsub16(Register rd, Register rn, Register rm) {
6168 Uqsub16(al, rd, rn, rm);
6171 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
6174 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6183 uqsub8(cond, rd, rn, rm);
6185 void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
6187 void Usad8(Condition cond, Register rd, Register rn, Register rm) {
6190 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6199 usad8(cond, rd, rn, rm);
6201 void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
6204 Condition cond, Register rd, Register rn, Register rm, Register ra) {
6207 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6217 usada8(cond, rd, rn, rm, ra);
6219 void Usada8(Register rd, Register rn, Register rm, Register ra) {
6220 Usada8(al, rd, rn, rm, ra);
6257 void Usax(Condition cond, Register rd, Register rn, Register rm) {
6260 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6269 usax(cond, rd, rn, rm);
6271 void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
6273 void Usub16(Condition cond, Register rd, Register rn, Register rm) {
6276 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6285 usub16(cond, rd, rn, rm);
6287 void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
6289 void Usub8(Condition cond, Register rd, Register rn, Register rm) {
6292 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6301 usub8(cond, rd, rn, rm);
6303 void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
6408 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6411 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6420 vaba(cond, dt, rd, rn, rm);
6422 void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6423 Vaba(al, dt, rd, rn, rm);
6427 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6430 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6439 vaba(cond, dt, rd, rn, rm);
6441 void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6442 Vaba(al, dt, rd, rn, rm);
6446 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6449 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6458 vabal(cond, dt, rd, rn, rm);
6460 void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6461 Vabal(al, dt, rd, rn, rm);
6465 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6477 vabd(cond, dt, rd, rn, rm);
6479 void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6480 Vabd(al, dt, rd, rn, rm);
6484 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6496 vabd(cond, dt, rd, rn, rm);
6498 void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6499 Vabd(al, dt, rd, rn, rm);
6503 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6506 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6515 vabdl(cond, dt, rd, rn, rm);
6517 void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6518 Vabdl(al, dt, rd, rn, rm);
6521 void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6523 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6532 vabs(cond, dt, rd, rm);
6534 void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
6536 void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6538 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6547 vabs(cond, dt, rd, rm);
6549 void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
6551 void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
6553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6562 vabs(cond, dt, rd, rm);
6564 void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
6567 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6570 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6579 vacge(cond, dt, rd, rn, rm);
6581 void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6582 Vacge(al, dt, rd, rn, rm);
6586 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6589 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6598 vacge(cond, dt, rd, rn, rm);
6600 void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6601 Vacge(al, dt, rd, rn, rm);
6605 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6608 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6617 vacgt(cond, dt, rd, rn, rm);
6619 void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6620 Vacgt(al, dt, rd, rn, rm);
6624 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6627 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6636 vacgt(cond, dt, rd, rn, rm);
6638 void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6639 Vacgt(al, dt, rd, rn, rm);
6643 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6646 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6655 vacle(cond, dt, rd, rn, rm);
6657 void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6658 Vacle(al, dt, rd, rn, rm);
6662 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6665 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6674 vacle(cond, dt, rd, rn, rm);
6676 void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6677 Vacle(al, dt, rd, rn, rm);
6681 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6684 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6693 vaclt(cond, dt, rd, rn, rm);
6695 void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6696 Vaclt(al, dt, rd, rn, rm);
6700 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6703 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6712 vaclt(cond, dt, rd, rn, rm);
6714 void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6715 Vaclt(al, dt, rd, rn, rm);
6719 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6722 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6731 vadd(cond, dt, rd, rn, rm);
6733 void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6734 Vadd(al, dt, rd, rn, rm);
6738 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6741 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6750 vadd(cond, dt, rd, rn, rm);
6752 void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6753 Vadd(al, dt, rd, rn, rm);
6757 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6769 vadd(cond, dt, rd, rn, rm);
6771 void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6772 Vadd(al, dt, rd, rn, rm);
6776 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
6779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6788 vaddhn(cond, dt, rd, rn, rm);
6790 void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
6791 Vaddhn(al, dt, rd, rn, rm);
6795 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6798 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6807 vaddl(cond, dt, rd, rn, rm);
6809 void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
6810 Vaddl(al, dt, rd, rn, rm);
6814 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
6817 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6826 vaddw(cond, dt, rd, rn, rm);
6828 void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
6829 Vaddw(al, dt, rd, rn, rm);
6921 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6924 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6933 vbif(cond, dt, rd, rn, rm);
6935 void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6936 Vbif(al, dt, rd, rn, rm);
6938 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6939 Vbif(cond, kDataTypeValueNone, rd, rn, rm);
6941 void Vbif(DRegister rd, DRegister rn, DRegister rm) {
6942 Vbif(al, kDataTypeValueNone, rd, rn, rm);
6946 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6958 vbif(cond, dt, rd, rn, rm);
6960 void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6961 Vbif(al, dt, rd, rn, rm);
6963 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6964 Vbif(cond, kDataTypeValueNone, rd, rn, rm);
6966 void Vbif(QRegister rd, QRegister rn, QRegister rm) {
6967 Vbif(al, kDataTypeValueNone, rd, rn, rm);
6971 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6974 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6983 vbit(cond, dt, rd, rn, rm);
6985 void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6986 Vbit(al, dt, rd, rn, rm);
6988 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6989 Vbit(cond, kDataTypeValueNone, rd, rn, rm);
6991 void Vbit(DRegister rd, DRegister rn, DRegister rm) {
6992 Vbit(al, kDataTypeValueNone, rd, rn, rm);
6996 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6999 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7008 vbit(cond, dt, rd, rn, rm);
7010 void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7011 Vbit(al, dt, rd, rn, rm);
7013 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
7014 Vbit(cond, kDataTypeValueNone, rd, rn, rm);
7016 void Vbit(QRegister rd, QRegister rn, QRegister rm) {
7017 Vbit(al, kDataTypeValueNone, rd, rn, rm);
7021 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7024 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7033 vbsl(cond, dt, rd, rn, rm);
7035 void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7036 Vbsl(al, dt, rd, rn, rm);
7038 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
7039 Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
7041 void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
7042 Vbsl(al, kDataTypeValueNone, rd, rn, rm);
7046 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7049 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7058 vbsl(cond, dt, rd, rn, rm);
7060 void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7061 Vbsl(al, dt, rd, rn, rm);
7063 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
7064 Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
7066 void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
7067 Vbsl(al, kDataTypeValueNone, rd, rn, rm);
7073 DRegister rm,
7076 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7086 vceq(cond, dt, rd, rm, operand);
7088 void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
7089 Vceq(al, dt, rd, rm, operand);
7095 QRegister rm,
7098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7108 vceq(cond, dt, rd, rm, operand);
7110 void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
7111 Vceq(al, dt, rd, rm, operand);
7115 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7127 vceq(cond, dt, rd, rn, rm);
7129 void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7130 Vceq(al, dt, rd, rn, rm);
7134 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7146 vceq(cond, dt, rd, rn, rm);
7148 void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7149 Vceq(al, dt, rd, rn, rm);
7155 DRegister rm,
7158 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7168 vcge(cond, dt, rd, rm, operand);
7170 void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
7171 Vcge(al, dt, rd, rm, operand);
7177 QRegister rm,
7180 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7190 vcge(cond, dt, rd, rm, operand);
7192 void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
7193 Vcge(al, dt, rd, rm, operand);
7197 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7200 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7209 vcge(cond, dt, rd, rn, rm);
7211 void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7212 Vcge(al, dt, rd, rn, rm);
7216 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7219 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7228 vcge(cond, dt, rd, rn, rm);
7230 void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7231 Vcge(al, dt, rd, rn, rm);
7237 DRegister rm,
7240 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7250 vcgt(cond, dt, rd, rm, operand);
7252 void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
7253 Vcgt(al, dt, rd, rm, operand);
7259 QRegister rm,
7262 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7272 vcgt(cond, dt, rd, rm, operand);
7274 void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
7275 Vcgt(al, dt, rd, rm, operand);
7279 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7282 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7291 vcgt(cond, dt, rd, rn, rm);
7293 void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7294 Vcgt(al, dt, rd, rn, rm);
7298 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7301 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7310 vcgt(cond, dt, rd, rn, rm);
7312 void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7313 Vcgt(al, dt, rd, rn, rm);
7319 DRegister rm,
7322 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7332 vcle(cond, dt, rd, rm, operand);
7334 void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
7335 Vcle(al, dt, rd, rm, operand);
7341 QRegister rm,
7344 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7354 vcle(cond, dt, rd, rm, operand);
7356 void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
7357 Vcle(al, dt, rd, rm, operand);
7361 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7364 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7373 vcle(cond, dt, rd, rn, rm);
7375 void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7376 Vcle(al, dt, rd, rn, rm);
7380 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7392 vcle(cond, dt, rd, rn, rm);
7394 void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7395 Vcle(al, dt, rd, rn, rm);
7398 void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
7400 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7409 vcls(cond, dt, rd, rm);
7411 void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
7413 void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
7415 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7424 vcls(cond, dt, rd, rm);
7426 void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
7431 DRegister rm,
7434 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7444 vclt(cond, dt, rd, rm, operand);
7446 void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
7447 Vclt(al, dt, rd, rm, operand);
7453 QRegister rm,
7456 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7466 vclt(cond, dt, rd, rm, operand);
7468 void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
7469 Vclt(al, dt, rd, rm, operand);
7473 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7476 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7485 vclt(cond, dt, rd, rn, rm);
7487 void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7488 Vclt(al, dt, rd, rn, rm);
7492 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7495 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7504 vclt(cond, dt, rd, rn, rm);
7506 void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7507 Vclt(al, dt, rd, rn, rm);
7510 void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
7512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7521 vclz(cond, dt, rd, rm);
7523 void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
7525 void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
7527 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7536 vclz(cond, dt, rd, rm);
7538 void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
7620 void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
7622 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7631 vcnt(cond, dt, rd, rm);
7633 void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
7635 void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
7637 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7646 vcnt(cond, dt, rd, rm);
7648 void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
7651 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7653 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7662 vcvt(cond, dt1, dt2, rd, rm);
7664 void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7665 Vcvt(al, dt1, dt2, rd, rm);
7669 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7671 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7680 vcvt(cond, dt1, dt2, rd, rm);
7682 void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7683 Vcvt(al, dt1, dt2, rd, rm);
7690 DRegister rm,
7693 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7702 vcvt(cond, dt1, dt2, rd, rm, fbits);
7705 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
7706 Vcvt(al, dt1, dt2, rd, rm, fbits);
7713 QRegister rm,
7716 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7725 vcvt(cond, dt1, dt2, rd, rm, fbits);
7728 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
7729 Vcvt(al, dt1, dt2, rd, rm, fbits);
7736 SRegister rm,
7739 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7748 vcvt(cond, dt1, dt2, rd, rm, fbits);
7751 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
7752 Vcvt(al, dt1, dt2, rd, rm, fbits);
7756 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7758 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7767 vcvt(cond, dt1, dt2, rd, rm);
7769 void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7770 Vcvt(al, dt1, dt2, rd, rm);
7774 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7776 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7785 vcvt(cond, dt1, dt2, rd, rm);
7787 void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7788 Vcvt(al, dt1, dt2, rd, rm);
7792 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
7794 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7803 vcvt(cond, dt1, dt2, rd, rm);
7805 void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
7806 Vcvt(al, dt1, dt2, rd, rm);
7810 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
7812 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7821 vcvt(cond, dt1, dt2, rd, rm);
7823 void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
7824 Vcvt(al, dt1, dt2, rd, rm);
7828 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7839 vcvt(cond, dt1, dt2, rd, rm);
7841 void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7842 Vcvt(al, dt1, dt2, rd, rm);
7845 void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7847 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7851 vcvta(dt1, dt2, rd, rm);
7854 void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7856 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7860 vcvta(dt1, dt2, rd, rm);
7863 void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7865 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7869 vcvta(dt1, dt2, rd, rm);
7872 void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7878 vcvta(dt1, dt2, rd, rm);
7882 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7884 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7893 vcvtb(cond, dt1, dt2, rd, rm);
7895 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7896 Vcvtb(al, dt1, dt2, rd, rm);
7900 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7902 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7911 vcvtb(cond, dt1, dt2, rd, rm);
7913 void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7914 Vcvtb(al, dt1, dt2, rd, rm);
7918 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7920 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7929 vcvtb(cond, dt1, dt2, rd, rm);
7931 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7932 Vcvtb(al, dt1, dt2, rd, rm);
7935 void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7937 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7941 vcvtm(dt1, dt2, rd, rm);
7944 void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7946 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7950 vcvtm(dt1, dt2, rd, rm);
7953 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7955 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7959 vcvtm(dt1, dt2, rd, rm);
7962 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7964 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7968 vcvtm(dt1, dt2, rd, rm);
7971 void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7977 vcvtn(dt1, dt2, rd, rm);
7980 void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7982 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7986 vcvtn(dt1, dt2, rd, rm);
7989 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7995 vcvtn(dt1, dt2, rd, rm);
7998 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8000 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8004 vcvtn(dt1, dt2, rd, rm);
8007 void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
8009 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8013 vcvtp(dt1, dt2, rd, rm);
8016 void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
8018 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8022 vcvtp(dt1, dt2, rd, rm);
8025 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8031 vcvtp(dt1, dt2, rd, rm);
8034 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8036 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8040 vcvtp(dt1, dt2, rd, rm);
8044 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8046 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8055 vcvtr(cond, dt1, dt2, rd, rm);
8057 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8058 Vcvtr(al, dt1, dt2, rd, rm);
8062 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8064 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8073 vcvtr(cond, dt1, dt2, rd, rm);
8075 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8076 Vcvtr(al, dt1, dt2, rd, rm);
8080 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8091 vcvtt(cond, dt1, dt2, rd, rm);
8093 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8094 Vcvtt(al, dt1, dt2, rd, rm);
8098 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
8100 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8109 vcvtt(cond, dt1, dt2, rd, rm);
8111 void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
8112 Vcvtt(al, dt1, dt2, rd, rm);
8116 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8118 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8127 vcvtt(cond, dt1, dt2, rd, rm);
8129 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8130 Vcvtt(al, dt1, dt2, rd, rm);
8134 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8137 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8146 vdiv(cond, dt, rd, rn, rm);
8148 void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8149 Vdiv(al, dt, rd, rn, rm);
8153 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8156 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8165 vdiv(cond, dt, rd, rn, rm);
8167 void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8168 Vdiv(al, dt, rd, rn, rm);
8201 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
8203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8212 vdup(cond, dt, rd, rm);
8214 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
8215 Vdup(al, dt, rd, rm);
8218 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
8220 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8229 vdup(cond, dt, rd, rm);
8231 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
8232 Vdup(al, dt, rd, rm);
8236 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8239 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8248 veor(cond, dt, rd, rn, rm);
8250 void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8251 Veor(al, dt, rd, rn, rm);
8253 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
8254 Veor(cond, kDataTypeValueNone, rd, rn, rm);
8256 void Veor(DRegister rd, DRegister rn, DRegister rm) {
8257 Veor(al, kDataTypeValueNone, rd, rn, rm);
8261 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8264 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8273 veor(cond, dt, rd, rn, rm);
8275 void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8276 Veor(al, dt, rd, rn, rm);
8278 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
8279 Veor(cond, kDataTypeValueNone, rd, rn, rm);
8281 void Veor(QRegister rd, QRegister rn, QRegister rm) {
8282 Veor(al, kDataTypeValueNone, rd, rn, rm);
8289 DRegister rm,
8293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8303 vext(cond, dt, rd, rn, rm, operand);
8308 DRegister rm,
8310 Vext(al, dt, rd, rn, rm, operand);
8317 QRegister rm,
8321 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8331 vext(cond, dt, rd, rn, rm, operand);
8336 QRegister rm,
8338 Vext(al, dt, rd, rn, rm, operand);
8342 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8345 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8354 vfma(cond, dt, rd, rn, rm);
8356 void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8357 Vfma(al, dt, rd, rn, rm);
8361 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8364 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8373 vfma(cond, dt, rd, rn, rm);
8375 void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8376 Vfma(al, dt, rd, rn, rm);
8380 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8383 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8392 vfma(cond, dt, rd, rn, rm);
8394 void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8395 Vfma(al, dt, rd, rn, rm);
8399 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8402 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8411 vfms(cond, dt, rd, rn, rm);
8413 void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8414 Vfms(al, dt, rd, rn, rm);
8418 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8421 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8430 vfms(cond, dt, rd, rn, rm);
8432 void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8433 Vfms(al, dt, rd, rn, rm);
8437 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8440 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8449 vfms(cond, dt, rd, rn, rm);
8451 void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8452 Vfms(al, dt, rd, rn, rm);
8456 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8459 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8468 vfnma(cond, dt, rd, rn, rm);
8470 void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8471 Vfnma(al, dt, rd, rn, rm);
8475 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8478 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8487 vfnma(cond, dt, rd, rn, rm);
8489 void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8490 Vfnma(al, dt, rd, rn, rm);
8494 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8497 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8506 vfnms(cond, dt, rd, rn, rm);
8508 void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8509 Vfnms(al, dt, rd, rn, rm);
8513 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8516 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8525 vfnms(cond, dt, rd, rn, rm);
8527 void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8528 Vfnms(al, dt, rd, rn, rm);
8532 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8535 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8544 vhadd(cond, dt, rd, rn, rm);
8546 void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8547 Vhadd(al, dt, rd, rn, rm);
8551 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8554 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8563 vhadd(cond, dt, rd, rn, rm);
8565 void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8566 Vhadd(al, dt, rd, rn, rm);
8570 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8582 vhsub(cond, dt, rd, rn, rm);
8584 void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8585 Vhsub(al, dt, rd, rn, rm);
8589 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8601 vhsub(cond, dt, rd, rn, rm);
8603 void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8604 Vhsub(al, dt, rd, rn, rm);
8970 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8973 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8982 vmax(cond, dt, rd, rn, rm);
8984 void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8985 Vmax(al, dt, rd, rn, rm);
8989 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8992 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9001 vmax(cond, dt, rd, rn, rm);
9003 void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9004 Vmax(al, dt, rd, rn, rm);
9007 void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9010 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9014 vmaxnm(dt, rd, rn, rm);
9017 void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9020 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9024 vmaxnm(dt, rd, rn, rm);
9027 void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9030 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9034 vmaxnm(dt, rd, rn, rm);
9038 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9041 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9050 vmin(cond, dt, rd, rn, rm);
9052 void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9053 Vmin(al, dt, rd, rn, rm);
9057 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9060 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9069 vmin(cond, dt, rd, rn, rm);
9071 void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9072 Vmin(al, dt, rd, rn, rm);
9075 void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9078 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9082 vminnm(dt, rd, rn, rm);
9085 void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9088 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9092 vminnm(dt, rd, rn, rm);
9095 void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9098 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9102 vminnm(dt, rd, rn, rm);
9109 DRegisterLane rm) {
9112 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9121 vmla(cond, dt, rd, rn, rm);
9123 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
9124 Vmla(al, dt, rd, rn, rm);
9131 DRegisterLane rm) {
9134 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9143 vmla(cond, dt, rd, rn, rm);
9145 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
9146 Vmla(al, dt, rd, rn, rm);
9150 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9153 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9162 vmla(cond, dt, rd, rn, rm);
9164 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9165 Vmla(al, dt, rd, rn, rm);
9169 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9172 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9181 vmla(cond, dt, rd, rn, rm);
9183 void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9184 Vmla(al, dt, rd, rn, rm);
9188 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9191 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9200 vmla(cond, dt, rd, rn, rm);
9202 void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9203 Vmla(al, dt, rd, rn, rm);
9210 DRegisterLane rm) {
9213 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9222 vmlal(cond, dt, rd, rn, rm);
9224 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
9225 Vmlal(al, dt, rd, rn, rm);
9229 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9232 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9241 vmlal(cond, dt, rd, rn, rm);
9243 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9244 Vmlal(al, dt, rd, rn, rm);
9251 DRegisterLane rm) {
9254 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9263 vmls(cond, dt, rd, rn, rm);
9265 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
9266 Vmls(al, dt, rd, rn, rm);
9273 DRegisterLane rm) {
9276 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9285 vmls(cond, dt, rd, rn, rm);
9287 void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
9288 Vmls(al, dt, rd, rn, rm);
9292 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9295 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9304 vmls(cond, dt, rd, rn, rm);
9306 void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9307 Vmls(al, dt, rd, rn, rm);
9311 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9314 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9323 vmls(cond, dt, rd, rn, rm);
9325 void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9326 Vmls(al, dt, rd, rn, rm);
9330 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9342 vmls(cond, dt, rd, rn, rm);
9344 void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9345 Vmls(al, dt, rd, rn, rm);
9352 DRegisterLane rm) {
9355 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9364 vmlsl(cond, dt, rd, rn, rm);
9366 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
9367 Vmlsl(al, dt, rd, rn, rm);
9371 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9374 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9383 vmlsl(cond, dt, rd, rn, rm);
9385 void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9386 Vmlsl(al, dt, rd, rn, rm);
9419 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
9422 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9431 vmov(cond, rt, rt2, rm);
9433 void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
9435 void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
9436 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9447 vmov(cond, rm, rt, rt2);
9449 void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
9452 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
9455 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9465 vmov(cond, rt, rt2, rm, rm1);
9467 void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
9468 Vmov(al, rt, rt2, rm, rm1);
9472 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
9473 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9485 vmov(cond, rm, rm1, rt, rt2);
9487 void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
9488 Vmov(al, rm, rm1, rt, rt2);
9597 void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
9599 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9608 vmovl(cond, dt, rd, rm);
9610 void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
9612 void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
9614 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9623 vmovn(cond, dt, rd, rm);
9625 void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
9708 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9711 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9720 vmul(cond, dt, rd, rn, rm);
9722 void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9723 Vmul(al, dt, rd, rn, rm);
9727 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9739 vmul(cond, dt, rd, rn, rm);
9741 void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9742 Vmul(al, dt, rd, rn, rm);
9746 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9749 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9758 vmul(cond, dt, rd, rn, rm);
9760 void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9761 Vmul(al, dt, rd, rn, rm);
9789 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9792 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9801 vmull(cond, dt, rd, rn, rm);
9803 void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
9804 Vmull(al, dt, rd, rn, rm);
9847 void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9849 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9858 vneg(cond, dt, rd, rm);
9860 void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
9862 void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9864 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9873 vneg(cond, dt, rd, rm);
9875 void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
9877 void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9879 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9888 vneg(cond, dt, rd, rm);
9890 void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
9893 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9896 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9905 vnmla(cond, dt, rd, rn, rm);
9907 void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9908 Vnmla(al, dt, rd, rn, rm);
9912 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9915 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9924 vnmla(cond, dt, rd, rn, rm);
9926 void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9927 Vnmla(al, dt, rd, rn, rm);
9931 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9934 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9943 vnmls(cond, dt, rd, rn, rm);
9945 void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9946 Vnmls(al, dt, rd, rn, rm);
9950 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9953 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9962 vnmls(cond, dt, rd, rn, rm);
9964 void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9965 Vnmls(al, dt, rd, rn, rm);
9969 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9981 vnmul(cond, dt, rd, rn, rm);
9983 void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9984 Vnmul(al, dt, rd, rn, rm);
9988 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10000 vnmul(cond, dt, rd, rn, rm);
10002 void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10003 Vnmul(al, dt, rd, rn, rm);
10112 void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10114 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10123 vpadal(cond, dt, rd, rm);
10125 void Vpadal(DataType dt, DRegister rd, DRegister rm) {
10126 Vpadal(al, dt, rd, rm);
10129 void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10131 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10140 vpadal(cond, dt, rd, rm);
10142 void Vpadal(DataType dt, QRegister rd, QRegister rm) {
10143 Vpadal(al, dt, rd, rm);
10147 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10159 vpadd(cond, dt, rd, rn, rm);
10161 void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10162 Vpadd(al, dt, rd, rn, rm);
10165 void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10167 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10176 vpaddl(cond, dt, rd, rm);
10178 void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
10179 Vpaddl(al, dt, rd, rm);
10182 void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10193 vpaddl(cond, dt, rd, rm);
10195 void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
10196 Vpaddl(al, dt, rd, rm);
10200 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10212 vpmax(cond, dt, rd, rn, rm);
10214 void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10215 Vpmax(al, dt, rd, rn, rm);
10219 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10222 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10231 vpmin(cond, dt, rd, rn, rm);
10233 void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10234 Vpmin(al, dt, rd, rn, rm);
10313 void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10315 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10324 vqabs(cond, dt, rd, rm);
10326 void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
10328 void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10330 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10339 vqabs(cond, dt, rd, rm);
10341 void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
10344 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10356 vqadd(cond, dt, rd, rn, rm);
10358 void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10359 Vqadd(al, dt, rd, rn, rm);
10363 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10366 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10375 vqadd(cond, dt, rd, rn, rm);
10377 void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10378 Vqadd(al, dt, rd, rn, rm);
10382 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10385 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10394 vqdmlal(cond, dt, rd, rn, rm);
10396 void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10397 Vqdmlal(al, dt, rd, rn, rm);
10425 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10428 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10437 vqdmlsl(cond, dt, rd, rn, rm);
10439 void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10440 Vqdmlsl(al, dt, rd, rn, rm);
10468 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10471 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10480 vqdmulh(cond, dt, rd, rn, rm);
10482 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10483 Vqdmulh(al, dt, rd, rn, rm);
10487 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10490 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10499 vqdmulh(cond, dt, rd, rn, rm);
10501 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10502 Vqdmulh(al, dt, rd, rn, rm);
10509 DRegisterLane rm) {
10512 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10521 vqdmulh(cond, dt, rd, rn, rm);
10523 void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
10524 Vqdmulh(al, dt, rd, rn, rm);
10531 DRegisterLane rm) {
10534 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10543 vqdmulh(cond, dt, rd, rn, rm);
10545 void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
10546 Vqdmulh(al, dt, rd, rn, rm);
10550 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10562 vqdmull(cond, dt, rd, rn, rm);
10564 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10565 Vqdmull(al, dt, rd, rn, rm);
10572 DRegisterLane rm) {
10575 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10584 vqdmull(cond, dt, rd, rn, rm);
10586 void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
10587 Vqdmull(al, dt, rd, rn, rm);
10590 void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
10592 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10601 vqmovn(cond, dt, rd, rm);
10603 void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
10604 Vqmovn(al, dt, rd, rm);
10607 void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
10609 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10618 vqmovun(cond, dt, rd, rm);
10620 void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
10621 Vqmovun(al, dt, rd, rm);
10624 void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10626 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10635 vqneg(cond, dt, rd, rm);
10637 void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
10639 void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10641 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10650 vqneg(cond, dt, rd, rm);
10652 void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
10655 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10658 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10667 vqrdmulh(cond, dt, rd, rn, rm);
10669 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10670 Vqrdmulh(al, dt, rd, rn, rm);
10674 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10677 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10686 vqrdmulh(cond, dt, rd, rn, rm);
10688 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10689 Vqrdmulh(al, dt, rd, rn, rm);
10696 DRegisterLane rm) {
10699 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10708 vqrdmulh(cond, dt, rd, rn, rm);
10710 void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
10711 Vqrdmulh(al, dt, rd, rn, rm);
10718 DRegisterLane rm) {
10721 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10730 vqrdmulh(cond, dt, rd, rn, rm);
10732 void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
10733 Vqrdmulh(al, dt, rd, rn, rm);
10737 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
10739 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10749 vqrshl(cond, dt, rd, rm, rn);
10751 void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
10752 Vqrshl(al, dt, rd, rm, rn);
10756 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
10758 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10768 vqrshl(cond, dt, rd, rm, rn);
10770 void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
10771 Vqrshl(al, dt, rd, rm, rn);
10777 QRegister rm,
10780 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10790 vqrshrn(cond, dt, rd, rm, operand);
10794 QRegister rm,
10796 Vqrshrn(al, dt, rd, rm, operand);
10802 QRegister rm,
10805 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10815 vqrshrun(cond, dt, rd, rm, operand);
10819 QRegister rm,
10821 Vqrshrun(al, dt, rd, rm, operand);
10827 DRegister rm,
10830 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10840 vqshl(cond, dt, rd, rm, operand);
10842 void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
10843 Vqshl(al, dt, rd, rm, operand);
10849 QRegister rm,
10852 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10862 vqshl(cond, dt, rd, rm, operand);
10864 void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
10865 Vqshl(al, dt, rd, rm, operand);
10871 DRegister rm,
10874 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10884 vqshlu(cond, dt, rd, rm, operand);
10888 DRegister rm,
10890 Vqshlu(al, dt, rd, rm, operand);
10896 QRegister rm,
10899 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10909 vqshlu(cond, dt, rd, rm, operand);
10913 QRegister rm,
10915 Vqshlu(al, dt, rd, rm, operand);
10921 QRegister rm,
10924 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10934 vqshrn(cond, dt, rd, rm, operand);
10938 QRegister rm,
10940 Vqshrn(al, dt, rd, rm, operand);
10946 QRegister rm,
10949 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10959 vqshrun(cond, dt, rd, rm, operand);
10963 QRegister rm,
10965 Vqshrun(al, dt, rd, rm, operand);
10969 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10972 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10981 vqsub(cond, dt, rd, rn, rm);
10983 void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10984 Vqsub(al, dt, rd, rn, rm);
10988 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10991 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11000 vqsub(cond, dt, rd, rn, rm);
11002 void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11003 Vqsub(al, dt, rd, rn, rm);
11007 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11010 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11019 vraddhn(cond, dt, rd, rn, rm);
11021 void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11022 Vraddhn(al, dt, rd, rn, rm);
11025 void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11027 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11036 vrecpe(cond, dt, rd, rm);
11038 void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
11039 Vrecpe(al, dt, rd, rm);
11042 void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
11044 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11053 vrecpe(cond, dt, rd, rm);
11055 void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
11056 Vrecpe(al, dt, rd, rm);
11060 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11063 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11072 vrecps(cond, dt, rd, rn, rm);
11074 void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11075 Vrecps(al, dt, rd, rn, rm);
11079 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11082 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11091 vrecps(cond, dt, rd, rn, rm);
11093 void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11094 Vrecps(al, dt, rd, rn, rm);
11097 void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11099 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11108 vrev16(cond, dt, rd, rm);
11110 void Vrev16(DataType dt, DRegister rd, DRegister rm) {
11111 Vrev16(al, dt, rd, rm);
11114 void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
11116 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11125 vrev16(cond, dt, rd, rm);
11127 void Vrev16(DataType dt, QRegister rd, QRegister rm) {
11128 Vrev16(al, dt, rd, rm);
11131 void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11133 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11142 vrev32(cond, dt, rd, rm);
11144 void Vrev32(DataType dt, DRegister rd, DRegister rm) {
11145 Vrev32(al, dt, rd, rm);
11148 void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
11150 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11159 vrev32(cond, dt, rd, rm);
11161 void Vrev32(DataType dt, QRegister rd, QRegister rm) {
11162 Vrev32(al, dt, rd, rm);
11165 void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11167 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11176 vrev64(cond, dt, rd, rm);
11178 void Vrev64(DataType dt, DRegister rd, DRegister rm) {
11179 Vrev64(al, dt, rd, rm);
11182 void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
11184 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11193 vrev64(cond, dt, rd, rm);
11195 void Vrev64(DataType dt, QRegister rd, QRegister rm) {
11196 Vrev64(al, dt, rd, rm);
11200 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11203 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11212 vrhadd(cond, dt, rd, rn, rm);
11214 void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11215 Vrhadd(al, dt, rd, rn, rm);
11219 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11222 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11231 vrhadd(cond, dt, rd, rn, rm);
11233 void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11234 Vrhadd(al, dt, rd, rn, rm);
11237 void Vrinta(DataType dt, DRegister rd, DRegister rm) {
11239 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11243 vrinta(dt, rd, rm);
11246 void Vrinta(DataType dt, QRegister rd, QRegister rm) {
11248 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11252 vrinta(dt, rd, rm);
11255 void Vrinta(DataType dt, SRegister rd, SRegister rm) {
11257 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11261 vrinta(dt, rd, rm);
11264 void Vrintm(DataType dt, DRegister rd, DRegister rm) {
11266 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11270 vrintm(dt, rd, rm);
11273 void Vrintm(DataType dt, QRegister rd, QRegister rm) {
11275 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11279 vrintm(dt, rd, rm);
11282 void Vrintm(DataType dt, SRegister rd, SRegister rm) {
11284 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11288 vrintm(dt, rd, rm);
11291 void Vrintn(DataType dt, DRegister rd, DRegister rm) {
11293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11297 vrintn(dt, rd, rm);
11300 void Vrintn(DataType dt, QRegister rd, QRegister rm) {
11302 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11306 vrintn(dt, rd, rm);
11309 void Vrintn(DataType dt, SRegister rd, SRegister rm) {
11311 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11315 vrintn(dt, rd, rm);
11318 void Vrintp(DataType dt, DRegister rd, DRegister rm) {
11320 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11324 vrintp(dt, rd, rm);
11327 void Vrintp(DataType dt, QRegister rd, QRegister rm) {
11329 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11333 vrintp(dt, rd, rm);
11336 void Vrintp(DataType dt, SRegister rd, SRegister rm) {
11338 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11342 vrintp(dt, rd, rm);
11345 void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm) {
11347 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11356 vrintr(cond, dt, rd, rm);
11358 void Vrintr(DataType dt, SRegister rd, SRegister rm) {
11359 Vrintr(al, dt, rd, rm);
11362 void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11364 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11373 vrintr(cond, dt, rd, rm);
11375 void Vrintr(DataType dt, DRegister rd, DRegister rm) {
11376 Vrintr(al, dt, rd, rm);
11379 void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11381 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11390 vrintx(cond, dt, rd, rm);
11392 void Vrintx(DataType dt, DRegister rd, DRegister rm) {
11393 Vrintx(al, dt, rd, rm);
11396 void Vrintx(DataType dt, QRegister rd, QRegister rm) {
11398 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11402 vrintx(dt, rd, rm);
11405 void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm) {
11407 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11416 vrintx(cond, dt, rd, rm);
11418 void Vrintx(DataType dt, SRegister rd, SRegister rm) {
11419 Vrintx(al, dt, rd, rm);
11422 void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11424 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11433 vrintz(cond, dt, rd, rm);
11435 void Vrintz(DataType dt, DRegister rd, DRegister rm) {
11436 Vrintz(al, dt, rd, rm);
11439 void Vrintz(DataType dt, QRegister rd, QRegister rm) {
11441 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11445 vrintz(dt, rd, rm);
11448 void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm) {
11450 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11459 vrintz(cond, dt, rd, rm);
11461 void Vrintz(DataType dt, SRegister rd, SRegister rm) {
11462 Vrintz(al, dt, rd, rm);
11466 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
11468 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11478 vrshl(cond, dt, rd, rm, rn);
11480 void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
11481 Vrshl(al, dt, rd, rm, rn);
11485 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
11487 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11497 vrshl(cond, dt, rd, rm, rn);
11499 void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
11500 Vrshl(al, dt, rd, rm, rn);
11506 DRegister rm,
11509 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11519 vrshr(cond, dt, rd, rm, operand);
11521 void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
11522 Vrshr(al, dt, rd, rm, operand);
11528 QRegister rm,
11531 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11541 vrshr(cond, dt, rd, rm, operand);
11543 void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
11544 Vrshr(al, dt, rd, rm, operand);
11550 QRegister rm,
11553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11563 vrshrn(cond, dt, rd, rm, operand);
11567 QRegister rm,
11569 Vrshrn(al, dt, rd, rm, operand);
11572 void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11574 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11583 vrsqrte(cond, dt, rd, rm);
11585 void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
11586 Vrsqrte(al, dt, rd, rm);
11589 void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
11591 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11600 vrsqrte(cond, dt, rd, rm);
11602 void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
11603 Vrsqrte(al, dt, rd, rm);
11607 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11610 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11619 vrsqrts(cond, dt, rd, rn, rm);
11621 void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11622 Vrsqrts(al, dt, rd, rn, rm);
11626 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11638 vrsqrts(cond, dt, rd, rn, rm);
11640 void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
11641 Vrsqrts(al, dt, rd, rn, rm);
11647 DRegister rm,
11650 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11660 vrsra(cond, dt, rd, rm, operand);
11662 void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
11663 Vrsra(al, dt, rd, rm, operand);
11669 QRegister rm,
11672 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11682 vrsra(cond, dt, rd, rm, operand);
11684 void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
11685 Vrsra(al, dt, rd, rm, operand);
11689 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11692 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11701 vrsubhn(cond, dt, rd, rn, rm);
11703 void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
11704 Vrsubhn(al, dt, rd, rn, rm);
11707 void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11710 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11714 vseleq(dt, rd, rn, rm);
11717 void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11720 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11724 vseleq(dt, rd, rn, rm);
11727 void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11730 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11734 vselge(dt, rd, rn, rm);
11737 void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11740 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11744 vselge(dt, rd, rn, rm);
11747 void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11750 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11754 vselgt(dt, rd, rn, rm);
11757 void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11760 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11764 vselgt(dt, rd, rn, rm);
11767 void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
11770 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11774 vselvs(dt, rd, rn, rm);
11777 void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
11780 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11784 vselvs(dt, rd, rn, rm);
11790 DRegister rm,
11793 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11803 vshl(cond, dt, rd, rm, operand);
11805 void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
11806 Vshl(al, dt, rd, rm, operand);
11812 QRegister rm,
11815 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11825 vshl(cond, dt, rd, rm, operand);
11827 void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
11828 Vshl(al, dt, rd, rm, operand);
11834 DRegister rm,
11837 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11847 vshll(cond, dt, rd, rm, operand);
11849 void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
11850 Vshll(al, dt, rd, rm, operand);
11856 DRegister rm,
11859 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11869 vshr(cond, dt, rd, rm, operand);
11871 void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
11872 Vshr(al, dt, rd, rm, operand);
11878 QRegister rm,
11881 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11891 vshr(cond, dt, rd, rm, operand);
11893 void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
11894 Vshr(al, dt, rd, rm, operand);
11900 QRegister rm,
11903 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11913 vshrn(cond, dt, rd, rm, operand);
11915 void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
11916 Vshrn(al, dt, rd, rm, operand);
11922 DRegister rm,
11925 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11935 vsli(cond, dt, rd, rm, operand);
11937 void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
11938 Vsli(al, dt, rd, rm, operand);
11944 QRegister rm,
11947 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11957 vsli(cond, dt, rd, rm, operand);
11959 void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
11960 Vsli(al, dt, rd, rm, operand);
11963 void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
11965 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11974 vsqrt(cond, dt, rd, rm);
11976 void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
11978 void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
11980 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
11989 vsqrt(cond, dt, rd, rm);
11991 void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
11996 DRegister rm,
11999 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12009 vsra(cond, dt, rd, rm, operand);
12011 void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
12012 Vsra(al, dt, rd, rm, operand);
12018 QRegister rm,
12021 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12031 vsra(cond, dt, rd, rm, operand);
12033 void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
12034 Vsra(al, dt, rd, rm, operand);
12040 DRegister rm,
12043 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12053 vsri(cond, dt, rd, rm, operand);
12055 void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
12056 Vsri(al, dt, rd, rm, operand);
12062 QRegister rm,
12065 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12075 vsri(cond, dt, rd, rm, operand);
12077 void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
12078 Vsri(al, dt, rd, rm, operand);
12442 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12445 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12454 vsub(cond, dt, rd, rn, rm);
12456 void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12457 Vsub(al, dt, rd, rn, rm);
12461 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12464 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12473 vsub(cond, dt, rd, rn, rm);
12475 void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12476 Vsub(al, dt, rd, rn, rm);
12480 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
12483 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12492 vsub(cond, dt, rd, rn, rm);
12494 void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
12495 Vsub(al, dt, rd, rn, rm);
12499 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
12502 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12511 vsubhn(cond, dt, rd, rn, rm);
12513 void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
12514 Vsubhn(al, dt, rd, rn, rm);
12518 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
12521 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12530 vsubl(cond, dt, rd, rn, rm);
12532 void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
12533 Vsubl(al, dt, rd, rn, rm);
12537 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
12540 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12549 vsubw(cond, dt, rd, rn, rm);
12551 void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
12552 Vsubw(al, dt, rd, rn, rm);
12555 void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
12557 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12566 vswp(cond, dt, rd, rm);
12568 void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
12569 void Vswp(Condition cond, DRegister rd, DRegister rm) {
12570 Vswp(cond, kDataTypeValueNone, rd, rm);
12572 void Vswp(DRegister rd, DRegister rm) {
12573 Vswp(al, kDataTypeValueNone, rd, rm);
12576 void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
12578 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12587 vswp(cond, dt, rd, rm);
12589 void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
12590 void Vswp(Condition cond, QRegister rd, QRegister rm) {
12591 Vswp(cond, kDataTypeValueNone, rd, rm);
12593 void Vswp(QRegister rd, QRegister rm) {
12594 Vswp(al, kDataTypeValueNone, rd, rm);
12601 DRegister rm) {
12604 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12613 vtbl(cond, dt, rd, nreglist, rm);
12618 DRegister rm) {
12619 Vtbl(al, dt, rd, nreglist, rm);
12626 DRegister rm) {
12629 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12638 vtbx(cond, dt, rd, nreglist, rm);
12643 DRegister rm) {
12644 Vtbx(al, dt, rd, nreglist, rm);
12647 void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
12649 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12658 vtrn(cond, dt, rd, rm);
12660 void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
12662 void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
12664 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12673 vtrn(cond, dt, rd, rm);
12675 void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
12678 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12681 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12690 vtst(cond, dt, rd, rn, rm);
12692 void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
12693 Vtst(al, dt, rd, rn, rm);
12697 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12700 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12709 vtst(cond, dt, rd, rn, rm);
12711 void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
12712 Vtst(al, dt, rd, rn, rm);
12715 void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
12717 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12726 vuzp(cond, dt, rd, rm);
12728 void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
12730 void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
12732 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12741 vuzp(cond, dt, rd, rm);
12743 void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
12745 void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
12747 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12756 vzip(cond, dt, rd, rm);
12758 void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
12760 void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
12762 VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
12771 vzip(cond, dt, rd, rm);
12773 void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
12787 void Vabs(Condition cond, VRegister rd, VRegister rm) {
12789 VIXL_ASSERT(rd.GetType() == rm.GetType());
12791 Vabs(cond, F32, rd.S(), rm.S());
12793 Vabs(cond, F64, rd.D(), rm.D());
12796 void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
12797 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12800 VIXL_ASSERT(rd.GetType() == rm.GetType());
12802 Vadd(cond, F32, rd.S(), rn.S(), rm.S());
12804 Vadd(cond, F64, rd.D(), rn.D(), rm.D());
12807 void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
12808 void Vcmp(Condition cond, VRegister rd, VRegister rm) {
12810 VIXL_ASSERT(rd.GetType() == rm.GetType());
12812 Vcmp(cond, F32, rd.S(), rm.S());
12814 Vcmp(cond, F64, rd.D(), rm.D());
12817 void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
12818 void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
12820 VIXL_ASSERT(rd.GetType() == rm.GetType());
12822 Vcmpe(cond, F32, rd.S(), rm.S());
12824 Vcmpe(cond, F64, rd.D(), rm.D());
12827 void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
12828 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12831 VIXL_ASSERT(rd.GetType() == rm.GetType());
12833 Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
12835 Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
12838 void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
12839 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12842 VIXL_ASSERT(rd.GetType() == rm.GetType());
12844 Vfma(cond, F32, rd.S(), rn.S(), rm.S());
12846 Vfma(cond, F64, rd.D(), rn.D(), rm.D());
12849 void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
12850 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12853 VIXL_ASSERT(rd.GetType() == rm.GetType());
12855 Vfms(cond, F32, rd.S(), rn.S(), rm.S());
12857 Vfms(cond, F64, rd.D(), rn.D(), rm.D());
12860 void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
12861 void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12864 VIXL_ASSERT(rd.GetType() == rm.GetType());
12866 Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
12868 Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
12871 void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
12872 Vfnma(al, rd, rn, rm);
12874 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12877 VIXL_ASSERT(rd.GetType() == rm.GetType());
12879 Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
12881 Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
12884 void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
12885 Vfnms(al, rd, rn, rm);
12887 void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
12890 VIXL_ASSERT(rd.GetType() == rm.GetType());
12892 Vmaxnm(F32, rd.S(), rn.S(), rm.S());
12894 Vmaxnm(F64, rd.D(), rn.D(), rm.D());
12897 void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
12900 VIXL_ASSERT(rd.GetType() == rm.GetType());
12902 Vminnm(F32, rd.S(), rn.S(), rm.S());
12904 Vminnm(F64, rd.D(), rn.D(), rm.D());
12907 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12910 VIXL_ASSERT(rd.GetType() == rm.GetType());
12912 Vmla(cond, F32, rd.S(), rn.S(), rm.S());
12914 Vmla(cond, F64, rd.D(), rn.D(), rm.D());
12917 void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
12918 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12921 VIXL_ASSERT(rd.GetType() == rm.GetType());
12923 Vmls(cond, F32, rd.S(), rn.S(), rm.S());
12925 Vmls(cond, F64, rd.D(), rn.D(), rm.D());
12928 void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
12929 void Vmov(Condition cond, VRegister rd, VRegister rm) {
12931 VIXL_ASSERT(rd.GetType() == rm.GetType());
12933 Vmov(cond, F32, rd.S(), rm.S());
12935 Vmov(cond, F64, rd.D(), rm.D());
12938 void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
12939 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12942 VIXL_ASSERT(rd.GetType() == rm.GetType());
12944 Vmul(cond, F32, rd.S(), rn.S(), rm.S());
12946 Vmul(cond, F64, rd.D(), rn.D(), rm.D());
12949 void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
12950 void Vneg(Condition cond, VRegister rd, VRegister rm) {
12952 VIXL_ASSERT(rd.GetType() == rm.GetType());
12954 Vneg(cond, F32, rd.S(), rm.S());
12956 Vneg(cond, F64, rd.D(), rm.D());
12959 void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
12960 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12963 VIXL_ASSERT(rd.GetType() == rm.GetType());
12965 Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
12967 Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
12970 void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
12971 Vnmla(al, rd, rn, rm);
12973 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12976 VIXL_ASSERT(rd.GetType() == rm.GetType());
12978 Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
12980 Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
12983 void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
12984 Vnmls(al, rd, rn, rm);
12986 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
12989 VIXL_ASSERT(rd.GetType() == rm.GetType());
12991 Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
12993 Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
12996 void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
12997 Vnmul(al, rd, rn, rm);
12999 void Vrinta(VRegister rd, VRegister rm) {
13001 VIXL_ASSERT(rd.GetType() == rm.GetType());
13003 Vrinta(F32, rd.S(), rm.S());
13005 Vrinta(F64, rd.D(), rm.D());
13008 void Vrintm(VRegister rd, VRegister rm) {
13010 VIXL_ASSERT(rd.GetType() == rm.GetType());
13012 Vrintm(F32, rd.S(), rm.S());
13014 Vrintm(F64, rd.D(), rm.D());
13017 void Vrintn(VRegister rd, VRegister rm) {
13019 VIXL_ASSERT(rd.GetType() == rm.GetType());
13021 Vrintn(F32, rd.S(), rm.S());
13023 Vrintn(F64, rd.D(), rm.D());
13026 void Vrintp(VRegister rd, VRegister rm) {
13028 VIXL_ASSERT(rd.GetType() == rm.GetType());
13030 Vrintp(F32, rd.S(), rm.S());
13032 Vrintp(F64, rd.D(), rm.D());
13035 void Vrintr(Condition cond, VRegister rd, VRegister rm) {
13037 VIXL_ASSERT(rd.GetType() == rm.GetType());
13039 Vrintr(cond, F32, rd.S(), rm.S());
13041 Vrintr(cond, F64, rd.D(), rm.D());
13044 void Vrintr(VRegister rd, VRegister rm) { Vrintr(al, rd, rm); }
13045 void Vrintx(Condition cond, VRegister rd, VRegister rm) {
13047 VIXL_ASSERT(rd.GetType() == rm.GetType());
13049 Vrintx(cond, F32, rd.S(), rm.S());
13051 Vrintx(cond, F64, rd.D(), rm.D());
13054 void Vrintx(VRegister rd, VRegister rm) { Vrintx(al, rd, rm); }
13055 void Vrintz(Condition cond, VRegister rd, VRegister rm) {
13057 VIXL_ASSERT(rd.GetType() == rm.GetType());
13059 Vrintz(cond, F32, rd.S(), rm.S());
13061 Vrintz(cond, F64, rd.D(), rm.D());
13064 void Vrintz(VRegister rd, VRegister rm) { Vrintz(al, rd, rm); }
13065 void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
13068 VIXL_ASSERT(rd.GetType() == rm.GetType());
13070 Vseleq(F32, rd.S(), rn.S(), rm.S());
13072 Vseleq(F64, rd.D(), rn.D(), rm.D());
13075 void Vselge(VRegister rd, VRegister rn, VRegister rm) {
13078 VIXL_ASSERT(rd.GetType() == rm.GetType());
13080 Vselge(F32, rd.S(), rn.S(), rm.S());
13082 Vselge(F64, rd.D(), rn.D(), rm.D());
13085 void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
13088 VIXL_ASSERT(rd.GetType() == rm.GetType());
13090 Vselgt(F32, rd.S(), rn.S(), rm.S());
13092 Vselgt(F64, rd.D(), rn.D(), rm.D());
13095 void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
13098 VIXL_ASSERT(rd.GetType() == rm.GetType());
13100 Vselvs(F32, rd.S(), rn.S(), rm.S());
13102 Vselvs(F64, rd.D(), rn.D(), rm.D());
13105 void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
13107 VIXL_ASSERT(rd.GetType() == rm.GetType());
13109 Vsqrt(cond, F32, rd.S(), rm.S());
13111 Vsqrt(cond, F64, rd.D(), rm.D());
13114 void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
13115 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
13118 VIXL_ASSERT(rd.GetType() == rm.GetType());
13120 Vsub(cond, F32, rd.S(), rn.S(), rm.S());
13122 Vsub(cond, F64, rd.D(), rn.D(), rm.D());
13125 void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
13139 "void Vrinta(DataType dt, DRegister rd, DRegister rm)",
13140 void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13143 return Vrinta(dt1, rd, rm);
13146 "void Vrinta(DataType dt, QRegister rd, QRegister rm)",
13147 void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13150 return Vrinta(dt1, rd, rm);
13153 "void Vrinta(DataType dt, SRegister rd, SRegister rm)",
13154 void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13157 return Vrinta(dt1, rd, rm);
13161 "void Vrintm(DataType dt, DRegister rd, DRegister rm)",
13162 void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13165 return Vrintm(dt1, rd, rm);
13168 "void Vrintm(DataType dt, QRegister rd, QRegister rm)",
13169 void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13172 return Vrintm(dt1, rd, rm);
13175 "void Vrintm(DataType dt, SRegister rd, SRegister rm)",
13176 void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13179 return Vrintm(dt1, rd, rm);
13183 "void Vrintn(DataType dt, DRegister rd, DRegister rm)",
13184 void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13187 return Vrintn(dt1, rd, rm);
13190 "void Vrintn(DataType dt, QRegister rd, QRegister rm)",
13191 void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13194 return Vrintn(dt1, rd, rm);
13197 "void Vrintn(DataType dt, SRegister rd, SRegister rm)",
13198 void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13201 return Vrintn(dt1, rd, rm);
13205 "void Vrintp(DataType dt, DRegister rd, DRegister rm)",
13206 void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13209 return Vrintp(dt1, rd, rm);
13212 "void Vrintp(DataType dt, QRegister rd, QRegister rm)",
13213 void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13216 return Vrintp(dt1, rd, rm);
13219 "void Vrintp(DataType dt, SRegister rd, SRegister rm)",
13220 void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13223 return Vrintp(dt1, rd, rm);
13227 "void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm)",
13232 SRegister rm)) {
13235 return Vrintr(cond, dt1, rd, rm);
13238 "void Vrintr(DataType dt, SRegister rd, SRegister rm)",
13239 void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13242 return Vrintr(dt1, rd, rm);
13246 "void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm)",
13251 DRegister rm)) {
13254 return Vrintr(cond, dt1, rd, rm);
13257 "void Vrintr(DataType dt, DRegister rd, DRegister rm)",
13258 void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13261 return Vrintr(dt1, rd, rm);
13265 "void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm)",
13270 DRegister rm)) {
13273 return Vrintx(cond, dt1, rd, rm);
13276 "void Vrintx(DataType dt, DRegister rd, DRegister rm)",
13277 void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13280 return Vrintx(dt1, rd, rm);
13284 "void Vrintx(DataType dt, QRegister rd, QRegister rm)",
13285 void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13288 return Vrintx(dt1, rd, rm);
13292 "void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm)",
13297 SRegister rm)) {
13300 return Vrintx(cond, dt1, rd, rm);
13303 "void Vrintx(DataType dt, SRegister rd, SRegister rm)",
13304 void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13307 return Vrintx(dt1, rd, rm);
13311 "void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm)",
13316 DRegister rm)) {
13319 return Vrintz(cond, dt1, rd, rm);
13322 "void Vrintz(DataType dt, DRegister rd, DRegister rm)",
13323 void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13326 return Vrintz(dt1, rd, rm);
13330 "void Vrintz(DataType dt, QRegister rd, QRegister rm)",
13331 void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13334 return Vrintz(dt1, rd, rm);
13338 "void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm)",
13343 SRegister rm)) {
13346 return Vrintz(cond, dt1, rd, rm);
13349 "void Vrintz(DataType dt, SRegister rd, SRegister rm)",
13350 void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13353 return Vrintz(dt1, rd, rm);