Lines Matching refs:rdlo
4272 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4273 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4285 smlal(cond, rdlo, rdhi, rn, rm);
4287 void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4288 Smlal(al, rdlo, rdhi, rn, rm);
4292 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4293 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4305 smlalbb(cond, rdlo, rdhi, rn, rm);
4307 void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
4308 Smlalbb(al, rdlo, rdhi, rn, rm);
4312 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4313 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4325 smlalbt(cond, rdlo, rdhi, rn, rm);
4327 void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
4328 Smlalbt(al, rdlo, rdhi, rn, rm);
4332 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4333 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4345 smlald(cond, rdlo, rdhi, rn, rm);
4347 void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
4348 Smlald(al, rdlo, rdhi, rn, rm);
4352 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4353 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4365 smlaldx(cond, rdlo, rdhi, rn, rm);
4367 void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4368 Smlaldx(al, rdlo, rdhi, rn, rm);
4372 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4373 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4385 smlals(cond, rdlo, rdhi, rn, rm);
4387 void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
4388 Smlals(al, rdlo, rdhi, rn, rm);
4392 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4393 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4405 smlaltb(cond, rdlo, rdhi, rn, rm);
4407 void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
4408 Smlaltb(al, rdlo, rdhi, rn, rm);
4412 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4413 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4425 smlaltt(cond, rdlo, rdhi, rn, rm);
4427 void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
4428 Smlaltt(al, rdlo, rdhi, rn, rm);
4552 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4565 smlsld(cond, rdlo, rdhi, rn, rm);
4567 void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
4568 Smlsld(al, rdlo, rdhi, rn, rm);
4572 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4573 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4585 smlsldx(cond, rdlo, rdhi, rn, rm);
4587 void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
4588 Smlsldx(al, rdlo, rdhi, rn, rm);
4768 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4769 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4781 smull(cond, rdlo, rdhi, rn, rm);
4783 void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4784 Smull(al, rdlo, rdhi, rn, rm);
4788 Register rdlo,
4794 Smull(cond, rdlo, rdhi, rn, rm);
4797 Smulls(cond, rdlo, rdhi, rn, rm);
4800 Smull(cond, rdlo, rdhi, rn, rm);
4805 Register rdlo,
4809 Smull(flags, al, rdlo, rdhi, rn, rm);
4813 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4814 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4826 smulls(cond, rdlo, rdhi, rn, rm);
4828 void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4829 Smulls(al, rdlo, rdhi, rn, rm);
5938 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5939 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5951 umaal(cond, rdlo, rdhi, rn, rm);
5953 void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
5954 Umaal(al, rdlo, rdhi, rn, rm);
5958 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5959 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5971 umlal(cond, rdlo, rdhi, rn, rm);
5973 void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
5974 Umlal(al, rdlo, rdhi, rn, rm);
5978 Register rdlo,
5984 Umlal(cond, rdlo, rdhi, rn, rm);
5987 Umlals(cond, rdlo, rdhi, rn, rm);
5990 Umlal(cond, rdlo, rdhi, rn, rm);
5995 Register rdlo,
5999 Umlal(flags, al, rdlo, rdhi, rn, rm);
6003 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6004 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
6016 umlals(cond, rdlo, rdhi, rn, rm);
6018 void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
6019 Umlals(al, rdlo, rdhi, rn, rm);
6023 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6024 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
6036 umull(cond, rdlo, rdhi, rn, rm);
6038 void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
6039 Umull(al, rdlo, rdhi, rn, rm);
6043 Register rdlo,
6049 Umull(cond, rdlo, rdhi, rn, rm);
6052 Umulls(cond, rdlo, rdhi, rn, rm);
6055 Umull(cond, rdlo, rdhi, rn, rm);
6060 Register rdlo,
6064 Umull(flags, al, rdlo, rdhi, rn, rm);
6068 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
6069 VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
6081 umulls(cond, rdlo, rdhi, rn, rm);
6083 void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
6084 Umulls(al, rdlo, rdhi, rn, rm);