Lines Matching defs:dt1
7651 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7662 vcvt(cond, dt1, dt2, rd, rm);
7664 void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7665 Vcvt(al, dt1, dt2, rd, rm);
7669 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7680 vcvt(cond, dt1, dt2, rd, rm);
7682 void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7683 Vcvt(al, dt1, dt2, rd, rm);
7687 DataType dt1,
7702 vcvt(cond, dt1, dt2, rd, rm, fbits);
7705 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
7706 Vcvt(al, dt1, dt2, rd, rm, fbits);
7710 DataType dt1,
7725 vcvt(cond, dt1, dt2, rd, rm, fbits);
7728 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
7729 Vcvt(al, dt1, dt2, rd, rm, fbits);
7733 DataType dt1,
7748 vcvt(cond, dt1, dt2, rd, rm, fbits);
7751 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
7752 Vcvt(al, dt1, dt2, rd, rm, fbits);
7756 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7767 vcvt(cond, dt1, dt2, rd, rm);
7769 void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7770 Vcvt(al, dt1, dt2, rd, rm);
7774 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7785 vcvt(cond, dt1, dt2, rd, rm);
7787 void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7788 Vcvt(al, dt1, dt2, rd, rm);
7792 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
7803 vcvt(cond, dt1, dt2, rd, rm);
7805 void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
7806 Vcvt(al, dt1, dt2, rd, rm);
7810 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
7821 vcvt(cond, dt1, dt2, rd, rm);
7823 void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
7824 Vcvt(al, dt1, dt2, rd, rm);
7828 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7839 vcvt(cond, dt1, dt2, rd, rm);
7841 void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7842 Vcvt(al, dt1, dt2, rd, rm);
7845 void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7851 vcvta(dt1, dt2, rd, rm);
7854 void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7860 vcvta(dt1, dt2, rd, rm);
7863 void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7869 vcvta(dt1, dt2, rd, rm);
7872 void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7878 vcvta(dt1, dt2, rd, rm);
7882 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7893 vcvtb(cond, dt1, dt2, rd, rm);
7895 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7896 Vcvtb(al, dt1, dt2, rd, rm);
7900 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7911 vcvtb(cond, dt1, dt2, rd, rm);
7913 void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
7914 Vcvtb(al, dt1, dt2, rd, rm);
7918 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7929 vcvtb(cond, dt1, dt2, rd, rm);
7931 void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7932 Vcvtb(al, dt1, dt2, rd, rm);
7935 void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7941 vcvtm(dt1, dt2, rd, rm);
7944 void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7950 vcvtm(dt1, dt2, rd, rm);
7953 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7959 vcvtm(dt1, dt2, rd, rm);
7962 void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
7968 vcvtm(dt1, dt2, rd, rm);
7971 void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
7977 vcvtn(dt1, dt2, rd, rm);
7980 void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
7986 vcvtn(dt1, dt2, rd, rm);
7989 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
7995 vcvtn(dt1, dt2, rd, rm);
7998 void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8004 vcvtn(dt1, dt2, rd, rm);
8007 void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
8013 vcvtp(dt1, dt2, rd, rm);
8016 void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
8022 vcvtp(dt1, dt2, rd, rm);
8025 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8031 vcvtp(dt1, dt2, rd, rm);
8034 void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8040 vcvtp(dt1, dt2, rd, rm);
8044 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8055 vcvtr(cond, dt1, dt2, rd, rm);
8057 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8058 Vcvtr(al, dt1, dt2, rd, rm);
8062 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8073 vcvtr(cond, dt1, dt2, rd, rm);
8075 void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8076 Vcvtr(al, dt1, dt2, rd, rm);
8080 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8091 vcvtt(cond, dt1, dt2, rd, rm);
8093 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
8094 Vcvtt(al, dt1, dt2, rd, rm);
8098 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
8109 vcvtt(cond, dt1, dt2, rd, rm);
8111 void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
8112 Vcvtt(al, dt1, dt2, rd, rm);
8116 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8127 vcvtt(cond, dt1, dt2, rd, rm);
8129 void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
8130 Vcvtt(al, dt1, dt2, rd, rm);
13140 void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13142 VIXL_ASSERT(dt1.Is(dt2));
13143 return Vrinta(dt1, rd, rm);
13147 void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13149 VIXL_ASSERT(dt1.Is(dt2));
13150 return Vrinta(dt1, rd, rm);
13154 void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13156 VIXL_ASSERT(dt1.Is(dt2));
13157 return Vrinta(dt1, rd, rm);
13162 void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13164 VIXL_ASSERT(dt1.Is(dt2));
13165 return Vrintm(dt1, rd, rm);
13169 void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13171 VIXL_ASSERT(dt1.Is(dt2));
13172 return Vrintm(dt1, rd, rm);
13176 void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13178 VIXL_ASSERT(dt1.Is(dt2));
13179 return Vrintm(dt1, rd, rm);
13184 void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13186 VIXL_ASSERT(dt1.Is(dt2));
13187 return Vrintn(dt1, rd, rm);
13191 void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13193 VIXL_ASSERT(dt1.Is(dt2));
13194 return Vrintn(dt1, rd, rm);
13198 void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13200 VIXL_ASSERT(dt1.Is(dt2));
13201 return Vrintn(dt1, rd, rm);
13206 void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13208 VIXL_ASSERT(dt1.Is(dt2));
13209 return Vrintp(dt1, rd, rm);
13213 void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13215 VIXL_ASSERT(dt1.Is(dt2));
13216 return Vrintp(dt1, rd, rm);
13220 void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13222 VIXL_ASSERT(dt1.Is(dt2));
13223 return Vrintp(dt1, rd, rm);
13229 DataType dt1,
13234 VIXL_ASSERT(dt1.Is(dt2));
13235 return Vrintr(cond, dt1, rd, rm);
13239 void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13241 VIXL_ASSERT(dt1.Is(dt2));
13242 return Vrintr(dt1, rd, rm);
13248 DataType dt1,
13253 VIXL_ASSERT(dt1.Is(dt2));
13254 return Vrintr(cond, dt1, rd, rm);
13258 void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13260 VIXL_ASSERT(dt1.Is(dt2));
13261 return Vrintr(dt1, rd, rm);
13267 DataType dt1,
13272 VIXL_ASSERT(dt1.Is(dt2));
13273 return Vrintx(cond, dt1, rd, rm);
13277 void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13279 VIXL_ASSERT(dt1.Is(dt2));
13280 return Vrintx(dt1, rd, rm);
13285 void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13287 VIXL_ASSERT(dt1.Is(dt2));
13288 return Vrintx(dt1, rd, rm);
13294 DataType dt1,
13299 VIXL_ASSERT(dt1.Is(dt2));
13300 return Vrintx(cond, dt1, rd, rm);
13304 void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13306 VIXL_ASSERT(dt1.Is(dt2));
13307 return Vrintx(dt1, rd, rm);
13313 DataType dt1,
13318 VIXL_ASSERT(dt1.Is(dt2));
13319 return Vrintz(cond, dt1, rd, rm);
13323 void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
13325 VIXL_ASSERT(dt1.Is(dt2));
13326 return Vrintz(dt1, rd, rm);
13331 void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
13333 VIXL_ASSERT(dt1.Is(dt2));
13334 return Vrintz(dt1, rd, rm);
13340 DataType dt1,
13345 VIXL_ASSERT(dt1.Is(dt2));
13346 return Vrintz(cond, dt1, rd, rm);
13350 void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
13352 VIXL_ASSERT(dt1.Is(dt2));
13353 return Vrintz(dt1, rd, rm);