Lines Matching refs:VIXL_ASSERT
92 VIXL_ASSERT(code < kNumberOfRegisters);
93 VIXL_ASSERT(size == kRegSizeInBits);
96 VIXL_ASSERT(code < kNumberOfSRegisters);
97 VIXL_ASSERT(size == kSRegSizeInBits);
100 VIXL_ASSERT(code < kMaxNumberOfDRegisters);
101 VIXL_ASSERT(size == kDRegSizeInBits);
104 VIXL_ASSERT(code < kNumberOfQRegisters);
105 VIXL_ASSERT(size == kQRegSizeInBits);
142 VIXL_ASSERT(GetCode() < kNumberOfRegisters);
158 VIXL_ASSERT(code_ < kNumberOfRegisters);
163 VIXL_ASSERT(!IsAPSR_nzcv());
209 VIXL_ASSERT(single_bit_field > 0);
228 VIXL_ASSERT(lane < lane_count);
229 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegisters);
233 VIXL_ASSERT(single_bit_field >= 4);
242 VIXL_ASSERT(single_bit_field >= 4);
293 VIXL_ASSERT((size == 8) || (size == 16) || (size == 32) || (size == 64));
336 VIXL_ASSERT(single_bit_field >= 4);
348 VIXL_ASSERT(single_bit_field >= 4);
373 VIXL_ASSERT(lane < lane_count);
380 VIXL_ASSERT(lane < lane_count);
381 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegisters);
386 VIXL_ASSERT(single_bit_field >= 3);
395 VIXL_ASSERT(single_bit_field >= 3);
658 VIXL_ASSERT(length >= 0);
661 VIXL_ASSERT(n >= 0);
662 VIXL_ASSERT(n < length_);
680 VIXL_ASSERT(length >= 0);
683 VIXL_ASSERT(n >= 0);
684 VIXL_ASSERT(n < length_);
712 VIXL_ASSERT(type_ != kOneLane);
720 VIXL_ASSERT((lane_ >= 0) && (lane_ < 8));
727 VIXL_ASSERT(type != kOneLane);
728 VIXL_ASSERT(first.GetCode() <= last.GetCode());
731 VIXL_ASSERT(IsSingleSpaced() || IsMultiple(range, 2));
734 VIXL_ASSERT(length_ <= 4);
744 VIXL_ASSERT((lane >= 0) && (lane < 8));
745 VIXL_ASSERT(first.GetCode() <= last.GetCode());
748 VIXL_ASSERT(IsSingleSpaced() || IsMultiple(range, 2));
751 VIXL_ASSERT(length_ <= 4);
754 VIXL_ASSERT(n >= 0);
755 VIXL_ASSERT(n < length_);
757 VIXL_ASSERT(code < kMaxNumberOfDRegisters);
885 VIXL_ASSERT(reg <= SPSR_fsxc);
947 VIXL_ASSERT(code < kNumberOfRegisters);
1013 VIXL_ASSERT(condition <= kNone);
1028 VIXL_ASSERT(IsNot(al) && IsNot(kNever));
1098 VIXL_ASSERT(amount <= 31);
1101 VIXL_ASSERT(amount > 0);
1102 VIXL_ASSERT(amount <= 31);
1106 VIXL_ASSERT(amount > 0);
1107 VIXL_ASSERT(amount <= 32);
1110 VIXL_ASSERT(amount == 0);
1141 VIXL_ASSERT(!IsRRX() && shift_register_.IsValid());
1267 VIXL_ASSERT((type & 0x3) != 0);
1295 VIXL_ASSERT(type <= 7);
1314 VIXL_ASSERT(type <= 1);
1342 VIXL_ASSERT(align <= static_cast<uint32_t>(k256BitAlign));