Lines Matching refs:DisassemblerStream

253   class DisassemblerStream {
259 explicit DisassemblerStream(std::ostream& os) // NOLINT(runtime/references)
263 virtual ~DisassemblerStream() {}
281 DisassemblerStream& operator<<(T value) {
285 virtual DisassemblerStream& operator<<(const char* string) {
289 virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
293 virtual DisassemblerStream& operator<<(Condition cond) {
297 virtual DisassemblerStream& operator<<(const EncodingSize& size) {
301 virtual DisassemblerStream& operator<<(const ImmediatePrinter& imm) {
305 virtual DisassemblerStream& operator<<(const SignedImmediatePrinter& imm) {
309 virtual DisassemblerStream& operator<<(const RawImmediatePrinter& imm) {
313 virtual DisassemblerStream& operator<<(const DtPrinter& dt) {
317 virtual DisassemblerStream& operator<<(const DataType& type) {
321 virtual DisassemblerStream& operator<<(Shift shift) {
325 virtual DisassemblerStream& operator<<(Sign sign) {
329 virtual DisassemblerStream& operator<<(Alignment alignment) {
333 virtual DisassemblerStream& operator<<(const PrintLabel& label) {
337 virtual DisassemblerStream& operator<<(const WriteBack& write_back) {
341 virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) {
345 virtual DisassemblerStream& operator<<(Register reg) {
349 virtual DisassemblerStream& operator<<(SRegister reg) {
353 virtual DisassemblerStream& operator<<(DRegister reg) {
357 virtual DisassemblerStream& operator<<(QRegister reg) {
361 virtual DisassemblerStream& operator<<(const RegisterOrAPSR_nzcv reg) {
365 virtual DisassemblerStream& operator<<(SpecialRegister reg) {
369 virtual DisassemblerStream& operator<<(MaskedSpecialRegister reg) {
373 virtual DisassemblerStream& operator<<(SpecialFPRegister reg) {
377 virtual DisassemblerStream& operator<<(BankedRegister reg) {
381 virtual DisassemblerStream& operator<<(const RegisterList& list) {
385 virtual DisassemblerStream& operator<<(const SRegisterList& list) {
389 virtual DisassemblerStream& operator<<(const DRegisterList& list) {
393 virtual DisassemblerStream& operator<<(const NeonRegisterList& list) {
397 virtual DisassemblerStream& operator<<(const DRegisterLane& reg) {
401 virtual DisassemblerStream& operator<<(const IndexedRegisterPrinter& reg) {
405 virtual DisassemblerStream& operator<<(Coprocessor coproc) {
409 virtual DisassemblerStream& operator<<(CRegister reg) {
413 virtual DisassemblerStream& operator<<(Endianness endian_specifier) {
417 virtual DisassemblerStream& operator<<(MemoryBarrier option) {
421 virtual DisassemblerStream& operator<<(InterruptFlags iflags) {
425 virtual DisassemblerStream& operator<<(const Operand& operand) {
451 virtual DisassemblerStream& operator<<(const SOperand& operand) {
457 virtual DisassemblerStream& operator<<(const DOperand& operand) {
463 virtual DisassemblerStream& operator<<(const QOperand& operand) {
469 virtual DisassemblerStream& operator<<(const MemOperand& operand) {
502 virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) {
505 virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) {
517 virtual DisassemblerStream& operator<<(
538 DisassemblerStream* os_;
551 os_(new DisassemblerStream(os)),
557 os_(allocator_->New<DisassemblerStream>(os)),
562 explicit Disassembler(DisassemblerStream* os, uint32_t code_address = 0)
572 DisassemblerStream& os() const { return *os_; }
2713 explicit PrintDisassembler(DisassemblerStream* os, uint32_t code_address = 0)