Lines Matching defs:spec_reg
1949 void Disassembler::mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
1952 << ", " << spec_reg;
1956 MaskedSpecialRegister spec_reg,
1960 << spec_reg << ", " << operand;
5351 SpecialFPRegister spec_reg) {
5354 << ", " << spec_reg;
5358 SpecialFPRegister spec_reg,
5362 << spec_reg << ", " << rt;
9487 unsigned spec_reg = ((instr >> 8) & 0xf) |
9490 // MSR{<c>}{<q>} <spec_reg>, <Rn> ; T1
9492 MaskedSpecialRegister(spec_reg),
9726 unsigned spec_reg = (instr >> 20) & 0x1;
9727 // MRS{<c>}{<q>} <Rd>, <spec_reg> ; T1
9730 SpecialRegister(spec_reg));
24731 unsigned spec_reg = (instr >> 16) & 0xf;
24733 switch (spec_reg) {
24737 // VMSR{<c>}{<q>} <spec_reg>, <Rt> ; T1
24739 SpecialFPRegister(spec_reg),
24836 unsigned spec_reg = (instr >> 16) & 0xf;
24837 switch (spec_reg) {
24844 // VMRS{<c>}{<q>} <Rt>, <spec_reg> ; T1
24847 SpecialFPRegister(spec_reg));
56088 unsigned spec_reg = (instr >> 22) & 0x1;
56089 // MRS{<c>}{<q>} <Rd>, <spec_reg> ; A1
56090 mrs(condition, Register(rd), SpecialRegister(spec_reg));
56373 unsigned spec_reg =
56376 // MSR{<c>}{<q>} <spec_reg>, <Rn> ; A1
56378 MaskedSpecialRegister(spec_reg),
61499 unsigned spec_reg =
61502 // MSR{<c>}{<q>} <spec_reg>, #<imm> ; A1
61503 msr(condition, MaskedSpecialRegister(spec_reg), imm);
65880 unsigned spec_reg = (instr >> 16) & 0xf;
65882 switch (spec_reg) {
65886 // VMSR{<c>}{<q>} <spec_reg>, <Rt> ; A1
65888 SpecialFPRegister(spec_reg),
67121 unsigned spec_reg = (instr >> 16) & 0xf;
67122 switch (spec_reg) {
67129 // VMRS{<c>}{<q>} <Rt>, <spec_reg> ; A1
67132 SpecialFPRegister(spec_reg));