Lines Matching refs:cond
1923 void Assembler::adc(Condition cond,
1929 CheckIT(cond);
1947 if (immediate_a32.IsValid() && cond.IsNotNever()) {
1948 EmitA32(0x02a00000U | (cond.GetCondition() << 28) |
1983 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
1985 EmitA32(0x00a00000U | (cond.GetCondition() << 28) |
1998 if (cond.IsNotNever() &&
2001 EmitA32(0x00a00010U | (cond.GetCondition() << 28) |
2008 Delegate(kAdc, &Assembler::adc, cond, size, rd, rn, operand);
2011 void Assembler::adcs(Condition cond,
2017 CheckIT(cond);
2035 if (immediate_a32.IsValid() && cond.IsNotNever()) {
2036 EmitA32(0x02b00000U | (cond.GetCondition() << 28) |
2071 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
2073 EmitA32(0x00b00000U | (cond.GetCondition() << 28) |
2086 if (cond.IsNotNever() &&
2089 EmitA32(0x00b00010U | (cond.GetCondition() << 28) |
2096 Delegate(kAdcs, &Assembler::adcs, cond, size, rd, rn, operand);
2099 void Assembler::add(Condition cond,
2105 CheckIT(cond);
2195 if (rn.Is(pc) && immediate_a32.IsValid() && cond.IsNotNever()) {
2196 EmitA32(0x028f0000U | (cond.GetCondition() << 28) |
2201 if (immediate_a32.IsValid() && cond.IsNotNever() &&
2203 EmitA32(0x02800000U | (cond.GetCondition() << 28) |
2209 if (rn.Is(sp) && immediate_a32.IsValid() && cond.IsNotNever()) {
2210 EmitA32(0x028d0000U | (cond.GetCondition() << 28) |
2230 (((!rd.IsPC() || OutsideITBlockAndAlOrLast(cond)) &&
2240 ((!rd.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
2280 if (shift.IsValidAmount(amount) && cond.IsNotNever() && !rn.Is(sp)) {
2282 EmitA32(0x00800000U | (cond.GetCondition() << 28) |
2288 if (rn.Is(sp) && shift.IsValidAmount(amount) && cond.IsNotNever()) {
2290 EmitA32(0x008d0000U | (cond.GetCondition() << 28) |
2303 if (cond.IsNotNever() &&
2306 EmitA32(0x00800010U | (cond.GetCondition() << 28) |
2313 Delegate(kAdd, &Assembler::add, cond, size, rd, rn, operand);
2316 void Assembler::add(Condition cond, Register rd, const Operand& operand) {
2318 CheckIT(cond);
2335 (((!rd.IsPC() || OutsideITBlockAndAlOrLast(cond)) &&
2345 Delegate(kAdd, &Assembler::add, cond, rd, operand);
2348 void Assembler::adds(Condition cond,
2354 CheckIT(cond);
2396 if (immediate_a32.IsValid() && cond.IsNotNever() && !rn.Is(sp)) {
2397 EmitA32(0x02900000U | (cond.GetCondition() << 28) |
2403 if (rn.Is(sp) && immediate_a32.IsValid() && cond.IsNotNever()) {
2404 EmitA32(0x029d0000U | (cond.GetCondition() << 28) |
2449 if (shift.IsValidAmount(amount) && cond.IsNotNever() && !rn.Is(sp)) {
2451 EmitA32(0x00900000U | (cond.GetCondition() << 28) |
2457 if (rn.Is(sp) && shift.IsValidAmount(amount) && cond.IsNotNever()) {
2459 EmitA32(0x009d0000U | (cond.GetCondition() << 28) |
2472 if (cond.IsNotNever() &&
2475 EmitA32(0x00900010U | (cond.GetCondition() << 28) |
2482 Delegate(kAdds, &Assembler::adds, cond, size, rd, rn, operand);
2502 void Assembler::addw(Condition cond,
2507 CheckIT(cond);
2535 Delegate(kAddw, &Assembler::addw, cond, rd, rn, operand);
2538 void Assembler::adr(Condition cond,
2543 CheckIT(cond);
2621 cond.IsNotNever()) {
2646 Link(0x028f0000U | (cond.GetCondition() << 28) | (rd.GetCode() << 12),
2654 cond.IsNotNever()) {
2655 EmitA32(0x024f0000U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
2660 Delegate(kAdr, &Assembler::adr, cond, size, rd, location);
2663 bool Assembler::adr_info(Condition cond,
2686 if (cond.IsNotNever()) {
2697 void Assembler::and_(Condition cond,
2703 CheckIT(cond);
2721 if (immediate_a32.IsValid() && cond.IsNotNever()) {
2722 EmitA32(0x02000000U | (cond.GetCondition() << 28) |
2757 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
2759 EmitA32(0x00000000U | (cond.GetCondition() << 28) |
2772 if (cond.IsNotNever() &&
2775 EmitA32(0x00000010U | (cond.GetCondition() << 28) |
2782 Delegate(kAnd, &Assembler::and_, cond, size, rd, rn, operand);
2785 void Assembler::ands(Condition cond,
2791 CheckIT(cond);
2809 if (immediate_a32.IsValid() && cond.IsNotNever()) {
2810 EmitA32(0x02100000U | (cond.GetCondition() << 28) |
2845 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
2847 EmitA32(0x00100000U | (cond.GetCondition() << 28) |
2860 if (cond.IsNotNever() &&
2863 EmitA32(0x00100010U | (cond.GetCondition() << 28) |
2870 Delegate(kAnds, &Assembler::ands, cond, size, rd, rn, operand);
2873 void Assembler::asr(Condition cond,
2879 CheckIT(cond);
2903 if ((imm >= 1) && (imm <= 32) && cond.IsNotNever()) {
2905 EmitA32(0x01a00040U | (cond.GetCondition() << 28) |
2931 if (cond.IsNotNever() &&
2933 EmitA32(0x01a00050U | (cond.GetCondition() << 28) |
2939 Delegate(kAsr, &Assembler::asr, cond, size, rd, rm, operand);
2942 void Assembler::asrs(Condition cond,
2948 CheckIT(cond);
2972 if ((imm >= 1) && (imm <= 32) && cond.IsNotNever()) {
2974 EmitA32(0x01b00040U | (cond.GetCondition() << 28) |
3000 if (cond.IsNotNever() &&
3002 EmitA32(0x01b00050U | (cond.GetCondition() << 28) |
3008 Delegate(kAsrs, &Assembler::asrs, cond, size, rd, rm, operand);
3011 void Assembler::b(Condition cond, EncodingSize size, Location* location) {
3024 !cond.Is(al) && cond.IsNotNever()) {
3038 EmitT32_16(Link(0xd000 | (cond.GetCondition() << 8),
3046 if (OutsideITBlockAndAlOrLast(cond) && !size.IsWide() &&
3050 CheckIT(cond);
3073 !cond.Is(al) && cond.IsNotNever()) {
3090 EmitT32_32(Link(0xf0008000U | (cond.GetCondition() << 22),
3098 if (OutsideITBlockAndAlOrLast(cond) && !size.IsNarrow() &&
3102 CheckIT(cond);
3130 cond.IsNotNever()) {
3145 EmitA32(Link(0x0a000000U | (cond.GetCondition() << 28),
3152 Delegate(kB, &Assembler::b, cond, size, location);
3155 bool Assembler::b_info(Condition cond,
3163 if (OutsideITBlock() && !size.IsWide() && size.IsNarrow() && !cond.Is(al) &&
3164 cond.IsNotNever()) {
3169 if (OutsideITBlockAndAlOrLast(cond) && !size.IsWide() && size.IsNarrow()) {
3174 if (OutsideITBlock() && !size.IsNarrow() && !cond.Is(al) &&
3175 cond.IsNotNever()) {
3180 if (OutsideITBlockAndAlOrLast(cond) && !size.IsNarrow()) {
3186 if (cond.IsNotNever()) {
3194 void Assembler::bfc(Condition cond, Register rd, uint32_t lsb, uint32_t width) {
3196 CheckIT(cond);
3209 if ((lsb <= 31) && cond.IsNotNever() &&
3213 EmitA32(0x07c0001fU | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
3218 Delegate(kBfc, &Assembler::bfc, cond, rd, lsb, width);
3222 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
3224 CheckIT(cond);
3238 if ((lsb <= 31) && cond.IsNotNever() && !rn.Is(pc) &&
3242 EmitA32(0x07c00010U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
3247 Delegate(kBfi, &Assembler::bfi, cond, rd, rn, lsb, width);
3250 void Assembler::bic(Condition cond,
3256 CheckIT(cond);
3274 if (immediate_a32.IsValid() && cond.IsNotNever()) {
3275 EmitA32(0x03c00000U | (cond.GetCondition() << 28) |
3310 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
3312 EmitA32(0x01c00000U | (cond.GetCondition() << 28) |
3325 if (cond.IsNotNever() &&
3328 EmitA32(0x01c00010U | (cond.GetCondition() << 28) |
3335 Delegate(kBic, &Assembler::bic, cond, size, rd, rn, operand);
3338 void Assembler::bics(Condition cond,
3344 CheckIT(cond);
3362 if (immediate_a32.IsValid() && cond.IsNotNever()) {
3363 EmitA32(0x03d00000U | (cond.GetCondition() << 28) |
3398 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
3400 EmitA32(0x01d00000U | (cond.GetCondition() << 28) |
3413 if (cond.IsNotNever() &&
3416 EmitA32(0x01d00010U | (cond.GetCondition() << 28) |
3423 Delegate(kBics, &Assembler::bics, cond, size, rd, rn, operand);
3426 void Assembler::bkpt(Condition cond, uint32_t imm) {
3428 CheckIT(cond);
3438 if ((imm <= 65535) && (cond.Is(al) || AllowUnpredictable())) {
3439 EmitA32(0x01200070U | (cond.GetCondition() << 28) | (imm & 0xf) |
3444 Delegate(kBkpt, &Assembler::bkpt, cond, imm);
3447 void Assembler::bl(Condition cond, Location* location) {
3449 CheckIT(cond);
3460 (OutsideITBlockAndAlOrLast(cond) || AllowUnpredictable())) {
3488 cond.IsNotNever()) {
3503 EmitA32(Link(0x0b000000U | (cond.GetCondition() << 28),
3510 Delegate(kBl, &Assembler::bl, cond, location);
3513 bool Assembler::bl_info(Condition cond,
3526 if (cond.IsNotNever()) {
3534 void Assembler::blx(Condition cond, Location* location) {
3536 CheckIT(cond);
3547 (OutsideITBlockAndAlOrLast(cond) || AllowUnpredictable())) {
3576 if (cond.Is(al) || AllowStronglyDiscouraged()) {
3597 Delegate(kBlx, &Assembler::blx, cond, location);
3600 bool Assembler::blx_info(Condition cond,
3605 USE(cond);
3622 void Assembler::blx(Condition cond, Register rm) {
3624 CheckIT(cond);
3627 if (((!rm.IsPC() && OutsideITBlockAndAlOrLast(cond)) ||
3635 if (cond.IsNotNever() && (!rm.IsPC() || AllowUnpredictable())) {
3636 EmitA32(0x012fff30U | (cond.GetCondition() << 28) | rm.GetCode());
3640 Delegate(kBlx, &Assembler::blx, cond, rm);
3643 void Assembler::bx(Condition cond, Register rm) {
3645 CheckIT(cond);
3648 if ((OutsideITBlockAndAlOrLast(cond) || AllowUnpredictable())) {
3655 if (cond.IsNotNever()) {
3656 EmitA32(0x012fff10U | (cond.GetCondition() << 28) | rm.GetCode());
3660 Delegate(kBx, &Assembler::bx, cond, rm);
3663 void Assembler::bxj(Condition cond, Register rm) {
3665 CheckIT(cond);
3668 if (((!rm.IsPC() && OutsideITBlockAndAlOrLast(cond)) ||
3676 if (cond.IsNotNever() && (!rm.IsPC() || AllowUnpredictable())) {
3677 EmitA32(0x012fff20U | (cond.GetCondition() << 28) | rm.GetCode());
3681 Delegate(kBxj, &Assembler::bxj, cond, rm);
3782 void Assembler::clrex(Condition cond) {
3784 CheckIT(cond);
3792 if (cond.Is(al)) {
3797 Delegate(kClrex, &Assembler::clrex, cond);
3800 void Assembler::clz(Condition cond, Register rd, Register rm) {
3802 CheckIT(cond);
3813 if (cond.IsNotNever() &&
3815 EmitA32(0x016f0f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
3820 Delegate(kClz, &Assembler::clz, cond, rd, rm);
3823 void Assembler::cmn(Condition cond,
3828 CheckIT(cond);
3846 if (immediate_a32.IsValid() && cond.IsNotNever()) {
3847 EmitA32(0x03700000U | (cond.GetCondition() << 28) |
3880 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
3882 EmitA32(0x01700000U | (cond.GetCondition() << 28) |
3895 if (cond.IsNotNever() &&
3897 EmitA32(0x01700010U | (cond.GetCondition() << 28) |
3904 Delegate(kCmn, &Assembler::cmn, cond, size, rn, operand);
3907 void Assembler::cmp(Condition cond,
3912 CheckIT(cond);
3936 if (immediate_a32.IsValid() && cond.IsNotNever()) {
3937 EmitA32(0x03500000U | (cond.GetCondition() << 28) |
3978 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
3980 EmitA32(0x01500000U | (cond.GetCondition() << 28) |
3993 if (cond.IsNotNever() &&
3995 EmitA32(0x01500010U | (cond.GetCondition() << 28) |
4002 Delegate(kCmp, &Assembler::cmp, cond, size, rn, operand);
4005 void Assembler::crc32b(Condition cond, Register rd, Register rn, Register rm) {
4007 CheckIT(cond);
4019 if ((cond.Is(al) || AllowUnpredictable()) &&
4021 EmitA32(0x01000040U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4026 Delegate(kCrc32b, &Assembler::crc32b, cond, rd, rn, rm);
4029 void Assembler::crc32cb(Condition cond, Register rd, Register rn, Register rm) {
4031 CheckIT(cond);
4043 if ((cond.Is(al) || AllowUnpredictable()) &&
4045 EmitA32(0x01000240U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4050 Delegate(kCrc32cb, &Assembler::crc32cb, cond, rd, rn, rm);
4053 void Assembler::crc32ch(Condition cond, Register rd, Register rn, Register rm) {
4055 CheckIT(cond);
4067 if ((cond.Is(al) || AllowUnpredictable()) &&
4069 EmitA32(0x01200240U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4074 Delegate(kCrc32ch, &Assembler::crc32ch, cond, rd, rn, rm);
4077 void Assembler::crc32cw(Condition cond, Register rd, Register rn, Register rm) {
4079 CheckIT(cond);
4091 if ((cond.Is(al) || AllowUnpredictable()) &&
4093 EmitA32(0x01400240U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4098 Delegate(kCrc32cw, &Assembler::crc32cw, cond, rd, rn, rm);
4101 void Assembler::crc32h(Condition cond, Register rd, Register rn, Register rm) {
4103 CheckIT(cond);
4115 if ((cond.Is(al) || AllowUnpredictable()) &&
4117 EmitA32(0x01200040U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4122 Delegate(kCrc32h, &Assembler::crc32h, cond, rd, rn, rm);
4125 void Assembler::crc32w(Condition cond, Register rd, Register rn, Register rm) {
4127 CheckIT(cond);
4139 if ((cond.Is(al) || AllowUnpredictable()) &&
4141 EmitA32(0x01400040U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
4146 Delegate(kCrc32w, &Assembler::crc32w, cond, rd, rn, rm);
4149 void Assembler::dmb(Condition cond, MemoryBarrier option) {
4151 CheckIT(cond);
4159 if (cond.Is(al)) {
4164 Delegate(kDmb, &Assembler::dmb, cond, option);
4167 void Assembler::dsb(Condition cond, MemoryBarrier option) {
4169 CheckIT(cond);
4177 if (cond.Is(al)) {
4182 Delegate(kDsb, &Assembler::dsb, cond, option);
4185 void Assembler::eor(Condition cond,
4191 CheckIT(cond);
4209 if (immediate_a32.IsValid() && cond.IsNotNever()) {
4210 EmitA32(0x02200000U | (cond.GetCondition() << 28) |
4245 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
4247 EmitA32(0x00200000U | (cond.GetCondition() << 28) |
4260 if (cond.IsNotNever() &&
4263 EmitA32(0x00200010U | (cond.GetCondition() << 28) |
4270 Delegate(kEor, &Assembler::eor, cond, size, rd, rn, operand);
4273 void Assembler::eors(Condition cond,
4279 CheckIT(cond);
4297 if (immediate_a32.IsValid() && cond.IsNotNever()) {
4298 EmitA32(0x02300000U | (cond.GetCondition() << 28) |
4333 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
4335 EmitA32(0x00300000U | (cond.GetCondition() << 28) |
4348 if (cond.IsNotNever() &&
4351 EmitA32(0x00300010U | (cond.GetCondition() << 28) |
4358 Delegate(kEors, &Assembler::eors, cond, size, rd, rn, operand);
4361 void Assembler::fldmdbx(Condition cond,
4366 CheckIT(cond);
4382 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
4388 EmitA32(0x0d300b01U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4393 Delegate(kFldmdbx, &Assembler::fldmdbx, cond, rn, write_back, dreglist);
4396 void Assembler::fldmiax(Condition cond,
4401 CheckIT(cond);
4417 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
4423 EmitA32(0x0c900b01U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4429 Delegate(kFldmiax, &Assembler::fldmiax, cond, rn, write_back, dreglist);
4432 void Assembler::fstmdbx(Condition cond,
4437 CheckIT(cond);
4453 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
4459 EmitA32(0x0d200b01U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4464 Delegate(kFstmdbx, &Assembler::fstmdbx, cond, rn, write_back, dreglist);
4467 void Assembler::fstmiax(Condition cond,
4472 CheckIT(cond);
4488 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
4494 EmitA32(0x0c800b01U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4500 Delegate(kFstmiax, &Assembler::fstmiax, cond, rn, write_back, dreglist);
4503 void Assembler::hlt(Condition cond, uint32_t imm) {
4505 CheckIT(cond);
4515 if ((imm <= 65535) && (cond.Is(al) || AllowUnpredictable())) {
4516 EmitA32(0x01000070U | (cond.GetCondition() << 28) | (imm & 0xf) |
4521 Delegate(kHlt, &Assembler::hlt, cond, imm);
4524 void Assembler::hvc(Condition cond, uint32_t imm) {
4526 CheckIT(cond);
4536 if ((imm <= 65535) && (cond.Is(al) || AllowUnpredictable())) {
4537 EmitA32(0x01400070U | (cond.GetCondition() << 28) | (imm & 0xf) |
4542 Delegate(kHvc, &Assembler::hvc, cond, imm);
4545 void Assembler::isb(Condition cond, MemoryBarrier option) {
4547 CheckIT(cond);
4555 if (cond.Is(al)) {
4560 Delegate(kIsb, &Assembler::isb, cond, option);
4563 void Assembler::it(Condition cond, uint16_t mask) {
4567 if ((cond.GetCondition() & 0x1) != 0) {
4576 if (IsUsingT32()) EmitT32_16(0xbf00 | (cond.GetCondition() << 4) | mask);
4577 SetIT(cond, mask);
4580 DelegateIt(cond, mask);
4583 void Assembler::lda(Condition cond, Register rt, const MemOperand& operand) {
4585 CheckIT(cond);
4598 if (operand.IsOffset() && cond.IsNotNever() &&
4600 EmitA32(0x01900c9fU | (cond.GetCondition() << 28) |
4606 Delegate(kLda, &Assembler::lda, cond, rt, operand);
4609 void Assembler::ldab(Condition cond, Register rt, const MemOperand& operand) {
4611 CheckIT(cond);
4624 if (operand.IsOffset() && cond.IsNotNever() &&
4626 EmitA32(0x01d00c9fU | (cond.GetCondition() << 28) |
4632 Delegate(kLdab, &Assembler::ldab, cond, rt, operand);
4635 void Assembler::ldaex(Condition cond, Register rt, const MemOperand& operand) {
4637 CheckIT(cond);
4650 if (operand.IsOffset() && cond.IsNotNever() &&
4652 EmitA32(0x01900e9fU | (cond.GetCondition() << 28) |
4658 Delegate(kLdaex, &Assembler::ldaex, cond, rt, operand);
4661 void Assembler::ldaexb(Condition cond, Register rt, const MemOperand& operand) {
4663 CheckIT(cond);
4676 if (operand.IsOffset() && cond.IsNotNever() &&
4678 EmitA32(0x01d00e9fU | (cond.GetCondition() << 28) |
4684 Delegate(kLdaexb, &Assembler::ldaexb, cond, rt, operand);
4687 void Assembler::ldaexd(Condition cond,
4692 CheckIT(cond);
4707 operand.IsOffset() && cond.IsNotNever() &&
4710 EmitA32(0x01b00e9fU | (cond.GetCondition() << 28) |
4716 Delegate(kLdaexd, &Assembler::ldaexd, cond, rt, rt2, operand);
4719 void Assembler::ldaexh(Condition cond, Register rt, const MemOperand& operand) {
4721 CheckIT(cond);
4734 if (operand.IsOffset() && cond.IsNotNever() &&
4736 EmitA32(0x01f00e9fU | (cond.GetCondition() << 28) |
4742 Delegate(kLdaexh, &Assembler::ldaexh, cond, rt, operand);
4745 void Assembler::ldah(Condition cond, Register rt, const MemOperand& operand) {
4747 CheckIT(cond);
4760 if (operand.IsOffset() && cond.IsNotNever() &&
4762 EmitA32(0x01f00c9fU | (cond.GetCondition() << 28) |
4768 Delegate(kLdah, &Assembler::ldah, cond, rt, operand);
4771 void Assembler::ldm(Condition cond,
4777 CheckIT(cond);
4810 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4811 EmitA32(0x08900000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4817 Delegate(kLdm, &Assembler::ldm, cond, size, rn, write_back, registers);
4820 void Assembler::ldmda(Condition cond,
4825 CheckIT(cond);
4828 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4829 EmitA32(0x08100000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4835 Delegate(kLdmda, &Assembler::ldmda, cond, rn, write_back, registers);
4838 void Assembler::ldmdb(Condition cond,
4843 CheckIT(cond);
4858 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4859 EmitA32(0x09100000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4865 Delegate(kLdmdb, &Assembler::ldmdb, cond, rn, write_back, registers);
4868 void Assembler::ldmea(Condition cond,
4873 CheckIT(cond);
4888 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4889 EmitA32(0x09100000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4895 Delegate(kLdmea, &Assembler::ldmea, cond, rn, write_back, registers);
4898 void Assembler::ldmed(Condition cond,
4903 CheckIT(cond);
4906 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4907 EmitA32(0x09900000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4913 Delegate(kLdmed, &Assembler::ldmed, cond, rn, write_back, registers);
4916 void Assembler::ldmfa(Condition cond,
4921 CheckIT(cond);
4924 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4925 EmitA32(0x08100000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4931 Delegate(kLdmfa, &Assembler::ldmfa, cond, rn, write_back, registers);
4934 void Assembler::ldmfd(Condition cond,
4940 CheckIT(cond);
4965 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4966 EmitA32(0x08900000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4972 Delegate(kLdmfd, &Assembler::ldmfd, cond, size, rn, write_back, registers);
4975 void Assembler::ldmib(Condition cond,
4980 CheckIT(cond);
4983 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
4984 EmitA32(0x09900000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
4990 Delegate(kLdmib, &Assembler::ldmib, cond, rn, write_back, registers);
4993 void Assembler::ldr(Condition cond,
4998 CheckIT(cond);
5023 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5033 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5043 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5055 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5067 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5078 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf)) {
5081 EmitA32(0x05100000U | (cond.GetCondition() << 28) |
5088 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf)) {
5091 EmitA32(0x04100000U | (cond.GetCondition() << 28) |
5098 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf)) {
5101 EmitA32(0x05300000U | (cond.GetCondition() << 28) |
5108 operand.IsOffset() && cond.IsNotNever()) {
5111 EmitA32(0x051f0000U | (cond.GetCondition() << 28) |
5142 ((!rm.IsPC() && (!rt.IsPC() || OutsideITBlockAndAlOrLast(cond))) ||
5151 if (operand.IsShiftValid() && operand.IsOffset() && cond.IsNotNever() &&
5156 EmitA32(0x07100000U | (cond.GetCondition() << 28) |
5163 cond.IsNotNever() && (!rm.IsPC() || AllowUnpredictable())) {
5167 EmitA32(0x06100000U | (cond.GetCondition() << 28) |
5173 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() &&
5178 EmitA32(0x07300000U | (cond.GetCondition() << 28) |
5185 Delegate(kLdr, &Assembler::ldr, cond, size, rt, operand);
5188 void Assembler::ldr(Condition cond,
5193 CheckIT(cond);
5228 ((!rt.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
5256 cond.IsNotNever()) {
5273 Link(0x051f0000U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
5280 Delegate(kLdr, &Assembler::ldr, cond, size, rt, location);
5283 bool Assembler::ldr_info(Condition cond,
5303 if (cond.IsNotNever()) {
5311 void Assembler::ldrb(Condition cond,
5316 CheckIT(cond);
5377 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5381 EmitA32(0x05500000U | (cond.GetCondition() << 28) |
5388 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5392 EmitA32(0x04500000U | (cond.GetCondition() << 28) |
5399 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5403 EmitA32(0x05700000U | (cond.GetCondition() << 28) |
5410 operand.IsOffset() && cond.IsNotNever() &&
5414 EmitA32(0x055f0000U | (cond.GetCondition() << 28) |
5453 if (operand.IsShiftValid() && operand.IsOffset() && cond.IsNotNever() &&
5458 EmitA32(0x07500000U | (cond.GetCondition() << 28) |
5465 cond.IsNotNever() &&
5470 EmitA32(0x06500000U | (cond.GetCondition() << 28) |
5476 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() &&
5481 EmitA32(0x07700000U | (cond.GetCondition() << 28) |
5488 Delegate(kLdrb, &Assembler::ldrb, cond, size, rt, operand);
5491 void Assembler::ldrb(Condition cond, Register rt, Location* location) {
5493 CheckIT(cond);
5530 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
5547 Link(0x055f0000U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
5554 Delegate(kLdrb, &Assembler::ldrb, cond, rt, location);
5557 bool Assembler::ldrb_info(Condition cond,
5571 if (cond.IsNotNever()) {
5579 void Assembler::ldrd(Condition cond,
5584 CheckIT(cond);
5637 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5642 EmitA32(0x014000d0U | (cond.GetCondition() << 28) |
5650 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5655 EmitA32(0x004000d0U | (cond.GetCondition() << 28) |
5663 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
5668 EmitA32(0x016000d0U | (cond.GetCondition() << 28) |
5676 operand.IsOffset() && cond.IsNotNever() &&
5681 EmitA32(0x014f00d0U | (cond.GetCondition() << 28) |
5695 operand.IsOffset() && cond.IsNotNever() &&
5699 EmitA32(0x010000d0U | (cond.GetCondition() << 28) |
5706 operand.IsPostIndex() && cond.IsNotNever() &&
5710 EmitA32(0x000000d0U | (cond.GetCondition() << 28) |
5717 operand.IsPreIndex() && cond.IsNotNever() &&
5721 EmitA32(0x012000d0U | (cond.GetCondition() << 28) |
5728 Delegate(kLdrd, &Assembler::ldrd, cond, rt, rt2, operand);
5731 void Assembler::ldrd(Condition cond,
5736 CheckIT(cond);
5776 cond.IsNotNever() &&
5795 Link(0x014f00d0U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
5802 Delegate(kLdrd, &Assembler::ldrd, cond, rt, rt2, location);
5805 bool Assembler::ldrd_info(Condition cond,
5821 cond.IsNotNever()) {
5829 void Assembler::ldrex(Condition cond, Register rt, const MemOperand& operand) {
5831 CheckIT(cond);
5848 if ((offset == 0) && operand.IsOffset() && cond.IsNotNever() &&
5850 EmitA32(0x01900f9fU | (cond.GetCondition() << 28) |
5856 Delegate(kLdrex, &Assembler::ldrex, cond, rt, operand);
5859 void Assembler::ldrexb(Condition cond, Register rt, const MemOperand& operand) {
5861 CheckIT(cond);
5874 if (operand.IsOffset() && cond.IsNotNever() &&
5876 EmitA32(0x01d00f9fU | (cond.GetCondition() << 28) |
5882 Delegate(kLdrexb, &Assembler::ldrexb, cond, rt, operand);
5885 void Assembler::ldrexd(Condition cond,
5890 CheckIT(cond);
5905 operand.IsOffset() && cond.IsNotNever() &&
5908 EmitA32(0x01b00f9fU | (cond.GetCondition() << 28) |
5914 Delegate(kLdrexd, &Assembler::ldrexd, cond, rt, rt2, operand);
5917 void Assembler::ldrexh(Condition cond, Register rt, const MemOperand& operand) {
5919 CheckIT(cond);
5932 if (operand.IsOffset() && cond.IsNotNever() &&
5934 EmitA32(0x01f00f9fU | (cond.GetCondition() << 28) |
5940 Delegate(kLdrexh, &Assembler::ldrexh, cond, rt, operand);
5943 void Assembler::ldrh(Condition cond,
5948 CheckIT(cond);
6010 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6014 EmitA32(0x015000b0U | (cond.GetCondition() << 28) |
6021 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6025 EmitA32(0x005000b0U | (cond.GetCondition() << 28) |
6032 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6036 EmitA32(0x017000b0U | (cond.GetCondition() << 28) |
6043 operand.IsOffset() && cond.IsNotNever() &&
6047 EmitA32(0x015f00b0U | (cond.GetCondition() << 28) |
6069 if (operand.IsOffset() && cond.IsNotNever() &&
6072 EmitA32(0x011000b0U | (cond.GetCondition() << 28) |
6078 if (operand.IsPostIndex() && cond.IsNotNever() &&
6081 EmitA32(0x001000b0U | (cond.GetCondition() << 28) |
6087 if (operand.IsPreIndex() && cond.IsNotNever() &&
6090 EmitA32(0x013000b0U | (cond.GetCondition() << 28) |
6115 Delegate(kLdrh, &Assembler::ldrh, cond, size, rt, operand);
6118 void Assembler::ldrh(Condition cond, Register rt, Location* location) {
6120 CheckIT(cond);
6157 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
6175 Link(0x015f00b0U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
6182 Delegate(kLdrh, &Assembler::ldrh, cond, rt, location);
6185 bool Assembler::ldrh_info(Condition cond,
6199 if (cond.IsNotNever()) {
6207 void Assembler::ldrsb(Condition cond,
6212 CheckIT(cond);
6265 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6269 EmitA32(0x015000d0U | (cond.GetCondition() << 28) |
6276 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6280 EmitA32(0x005000d0U | (cond.GetCondition() << 28) |
6287 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6291 EmitA32(0x017000d0U | (cond.GetCondition() << 28) |
6298 operand.IsOffset() && cond.IsNotNever() &&
6302 EmitA32(0x015f00d0U | (cond.GetCondition() << 28) |
6324 if (operand.IsOffset() && cond.IsNotNever() &&
6327 EmitA32(0x011000d0U | (cond.GetCondition() << 28) |
6333 if (operand.IsPostIndex() && cond.IsNotNever() &&
6336 EmitA32(0x001000d0U | (cond.GetCondition() << 28) |
6342 if (operand.IsPreIndex() && cond.IsNotNever() &&
6345 EmitA32(0x013000d0U | (cond.GetCondition() << 28) |
6370 Delegate(kLdrsb, &Assembler::ldrsb, cond, size, rt, operand);
6373 void Assembler::ldrsb(Condition cond, Register rt, Location* location) {
6375 CheckIT(cond);
6412 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
6430 Link(0x015f00d0U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
6437 Delegate(kLdrsb, &Assembler::ldrsb, cond, rt, location);
6440 bool Assembler::ldrsb_info(Condition cond,
6454 if (cond.IsNotNever()) {
6462 void Assembler::ldrsh(Condition cond,
6467 CheckIT(cond);
6520 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6524 EmitA32(0x015000f0U | (cond.GetCondition() << 28) |
6531 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6535 EmitA32(0x005000f0U | (cond.GetCondition() << 28) |
6542 cond.IsNotNever() && ((rn.GetCode() & 0xf) != 0xf) &&
6546 EmitA32(0x017000f0U | (cond.GetCondition() << 28) |
6553 operand.IsOffset() && cond.IsNotNever() &&
6557 EmitA32(0x015f00f0U | (cond.GetCondition() << 28) |
6579 if (operand.IsOffset() && cond.IsNotNever() &&
6582 EmitA32(0x011000f0U | (cond.GetCondition() << 28) |
6588 if (operand.IsPostIndex() && cond.IsNotNever() &&
6591 EmitA32(0x001000f0U | (cond.GetCondition() << 28) |
6597 if (operand.IsPreIndex() && cond.IsNotNever() &&
6600 EmitA32(0x013000f0U | (cond.GetCondition() << 28) |
6625 Delegate(kLdrsh, &Assembler::ldrsh, cond, size, rt, operand);
6628 void Assembler::ldrsh(Condition cond, Register rt, Location* location) {
6630 CheckIT(cond);
6667 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
6685 Link(0x015f00f0U | (cond.GetCondition() << 28) | (rt.GetCode() << 12),
6692 Delegate(kLdrsh, &Assembler::ldrsh, cond, rt, location);
6695 bool Assembler::ldrsh_info(Condition cond,
6709 if (cond.IsNotNever()) {
6717 void Assembler::lsl(Condition cond,
6723 CheckIT(cond);
6744 if ((imm >= 1) && (imm <= 31) && cond.IsNotNever()) {
6745 EmitA32(0x01a00000U | (cond.GetCondition() << 28) |
6771 if (cond.IsNotNever() &&
6773 EmitA32(0x01a00010U | (cond.GetCondition() << 28) |
6779 Delegate(kLsl, &Assembler::lsl, cond, size, rd, rm, operand);
6782 void Assembler::lsls(Condition cond,
6788 CheckIT(cond);
6809 if ((imm >= 1) && (imm <= 31) && cond.IsNotNever()) {
6810 EmitA32(0x01b00000U | (cond.GetCondition() << 28) |
6836 if (cond.IsNotNever() &&
6838 EmitA32(0x01b00010U | (cond.GetCondition() << 28) |
6844 Delegate(kLsls, &Assembler::lsls, cond, size, rd, rm, operand);
6847 void Assembler::lsr(Condition cond,
6853 CheckIT(cond);
6877 if ((imm >= 1) && (imm <= 32) && cond.IsNotNever()) {
6879 EmitA32(0x01a00020U | (cond.GetCondition() << 28) |
6905 if (cond.IsNotNever() &&
6907 EmitA32(0x01a00030U | (cond.GetCondition() << 28) |
6913 Delegate(kLsr, &Assembler::lsr, cond, size, rd, rm, operand);
6916 void Assembler::lsrs(Condition cond,
6922 CheckIT(cond);
6946 if ((imm >= 1) && (imm <= 32) && cond.IsNotNever()) {
6948 EmitA32(0x01b00020U | (cond.GetCondition() << 28) |
6974 if (cond.IsNotNever() &&
6976 EmitA32(0x01b00030U | (cond.GetCondition() << 28) |
6982 Delegate(kLsrs, &Assembler::lsrs, cond, size, rd, rm, operand);
6986 Condition cond, Register rd, Register rn, Register rm, Register ra) {
6988 CheckIT(cond);
7000 if (cond.IsNotNever() &&
7003 EmitA32(0x00200090U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
7008 Delegate(kMla, &Assembler::mla, cond, rd, rn, rm, ra);
7012 Condition cond, Register rd, Register rn, Register rm, Register ra) {
7014 CheckIT(cond);
7017 if (cond.IsNotNever() &&
7020 EmitA32(0x00300090U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
7025 Delegate(kMlas, &Assembler::mlas, cond, rd, rn, rm, ra);
7029 Condition cond, Register rd, Register rn, Register rm, Register ra) {
7031 CheckIT(cond);
7043 if (cond.IsNotNever() &&
7046 EmitA32(0x00600090U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
7051 Delegate(kMls, &Assembler::mls, cond, rd, rn, rm, ra);
7054 void Assembler::mov(Condition cond,
7059 CheckIT(cond);
7066 ((!rd.IsPC() || OutsideITBlockAndAlOrLast(cond)) ||
7101 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
7103 EmitA32(0x01a00000U | (cond.GetCondition() << 28) |
7153 if (cond.IsNotNever() &&
7155 EmitA32(0x01a00010U | (cond.GetCondition() << 28) |
7194 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7195 EmitA32(0x03a00000U | (cond.GetCondition() << 28) |
7200 if ((imm <= 65535) && cond.IsNotNever() &&
7202 EmitA32(0x03000000U | (cond.GetCondition() << 28) |
7208 Delegate(kMov, &Assembler::mov, cond, size, rd, operand);
7211 void Assembler::movs(Condition cond,
7216 CheckIT(cond);
7244 if (shift.IsValidAmount(amount) && cond.IsNotNever() &&
7247 EmitA32(0x01b00000U | (cond.GetCondition() << 28) |
7297 if (cond.IsNotNever() &&
7299 EmitA32(0x01b00010U | (cond.GetCondition() << 28) |
7329 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7330 EmitA32(0x03b00000U | (cond.GetCondition() << 28) |
7336 Delegate(kMovs, &Assembler::movs, cond, size, rd, operand);
7339 void Assembler::movt(Condition cond, Register rd, const Operand& operand) {
7341 CheckIT(cond);
7355 if ((imm <= 65535) && cond.IsNotNever() &&
7357 EmitA32(0x03400000U | (cond.GetCondition() << 28) |
7363 Delegate(kMovt, &Assembler::movt, cond, rd, operand);
7366 void Assembler::movw(Condition cond, Register rd, const Operand& operand) {
7368 CheckIT(cond);
7382 if ((imm <= 65535) && cond.IsNotNever() &&
7384 EmitA32(0x03000000U | (cond.GetCondition() << 28) |
7390 Delegate(kMovw, &Assembler::movw, cond, rd, operand);
7393 void Assembler::mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
7395 CheckIT(cond);
7405 if (cond.IsNotNever() && (!rd.IsPC() || AllowUnpredictable())) {
7406 EmitA32(0x010f0000U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
7411 Delegate(kMrs, &Assembler::mrs, cond, rd, spec_reg);
7414 void Assembler::msr(Condition cond,
7418 CheckIT(cond);
7424 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7425 EmitA32(0x0320f000U | (cond.GetCondition() << 28) |
7445 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
7446 EmitA32(0x0120f000U | (cond.GetCondition() << 28) |
7453 Delegate(kMsr, &Assembler::msr, cond, spec_reg, operand);
7457 Condition cond, EncodingSize size, Register rd, Register rn, Register rm) {
7459 CheckIT(cond);
7478 if (cond.IsNotNever() &&
7480 EmitA32(0x00000090U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
7485 Delegate(kMul, &Assembler::mul, cond, size, rd, rn, rm);
7488 void Assembler::muls(Condition cond, Register rd, Register rn, Register rm) {
7490 CheckIT(cond);
7500 if (cond.IsNotNever() &&
7502 EmitA32(0x00100090U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
7507 Delegate(kMuls, &Assembler::muls, cond, rd, rn, rm);
7510 void Assembler::mvn(Condition cond,
7515 CheckIT(cond);
7533 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7534 EmitA32(0x03e00000U | (cond.GetCondition() << 28) |
7567 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
7569 EmitA32(0x01e00000U | (cond.GetCondition() << 28) |
7582 if (cond.IsNotNever() &&
7584 EmitA32(0x01e00010U | (cond.GetCondition() << 28) |
7591 Delegate(kMvn, &Assembler::mvn, cond, size, rd, operand);
7594 void Assembler::mvns(Condition cond,
7599 CheckIT(cond);
7617 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7618 EmitA32(0x03f00000U | (cond.GetCondition() << 28) |
7651 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
7653 EmitA32(0x01f00000U | (cond.GetCondition() << 28) |
7666 if (cond.IsNotNever() &&
7668 EmitA32(0x01f00010U | (cond.GetCondition() << 28) |
7675 Delegate(kMvns, &Assembler::mvns, cond, size, rd, operand);
7678 void Assembler::nop(Condition cond, EncodingSize size) {
7680 CheckIT(cond);
7696 if (cond.IsNotNever()) {
7697 EmitA32(0x0320f000U | (cond.GetCondition() << 28));
7701 Delegate(kNop, &Assembler::nop, cond, size);
7704 void Assembler::orn(Condition cond,
7709 CheckIT(cond);
7743 Delegate(kOrn, &Assembler::orn, cond, rd, rn, operand);
7746 void Assembler::orns(Condition cond,
7751 CheckIT(cond);
7785 Delegate(kOrns, &Assembler::orns, cond, rd, rn, operand);
7788 void Assembler::orr(Condition cond,
7794 CheckIT(cond);
7812 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7813 EmitA32(0x03800000U | (cond.GetCondition() << 28) |
7848 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
7850 EmitA32(0x01800000U | (cond.GetCondition() << 28) |
7863 if (cond.IsNotNever() &&
7866 EmitA32(0x01800010U | (cond.GetCondition() << 28) |
7873 Delegate(kOrr, &Assembler::orr, cond, size, rd, rn, operand);
7876 void Assembler::orrs(Condition cond,
7882 CheckIT(cond);
7900 if (immediate_a32.IsValid() && cond.IsNotNever()) {
7901 EmitA32(0x03900000U | (cond.GetCondition() << 28) |
7936 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
7938 EmitA32(0x01900000U | (cond.GetCondition() << 28) |
7951 if (cond.IsNotNever() &&
7954 EmitA32(0x01900010U | (cond.GetCondition() << 28) |
7961 Delegate(kOrrs, &Assembler::orrs, cond, size, rd, rn, operand);
7964 void Assembler::pkhbt(Condition cond,
7969 CheckIT(cond);
7986 if (shift.IsLSL() && shift.IsValidAmount(amount) && cond.IsNotNever() &&
7988 EmitA32(0x06800010U | (cond.GetCondition() << 28) |
7995 Delegate(kPkhbt, &Assembler::pkhbt, cond, rd, rn, operand);
7998 void Assembler::pkhtb(Condition cond,
8003 CheckIT(cond);
8022 cond.IsNotNever() &&
8025 EmitA32(0x06800050U | (cond.GetCondition() << 28) |
8032 Delegate(kPkhtb, &Assembler::pkhtb, cond, rd, rn, operand);
8035 void Assembler::pld(Condition cond, Location* location) {
8037 CheckIT(cond);
8070 if (cond.Is(al)) {
8091 Delegate(kPld, &Assembler::pld, cond, location);
8094 bool Assembler::pld_info(Condition cond,
8099 USE(cond);
8116 void Assembler::pld(Condition cond, const MemOperand& operand) {
8118 CheckIT(cond);
8136 if (cond.Is(al)) {
8167 if (cond.Is(al)) {
8196 if (cond.Is(al)) {
8207 if (cond.Is(al)) {
8216 Delegate(kPld, &Assembler::pld, cond, operand);
8219 void Assembler::pldw(Condition cond, const MemOperand& operand) {
8221 CheckIT(cond);
8244 if (cond.Is(al)) {
8273 if (cond.Is(al)) {
8284 if (cond.Is(al)) {
8293 Delegate(kPldw, &Assembler::pldw, cond, operand);
8296 void Assembler::pli(Condition cond, const MemOperand& operand) {
8298 CheckIT(cond);
8321 if (cond.Is(al)) {
8347 if (cond.Is(al)) {
8376 if (cond.Is(al)) {
8386 if (cond.Is(al)) {
8396 Delegate(kPli, &Assembler::pli, cond, operand);
8399 void Assembler::pli(Condition cond, Location* location) {
8401 CheckIT(cond);
8434 if (cond.Is(al)) {
8455 Delegate(kPli, &Assembler::pli, cond, location);
8458 bool Assembler::pli_info(Condition cond,
8463 USE(cond);
8480 void Assembler::pop(Condition cond, EncodingSize size, RegisterList registers) {
8482 CheckIT(cond);
8487 if (!registers.Includes(pc) || OutsideITBlockAndAlOrLast(cond) ||
8510 if (cond.IsNotNever() &&
8512 EmitA32(0x08bd0000U | (cond.GetCondition() << 28) |
8518 Delegate(kPop, &Assembler::pop, cond, size, registers);
8521 void Assembler::pop(Condition cond, EncodingSize size, Register rt) {
8523 CheckIT(cond);
8528 if (!size.IsNarrow() && (!rt.IsPC() || OutsideITBlockAndAlOrLast(cond) ||
8537 if (cond.IsNotNever()) {
8538 EmitA32(0x049d0004U | (cond.GetCondition() << 28) |
8544 Delegate(kPop, &Assembler::pop, cond, size, rt);
8547 void Assembler::push(Condition cond,
8551 CheckIT(cond);
8573 if (cond.IsNotNever() &&
8579 EmitA32(0x092d0000U | (cond.GetCondition() << 28) |
8585 Delegate(kPush, &Assembler::push, cond, size, registers);
8588 void Assembler::push(Condition cond, EncodingSize size, Register rt) {
8590 CheckIT(cond);
8603 if (cond.IsNotNever() && (!rt.IsSP() || AllowUnpredictable())) {
8604 EmitA32(0x052d0004U | (cond.GetCondition() << 28) | (rt.GetCode() << 12));
8608 Delegate(kPush, &Assembler::push, cond, size, rt);
8611 void Assembler::qadd(Condition cond, Register rd, Register rm, Register rn) {
8613 CheckIT(cond);
8624 if (cond.IsNotNever() &&
8626 EmitA32(0x01000050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8631 Delegate(kQadd, &Assembler::qadd, cond, rd, rm, rn);
8634 void Assembler::qadd16(Condition cond, Register rd, Register rn, Register rm) {
8636 CheckIT(cond);
8647 if (cond.IsNotNever() &&
8649 EmitA32(0x06200f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8654 Delegate(kQadd16, &Assembler::qadd16, cond, rd, rn, rm);
8657 void Assembler::qadd8(Condition cond, Register rd, Register rn, Register rm) {
8659 CheckIT(cond);
8670 if (cond.IsNotNever() &&
8672 EmitA32(0x06200f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8677 Delegate(kQadd8, &Assembler::qadd8, cond, rd, rn, rm);
8680 void Assembler::qasx(Condition cond, Register rd, Register rn, Register rm) {
8682 CheckIT(cond);
8693 if (cond.IsNotNever() &&
8695 EmitA32(0x06200f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8700 Delegate(kQasx, &Assembler::qasx, cond, rd, rn, rm);
8703 void Assembler::qdadd(Condition cond, Register rd, Register rm, Register rn) {
8705 CheckIT(cond);
8716 if (cond.IsNotNever() &&
8718 EmitA32(0x01400050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8723 Delegate(kQdadd, &Assembler::qdadd, cond, rd, rm, rn);
8726 void Assembler::qdsub(Condition cond, Register rd, Register rm, Register rn) {
8728 CheckIT(cond);
8739 if (cond.IsNotNever() &&
8741 EmitA32(0x01600050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8746 Delegate(kQdsub, &Assembler::qdsub, cond, rd, rm, rn);
8749 void Assembler::qsax(Condition cond, Register rd, Register rn, Register rm) {
8751 CheckIT(cond);
8762 if (cond.IsNotNever() &&
8764 EmitA32(0x06200f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8769 Delegate(kQsax, &Assembler::qsax, cond, rd, rn, rm);
8772 void Assembler::qsub(Condition cond, Register rd, Register rm, Register rn) {
8774 CheckIT(cond);
8785 if (cond.IsNotNever() &&
8787 EmitA32(0x01200050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8792 Delegate(kQsub, &Assembler::qsub, cond, rd, rm, rn);
8795 void Assembler::qsub16(Condition cond, Register rd, Register rn, Register rm) {
8797 CheckIT(cond);
8808 if (cond.IsNotNever() &&
8810 EmitA32(0x06200f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8815 Delegate(kQsub16, &Assembler::qsub16, cond, rd, rn, rm);
8818 void Assembler::qsub8(Condition cond, Register rd, Register rn, Register rm) {
8820 CheckIT(cond);
8831 if (cond.IsNotNever() &&
8833 EmitA32(0x06200ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8838 Delegate(kQsub8, &Assembler::qsub8, cond, rd, rn, rm);
8841 void Assembler::rbit(Condition cond, Register rd, Register rm) {
8843 CheckIT(cond);
8854 if (cond.IsNotNever() &&
8856 EmitA32(0x06ff0f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8861 Delegate(kRbit, &Assembler::rbit, cond, rd, rm);
8864 void Assembler::rev(Condition cond,
8869 CheckIT(cond);
8887 if (cond.IsNotNever() &&
8889 EmitA32(0x06bf0f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8894 Delegate(kRev, &Assembler::rev, cond, size, rd, rm);
8897 void Assembler::rev16(Condition cond,
8902 CheckIT(cond);
8920 if (cond.IsNotNever() &&
8922 EmitA32(0x06bf0fb0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8927 Delegate(kRev16, &Assembler::rev16, cond, size, rd, rm);
8930 void Assembler::revsh(Condition cond,
8935 CheckIT(cond);
8953 if (cond.IsNotNever() &&
8955 EmitA32(0x06ff0fb0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
8960 Delegate(kRevsh, &Assembler::revsh, cond, size, rd, rm);
8963 void Assembler::ror(Condition cond,
8969 CheckIT(cond);
8983 if ((imm >= 1) && (imm <= 31) && cond.IsNotNever()) {
8984 EmitA32(0x01a00060U | (cond.GetCondition() << 28) |
9010 if (cond.IsNotNever() &&
9012 EmitA32(0x01a00070U | (cond.GetCondition() << 28) |
9018 Delegate(kRor, &Assembler::ror, cond, size, rd, rm, operand);
9021 void Assembler::rors(Condition cond,
9027 CheckIT(cond);
9041 if ((imm >= 1) && (imm <= 31) && cond.IsNotNever()) {
9042 EmitA32(0x01b00060U | (cond.GetCondition() << 28) |
9068 if (cond.IsNotNever() &&
9070 EmitA32(0x01b00070U | (cond.GetCondition() << 28) |
9076 Delegate(kRors, &Assembler::rors, cond, size, rd, rm, operand);
9079 void Assembler::rrx(Condition cond, Register rd, Register rm) {
9081 CheckIT(cond);
9091 if (cond.IsNotNever()) {
9092 EmitA32(0x01a00060U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9097 Delegate(kRrx, &Assembler::rrx, cond, rd, rm);
9100 void Assembler::rrxs(Condition cond, Register rd, Register rm) {
9102 CheckIT(cond);
9112 if (cond.IsNotNever()) {
9113 EmitA32(0x01b00060U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9118 Delegate(kRrxs, &Assembler::rrxs, cond, rd, rm);
9121 void Assembler::rsb(Condition cond,
9127 CheckIT(cond);
9152 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9153 EmitA32(0x02600000U | (cond.GetCondition() << 28) |
9177 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9179 EmitA32(0x00600000U | (cond.GetCondition() << 28) |
9192 if (cond.IsNotNever() &&
9195 EmitA32(0x00600010U | (cond.GetCondition() << 28) |
9202 Delegate(kRsb, &Assembler::rsb, cond, size, rd, rn, operand);
9205 void Assembler::rsbs(Condition cond,
9211 CheckIT(cond);
9236 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9237 EmitA32(0x02700000U | (cond.GetCondition() << 28) |
9261 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9263 EmitA32(0x00700000U | (cond.GetCondition() << 28) |
9276 if (cond.IsNotNever() &&
9279 EmitA32(0x00700010U | (cond.GetCondition() << 28) |
9286 Delegate(kRsbs, &Assembler::rsbs, cond, size, rd, rn, operand);
9289 void Assembler::rsc(Condition cond,
9294 CheckIT(cond);
9300 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9301 EmitA32(0x02e00000U | (cond.GetCondition() << 28) |
9314 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9316 EmitA32(0x00e00000U | (cond.GetCondition() << 28) |
9329 if (cond.IsNotNever() &&
9332 EmitA32(0x00e00010U | (cond.GetCondition() << 28) |
9339 Delegate(kRsc, &Assembler::rsc, cond, rd, rn, operand);
9342 void Assembler::rscs(Condition cond,
9347 CheckIT(cond);
9353 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9354 EmitA32(0x02f00000U | (cond.GetCondition() << 28) |
9367 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9369 EmitA32(0x00f00000U | (cond.GetCondition() << 28) |
9382 if (cond.IsNotNever() &&
9385 EmitA32(0x00f00010U | (cond.GetCondition() << 28) |
9392 Delegate(kRscs, &Assembler::rscs, cond, rd, rn, operand);
9395 void Assembler::sadd16(Condition cond, Register rd, Register rn, Register rm) {
9397 CheckIT(cond);
9408 if (cond.IsNotNever() &&
9410 EmitA32(0x06100f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9415 Delegate(kSadd16, &Assembler::sadd16, cond, rd, rn, rm);
9418 void Assembler::sadd8(Condition cond, Register rd, Register rn, Register rm) {
9420 CheckIT(cond);
9431 if (cond.IsNotNever() &&
9433 EmitA32(0x06100f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9438 Delegate(kSadd8, &Assembler::sadd8, cond, rd, rn, rm);
9441 void Assembler::sasx(Condition cond, Register rd, Register rn, Register rm) {
9443 CheckIT(cond);
9454 if (cond.IsNotNever() &&
9456 EmitA32(0x06100f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9461 Delegate(kSasx, &Assembler::sasx, cond, rd, rn, rm);
9464 void Assembler::sbc(Condition cond,
9470 CheckIT(cond);
9488 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9489 EmitA32(0x02c00000U | (cond.GetCondition() << 28) |
9524 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9526 EmitA32(0x00c00000U | (cond.GetCondition() << 28) |
9539 if (cond.IsNotNever() &&
9542 EmitA32(0x00c00010U | (cond.GetCondition() << 28) |
9549 Delegate(kSbc, &Assembler::sbc, cond, size, rd, rn, operand);
9552 void Assembler::sbcs(Condition cond,
9558 CheckIT(cond);
9576 if (immediate_a32.IsValid() && cond.IsNotNever()) {
9577 EmitA32(0x02d00000U | (cond.GetCondition() << 28) |
9612 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
9614 EmitA32(0x00d00000U | (cond.GetCondition() << 28) |
9627 if (cond.IsNotNever() &&
9630 EmitA32(0x00d00010U | (cond.GetCondition() << 28) |
9637 Delegate(kSbcs, &Assembler::sbcs, cond, size, rd, rn, operand);
9641 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
9643 CheckIT(cond);
9657 if ((lsb <= 31) && cond.IsNotNever() &&
9661 EmitA32(0x07a00050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9666 Delegate(kSbfx, &Assembler::sbfx, cond, rd, rn, lsb, width);
9669 void Assembler::sdiv(Condition cond, Register rd, Register rn, Register rm) {
9671 CheckIT(cond);
9682 if (cond.IsNotNever() &&
9684 EmitA32(0x0710f010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
9689 Delegate(kSdiv, &Assembler::sdiv, cond, rd, rn, rm);
9692 void Assembler::sel(Condition cond, Register rd, Register rn, Register rm) {
9694 CheckIT(cond);
9705 if (cond.IsNotNever() &&
9707 EmitA32(0x06800fb0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9712 Delegate(kSel, &Assembler::sel, cond, rd, rn, rm);
9715 void Assembler::shadd16(Condition cond, Register rd, Register rn, Register rm) {
9717 CheckIT(cond);
9728 if (cond.IsNotNever() &&
9730 EmitA32(0x06300f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9735 Delegate(kShadd16, &Assembler::shadd16, cond, rd, rn, rm);
9738 void Assembler::shadd8(Condition cond, Register rd, Register rn, Register rm) {
9740 CheckIT(cond);
9751 if (cond.IsNotNever() &&
9753 EmitA32(0x06300f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9758 Delegate(kShadd8, &Assembler::shadd8, cond, rd, rn, rm);
9761 void Assembler::shasx(Condition cond, Register rd, Register rn, Register rm) {
9763 CheckIT(cond);
9774 if (cond.IsNotNever() &&
9776 EmitA32(0x06300f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9781 Delegate(kShasx, &Assembler::shasx, cond, rd, rn, rm);
9784 void Assembler::shsax(Condition cond, Register rd, Register rn, Register rm) {
9786 CheckIT(cond);
9797 if (cond.IsNotNever() &&
9799 EmitA32(0x06300f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9804 Delegate(kShsax, &Assembler::shsax, cond, rd, rn, rm);
9807 void Assembler::shsub16(Condition cond, Register rd, Register rn, Register rm) {
9809 CheckIT(cond);
9820 if (cond.IsNotNever() &&
9822 EmitA32(0x06300f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9827 Delegate(kShsub16, &Assembler::shsub16, cond, rd, rn, rm);
9830 void Assembler::shsub8(Condition cond, Register rd, Register rn, Register rm) {
9832 CheckIT(cond);
9843 if (cond.IsNotNever() &&
9845 EmitA32(0x06300ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
9850 Delegate(kShsub8, &Assembler::shsub8, cond, rd, rn, rm);
9854 Condition cond, Register rd, Register rn, Register rm, Register ra) {
9856 CheckIT(cond);
9868 if (cond.IsNotNever() &&
9871 EmitA32(0x01000080U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
9876 Delegate(kSmlabb, &Assembler::smlabb, cond, rd, rn, rm, ra);
9880 Condition cond, Register rd, Register rn, Register rm, Register ra) {
9882 CheckIT(cond);
9894 if (cond.IsNotNever() &&
9897 EmitA32(0x010000c0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
9902 Delegate(kSmlabt, &Assembler::smlabt, cond, rd, rn, rm, ra);
9906 Condition cond, Register rd, Register rn, Register rm, Register ra) {
9908 CheckIT(cond);
9920 if (cond.IsNotNever() && !ra.Is(pc) &&
9922 EmitA32(0x07000010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
9927 Delegate(kSmlad, &Assembler::smlad, cond, rd, rn, rm, ra);
9931 Condition cond, Register rd, Register rn, Register rm, Register ra) {
9933 CheckIT(cond);
9945 if (cond.IsNotNever() && !ra.Is(pc) &&
9947 EmitA32(0x07000030U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
9952 Delegate(kSmladx, &Assembler::smladx, cond, rd, rn, rm, ra);
9956 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
9958 CheckIT(cond);
9970 if (cond.IsNotNever() &&
9973 EmitA32(0x00e00090U | (cond.GetCondition() << 28) |
9979 Delegate(kSmlal, &Assembler::smlal, cond, rdlo, rdhi, rn, rm);
9983 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
9985 CheckIT(cond);
9997 if (cond.IsNotNever() &&
10000 EmitA32(0x01400080U | (cond.GetCondition() << 28) |
10006 Delegate(kSmlalbb, &Assembler::smlalbb, cond, rdlo, rdhi, rn, rm);
10010 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10012 CheckIT(cond);
10024 if (cond.IsNotNever() &&
10027 EmitA32(0x014000c0U | (cond.GetCondition() << 28) |
10033 Delegate(kSmlalbt, &Assembler::smlalbt, cond, rdlo, rdhi, rn, rm);
10037 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10039 CheckIT(cond);
10051 if (cond.IsNotNever() &&
10054 EmitA32(0x07400010U | (cond.GetCondition() << 28) |
10060 Delegate(kSmlald, &Assembler::smlald, cond, rdlo, rdhi, rn, rm);
10064 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10066 CheckIT(cond);
10078 if (cond.IsNotNever() &&
10081 EmitA32(0x07400030U | (cond.GetCondition() << 28) |
10087 Delegate(kSmlaldx, &Assembler::smlaldx, cond, rdlo, rdhi, rn, rm);
10091 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10093 CheckIT(cond);
10096 if (cond.IsNotNever() &&
10099 EmitA32(0x00f00090U | (cond.GetCondition() << 28) |
10105 Delegate(kSmlals, &Assembler::smlals, cond, rdlo, rdhi, rn, rm);
10109 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10111 CheckIT(cond);
10123 if (cond.IsNotNever() &&
10126 EmitA32(0x014000a0U | (cond.GetCondition() << 28) |
10132 Delegate(kSmlaltb, &Assembler::smlaltb, cond, rdlo, rdhi, rn, rm);
10136 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10138 CheckIT(cond);
10150 if (cond.IsNotNever() &&
10153 EmitA32(0x014000e0U | (cond.GetCondition() << 28) |
10159 Delegate(kSmlaltt, &Assembler::smlaltt, cond, rdlo, rdhi, rn, rm);
10163 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10165 CheckIT(cond);
10177 if (cond.IsNotNever() &&
10180 EmitA32(0x010000a0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10185 Delegate(kSmlatb, &Assembler::smlatb, cond, rd, rn, rm, ra);
10189 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10191 CheckIT(cond);
10203 if (cond.IsNotNever() &&
10206 EmitA32(0x010000e0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10211 Delegate(kSmlatt, &Assembler::smlatt, cond, rd, rn, rm, ra);
10215 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10217 CheckIT(cond);
10229 if (cond.IsNotNever() &&
10232 EmitA32(0x01200080U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10237 Delegate(kSmlawb, &Assembler::smlawb, cond, rd, rn, rm, ra);
10241 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10243 CheckIT(cond);
10255 if (cond.IsNotNever() &&
10258 EmitA32(0x012000c0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10263 Delegate(kSmlawt, &Assembler::smlawt, cond, rd, rn, rm, ra);
10267 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10269 CheckIT(cond);
10281 if (cond.IsNotNever() && !ra.Is(pc) &&
10283 EmitA32(0x07000050U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10288 Delegate(kSmlsd, &Assembler::smlsd, cond, rd, rn, rm, ra);
10292 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10294 CheckIT(cond);
10306 if (cond.IsNotNever() && !ra.Is(pc) &&
10308 EmitA32(0x07000070U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10313 Delegate(kSmlsdx, &Assembler::smlsdx, cond, rd, rn, rm, ra);
10317 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10319 CheckIT(cond);
10331 if (cond.IsNotNever() &&
10334 EmitA32(0x07400050U | (cond.GetCondition() << 28) |
10340 Delegate(kSmlsld, &Assembler::smlsld, cond, rdlo, rdhi, rn, rm);
10344 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10346 CheckIT(cond);
10358 if (cond.IsNotNever() &&
10361 EmitA32(0x07400070U | (cond.GetCondition() << 28) |
10367 Delegate(kSmlsldx, &Assembler::smlsldx, cond, rdlo, rdhi, rn, rm);
10371 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10373 CheckIT(cond);
10385 if (cond.IsNotNever() && !ra.Is(pc) &&
10387 EmitA32(0x07500010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10392 Delegate(kSmmla, &Assembler::smmla, cond, rd, rn, rm, ra);
10396 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10398 CheckIT(cond);
10410 if (cond.IsNotNever() && !ra.Is(pc) &&
10412 EmitA32(0x07500030U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10417 Delegate(kSmmlar, &Assembler::smmlar, cond, rd, rn, rm, ra);
10421 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10423 CheckIT(cond);
10435 if (cond.IsNotNever() &&
10438 EmitA32(0x075000d0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10443 Delegate(kSmmls, &Assembler::smmls, cond, rd, rn, rm, ra);
10447 Condition cond, Register rd, Register rn, Register rm, Register ra) {
10449 CheckIT(cond);
10461 if (cond.IsNotNever() &&
10464 EmitA32(0x075000f0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10469 Delegate(kSmmlsr, &Assembler::smmlsr, cond, rd, rn, rm, ra);
10472 void Assembler::smmul(Condition cond, Register rd, Register rn, Register rm) {
10474 CheckIT(cond);
10485 if (cond.IsNotNever() &&
10487 EmitA32(0x0750f010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10492 Delegate(kSmmul, &Assembler::smmul, cond, rd, rn, rm);
10495 void Assembler::smmulr(Condition cond, Register rd, Register rn, Register rm) {
10497 CheckIT(cond);
10508 if (cond.IsNotNever() &&
10510 EmitA32(0x0750f030U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10515 Delegate(kSmmulr, &Assembler::smmulr, cond, rd, rn, rm);
10518 void Assembler::smuad(Condition cond, Register rd, Register rn, Register rm) {
10520 CheckIT(cond);
10531 if (cond.IsNotNever() &&
10533 EmitA32(0x0700f010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10538 Delegate(kSmuad, &Assembler::smuad, cond, rd, rn, rm);
10541 void Assembler::smuadx(Condition cond, Register rd, Register rn, Register rm) {
10543 CheckIT(cond);
10554 if (cond.IsNotNever() &&
10556 EmitA32(0x0700f030U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10561 Delegate(kSmuadx, &Assembler::smuadx, cond, rd, rn, rm);
10564 void Assembler::smulbb(Condition cond, Register rd, Register rn, Register rm) {
10566 CheckIT(cond);
10577 if (cond.IsNotNever() &&
10579 EmitA32(0x01600080U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10584 Delegate(kSmulbb, &Assembler::smulbb, cond, rd, rn, rm);
10587 void Assembler::smulbt(Condition cond, Register rd, Register rn, Register rm) {
10589 CheckIT(cond);
10600 if (cond.IsNotNever() &&
10602 EmitA32(0x016000c0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10607 Delegate(kSmulbt, &Assembler::smulbt, cond, rd, rn, rm);
10611 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10613 CheckIT(cond);
10625 if (cond.IsNotNever() &&
10628 EmitA32(0x00c00090U | (cond.GetCondition() << 28) |
10634 Delegate(kSmull, &Assembler::smull, cond, rdlo, rdhi, rn, rm);
10638 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
10640 CheckIT(cond);
10643 if (cond.IsNotNever() &&
10646 EmitA32(0x00d00090U | (cond.GetCondition() << 28) |
10652 Delegate(kSmulls, &Assembler::smulls, cond, rdlo, rdhi, rn, rm);
10655 void Assembler::smultb(Condition cond, Register rd, Register rn, Register rm) {
10657 CheckIT(cond);
10668 if (cond.IsNotNever() &&
10670 EmitA32(0x016000a0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10675 Delegate(kSmultb, &Assembler::smultb, cond, rd, rn, rm);
10678 void Assembler::smultt(Condition cond, Register rd, Register rn, Register rm) {
10680 CheckIT(cond);
10691 if (cond.IsNotNever() &&
10693 EmitA32(0x016000e0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10698 Delegate(kSmultt, &Assembler::smultt, cond, rd, rn, rm);
10701 void Assembler::smulwb(Condition cond, Register rd, Register rn, Register rm) {
10703 CheckIT(cond);
10714 if (cond.IsNotNever() &&
10716 EmitA32(0x012000a0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10721 Delegate(kSmulwb, &Assembler::smulwb, cond, rd, rn, rm);
10724 void Assembler::smulwt(Condition cond, Register rd, Register rn, Register rm) {
10726 CheckIT(cond);
10737 if (cond.IsNotNever() &&
10739 EmitA32(0x012000e0U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10744 Delegate(kSmulwt, &Assembler::smulwt, cond, rd, rn, rm);
10747 void Assembler::smusd(Condition cond, Register rd, Register rn, Register rm) {
10749 CheckIT(cond);
10760 if (cond.IsNotNever() &&
10762 EmitA32(0x0700f050U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10767 Delegate(kSmusd, &Assembler::smusd, cond, rd, rn, rm);
10770 void Assembler::smusdx(Condition cond, Register rd, Register rn, Register rm) {
10772 CheckIT(cond);
10783 if (cond.IsNotNever() &&
10785 EmitA32(0x0700f070U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
10790 Delegate(kSmusdx, &Assembler::smusdx, cond, rd, rn, rm);
10793 void Assembler::ssat(Condition cond,
10798 CheckIT(cond);
10828 (amount <= 32) && cond.IsNotNever() &&
10832 EmitA32(0x06a00050U | (cond.GetCondition() << 28) |
10839 cond.IsNotNever() &&
10842 EmitA32(0x06a00010U | (cond.GetCondition() << 28) |
10849 Delegate(kSsat, &Assembler::ssat, cond, rd, imm, operand);
10852 void Assembler::ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
10854 CheckIT(cond);
10867 if ((imm >= 1) && (imm <= 16) && cond.IsNotNever() &&
10870 EmitA32(0x06a00f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
10875 Delegate(kSsat16, &Assembler::ssat16, cond, rd, imm, rn);
10878 void Assembler::ssax(Condition cond, Register rd, Register rn, Register rm) {
10880 CheckIT(cond);
10891 if (cond.IsNotNever() &&
10893 EmitA32(0x06100f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
10898 Delegate(kSsax, &Assembler::ssax, cond, rd, rn, rm);
10901 void Assembler::ssub16(Condition cond, Register rd, Register rn, Register rm) {
10903 CheckIT(cond);
10914 if (cond.IsNotNever() &&
10916 EmitA32(0x06100f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
10921 Delegate(kSsub16, &Assembler::ssub16, cond, rd, rn, rm);
10924 void Assembler::ssub8(Condition cond, Register rd, Register rn, Register rm) {
10926 CheckIT(cond);
10937 if (cond.IsNotNever() &&
10939 EmitA32(0x06100ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
10944 Delegate(kSsub8, &Assembler::ssub8, cond, rd, rn, rm);
10947 void Assembler::stl(Condition cond, Register rt, const MemOperand& operand) {
10949 CheckIT(cond);
10962 if (operand.IsOffset() && cond.IsNotNever() &&
10964 EmitA32(0x0180fc90U | (cond.GetCondition() << 28) | rt.GetCode() |
10970 Delegate(kStl, &Assembler::stl, cond, rt, operand);
10973 void Assembler::stlb(Condition cond, Register rt, const MemOperand& operand) {
10975 CheckIT(cond);
10988 if (operand.IsOffset() && cond.IsNotNever() &&
10990 EmitA32(0x01c0fc90U | (cond.GetCondition() << 28) | rt.GetCode() |
10996 Delegate(kStlb, &Assembler::stlb, cond, rt, operand);
10999 void Assembler::stlex(Condition cond,
11004 CheckIT(cond);
11018 if (operand.IsOffset() && cond.IsNotNever() &&
11020 EmitA32(0x01800e90U | (cond.GetCondition() << 28) |
11026 Delegate(kStlex, &Assembler::stlex, cond, rd, rt, operand);
11029 void Assembler::stlexb(Condition cond,
11034 CheckIT(cond);
11048 if (operand.IsOffset() && cond.IsNotNever() &&
11050 EmitA32(0x01c00e90U | (cond.GetCondition() << 28) |
11056 Delegate(kStlexb, &Assembler::stlexb, cond, rd, rt, operand);
11059 void Assembler::stlexd(Condition cond,
11065 CheckIT(cond);
11081 operand.IsOffset() && cond.IsNotNever() &&
11085 EmitA32(0x01a00e90U | (cond.GetCondition() << 28) |
11091 Delegate(kStlexd, &Assembler::stlexd, cond, rd, rt, rt2, operand);
11094 void Assembler::stlexh(Condition cond,
11099 CheckIT(cond);
11113 if (operand.IsOffset() && cond.IsNotNever() &&
11115 EmitA32(0x01e00e90U | (cond.GetCondition() << 28) |
11121 Delegate(kStlexh, &Assembler::stlexh, cond, rd, rt, operand);
11124 void Assembler::stlh(Condition cond, Register rt, const MemOperand& operand) {
11126 CheckIT(cond);
11139 if (operand.IsOffset() && cond.IsNotNever() &&
11141 EmitA32(0x01e0fc90U | (cond.GetCondition() << 28) | rt.GetCode() |
11147 Delegate(kStlh, &Assembler::stlh, cond, rt, operand);
11150 void Assembler::stm(Condition cond,
11156 CheckIT(cond);
11178 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11179 EmitA32(0x08800000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11185 Delegate(kStm, &Assembler::stm, cond, size, rn, write_back, registers);
11188 void Assembler::stmda(Condition cond,
11193 CheckIT(cond);
11196 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11197 EmitA32(0x08000000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11203 Delegate(kStmda, &Assembler::stmda, cond, rn, write_back, registers);
11206 void Assembler::stmdb(Condition cond,
11212 CheckIT(cond);
11234 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11235 EmitA32(0x09000000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11241 Delegate(kStmdb, &Assembler::stmdb, cond, size, rn, write_back, registers);
11244 void Assembler::stmea(Condition cond,
11250 CheckIT(cond);
11282 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11283 EmitA32(0x08800000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11289 Delegate(kStmea, &Assembler::stmea, cond, size, rn, write_back, registers);
11292 void Assembler::stmed(Condition cond,
11297 CheckIT(cond);
11300 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11301 EmitA32(0x08000000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11307 Delegate(kStmed, &Assembler::stmed, cond, rn, write_back, registers);
11310 void Assembler::stmfa(Condition cond,
11315 CheckIT(cond);
11318 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11319 EmitA32(0x09800000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11325 Delegate(kStmfa, &Assembler::stmfa, cond, rn, write_back, registers);
11328 void Assembler::stmfd(Condition cond,
11333 CheckIT(cond);
11347 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11348 EmitA32(0x09000000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11354 Delegate(kStmfd, &Assembler::stmfd, cond, rn, write_back, registers);
11357 void Assembler::stmib(Condition cond,
11362 CheckIT(cond);
11365 if (cond.IsNotNever() && (!rn.IsPC() || AllowUnpredictable())) {
11366 EmitA32(0x09800000U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
11372 Delegate(kStmib, &Assembler::stmib, cond, rn, write_back, registers);
11375 void Assembler::str(Condition cond,
11380 CheckIT(cond);
11445 cond.IsNotNever()) {
11448 EmitA32(0x05000000U | (cond.GetCondition() << 28) |
11455 cond.IsNotNever()) {
11458 EmitA32(0x04000000U | (cond.GetCondition() << 28) |
11465 cond.IsNotNever()) {
11468 EmitA32(0x05200000U | (cond.GetCondition() << 28) |
11508 if (operand.IsShiftValid() && operand.IsOffset() && cond.IsNotNever() &&
11513 EmitA32(0x07000000U | (cond.GetCondition() << 28) |
11520 cond.IsNotNever() && (!rm.IsPC() || AllowUnpredictable())) {
11524 EmitA32(0x06000000U | (cond.GetCondition() << 28) |
11530 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() &&
11535 EmitA32(0x07200000U | (cond.GetCondition() << 28) |
11542 Delegate(kStr, &Assembler::str, cond, size, rt, operand);
11545 void Assembler::strb(Condition cond,
11550 CheckIT(cond);
11606 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
11609 EmitA32(0x05400000U | (cond.GetCondition() << 28) |
11616 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
11619 EmitA32(0x04400000U | (cond.GetCondition() << 28) |
11626 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
11629 EmitA32(0x05600000U | (cond.GetCondition() << 28) |
11669 if (operand.IsShiftValid() && operand.IsOffset() && cond.IsNotNever() &&
11674 EmitA32(0x07400000U | (cond.GetCondition() << 28) |
11681 cond.IsNotNever() &&
11686 EmitA32(0x06400000U | (cond.GetCondition() << 28) |
11692 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() &&
11697 EmitA32(0x07600000U | (cond.GetCondition() << 28) |
11704 Delegate(kStrb, &Assembler::strb, cond, size, rt, operand);
11707 void Assembler::strd(Condition cond,
11712 CheckIT(cond);
11754 cond.IsNotNever() && ((((rt.GetCode() & 1) == 0) && !rt2.IsPC()) ||
11758 EmitA32(0x014000f0U | (cond.GetCondition() << 28) |
11766 cond.IsNotNever() && ((((rt.GetCode() & 1) == 0) && !rt2.IsPC()) ||
11770 EmitA32(0x004000f0U | (cond.GetCondition() << 28) |
11778 cond.IsNotNever() && ((((rt.GetCode() & 1) == 0) && !rt2.IsPC()) ||
11782 EmitA32(0x016000f0U | (cond.GetCondition() << 28) |
11796 operand.IsOffset() && cond.IsNotNever() &&
11800 EmitA32(0x010000f0U | (cond.GetCondition() << 28) |
11807 operand.IsPostIndex() && cond.IsNotNever() &&
11811 EmitA32(0x000000f0U | (cond.GetCondition() << 28) |
11818 operand.IsPreIndex() && cond.IsNotNever() &&
11822 EmitA32(0x012000f0U | (cond.GetCondition() << 28) |
11829 Delegate(kStrd, &Assembler::strd, cond, rt, rt2, operand);
11832 void Assembler::strex(Condition cond,
11837 CheckIT(cond);
11854 if ((offset == 0) && operand.IsOffset() && cond.IsNotNever() &&
11856 EmitA32(0x01800f90U | (cond.GetCondition() << 28) |
11862 Delegate(kStrex, &Assembler::strex, cond, rd, rt, operand);
11865 void Assembler::strexb(Condition cond,
11870 CheckIT(cond);
11884 if (operand.IsOffset() && cond.IsNotNever() &&
11886 EmitA32(0x01c00f90U | (cond.GetCondition() << 28) |
11892 Delegate(kStrexb, &Assembler::strexb, cond, rd, rt, operand);
11895 void Assembler::strexd(Condition cond,
11901 CheckIT(cond);
11917 operand.IsOffset() && cond.IsNotNever() &&
11921 EmitA32(0x01a00f90U | (cond.GetCondition() << 28) |
11927 Delegate(kStrexd, &Assembler::strexd, cond, rd, rt, rt2, operand);
11930 void Assembler::strexh(Condition cond,
11935 CheckIT(cond);
11949 if (operand.IsOffset() && cond.IsNotNever() &&
11951 EmitA32(0x01e00f90U | (cond.GetCondition() << 28) |
11957 Delegate(kStrexh, &Assembler::strexh, cond, rd, rt, operand);
11960 void Assembler::strh(Condition cond,
11965 CheckIT(cond);
12022 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
12025 EmitA32(0x014000b0U | (cond.GetCondition() << 28) |
12032 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
12035 EmitA32(0x004000b0U | (cond.GetCondition() << 28) |
12042 cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
12045 EmitA32(0x016000b0U | (cond.GetCondition() << 28) |
12067 if (operand.IsOffset() && cond.IsNotNever() &&
12070 EmitA32(0x010000b0U | (cond.GetCondition() << 28) |
12076 if (operand.IsPostIndex() && cond.IsNotNever() &&
12079 EmitA32(0x000000b0U | (cond.GetCondition() << 28) |
12085 if (operand.IsPreIndex() && cond.IsNotNever() &&
12088 EmitA32(0x012000b0U | (cond.GetCondition() << 28) |
12113 Delegate(kStrh, &Assembler::strh, cond, size, rt, operand);
12116 void Assembler::sub(Condition cond,
12122 CheckIT(cond);
12196 if (rn.Is(pc) && immediate_a32.IsValid() && cond.IsNotNever()) {
12197 EmitA32(0x024f0000U | (cond.GetCondition() << 28) |
12202 if (immediate_a32.IsValid() && cond.IsNotNever() &&
12204 EmitA32(0x02400000U | (cond.GetCondition() << 28) |
12210 if (rn.Is(sp) && immediate_a32.IsValid() && cond.IsNotNever()) {
12211 EmitA32(0x024d0000U | (cond.GetCondition() << 28) |
12262 if (shift.IsValidAmount(amount) && cond.IsNotNever() && !rn.Is(sp)) {
12264 EmitA32(0x00400000U | (cond.GetCondition() << 28) |
12270 if (rn.Is(sp) && shift.IsValidAmount(amount) && cond.IsNotNever()) {
12272 EmitA32(0x004d0000U | (cond.GetCondition() << 28) |
12285 if (cond.IsNotNever() &&
12288 EmitA32(0x00400010U | (cond.GetCondition() << 28) |
12295 Delegate(kSub, &Assembler::sub, cond, size, rd, rn, operand);
12298 void Assembler::sub(Condition cond, Register rd, const Operand& operand) {
12300 CheckIT(cond);
12312 Delegate(kSub, &Assembler::sub, cond, rd, operand);
12315 void Assembler::subs(Condition cond,
12321 CheckIT(cond);
12352 (OutsideITBlockAndAlOrLast(cond) || AllowUnpredictable())) {
12370 if (immediate_a32.IsValid() && cond.IsNotNever() && !rn.Is(sp)) {
12371 EmitA32(0x02500000U | (cond.GetCondition() << 28) |
12377 if (rn.Is(sp) && immediate_a32.IsValid() && cond.IsNotNever()) {
12378 EmitA32(0x025d0000U | (cond.GetCondition() << 28) |
12423 if (shift.IsValidAmount(amount) && cond.IsNotNever() && !rn.Is(sp)) {
12425 EmitA32(0x00500000U | (cond.GetCondition() << 28) |
12431 if (rn.Is(sp) && shift.IsValidAmount(amount) && cond.IsNotNever()) {
12433 EmitA32(0x005d0000U | (cond.GetCondition() << 28) |
12446 if (cond.IsNotNever() &&
12449 EmitA32(0x00500010U | (cond.GetCondition() << 28) |
12456 Delegate(kSubs, &Assembler::subs, cond, size, rd, rn, operand);
12476 void Assembler::subw(Condition cond,
12481 CheckIT(cond);
12502 Delegate(kSubw, &Assembler::subw, cond, rd, rn, operand);
12505 void Assembler::svc(Condition cond, uint32_t imm) {
12507 CheckIT(cond);
12517 if ((imm <= 16777215) && cond.IsNotNever()) {
12518 EmitA32(0x0f000000U | (cond.GetCondition() << 28) | imm);
12522 Delegate(kSvc, &Assembler::svc, cond, imm);
12525 void Assembler::sxtab(Condition cond,
12530 CheckIT(cond);
12549 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
12552 EmitA32(0x06a00070U | (cond.GetCondition() << 28) |
12559 Delegate(kSxtab, &Assembler::sxtab, cond, rd, rn, operand);
12562 void Assembler::sxtab16(Condition cond,
12567 CheckIT(cond);
12586 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
12589 EmitA32(0x06800070U | (cond.GetCondition() << 28) |
12596 Delegate(kSxtab16, &Assembler::sxtab16, cond, rd, rn, operand);
12599 void Assembler::sxtah(Condition cond,
12604 CheckIT(cond);
12623 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
12626 EmitA32(0x06b00070U | (cond.GetCondition() << 28) |
12633 Delegate(kSxtah, &Assembler::sxtah, cond, rd, rn, operand);
12636 void Assembler::sxtb(Condition cond,
12641 CheckIT(cond);
12670 ((amount % 8) == 0) && cond.IsNotNever() &&
12673 EmitA32(0x06af0070U | (cond.GetCondition() << 28) |
12679 Delegate(kSxtb, &Assembler::sxtb, cond, size, rd, operand);
12682 void Assembler::sxtb16(Condition cond, Register rd, const Operand& operand) {
12684 CheckIT(cond);
12703 ((amount % 8) == 0) && cond.IsNotNever() &&
12706 EmitA32(0x068f0070U | (cond.GetCondition() << 28) |
12712 Delegate(kSxtb16, &Assembler::sxtb16, cond, rd, operand);
12715 void Assembler::sxth(Condition cond,
12720 CheckIT(cond);
12749 ((amount % 8) == 0) && cond.IsNotNever() &&
12752 EmitA32(0x06bf0070U | (cond.GetCondition() << 28) |
12758 Delegate(kSxth, &Assembler::sxth, cond, size, rd, operand);
12761 void Assembler::tbb(Condition cond, Register rn, Register rm) {
12763 CheckIT(cond);
12766 if (OutsideITBlockAndAlOrLast(cond) &&
12773 Delegate(kTbb, &Assembler::tbb, cond, rn, rm);
12776 void Assembler::tbh(Condition cond, Register rn, Register rm) {
12778 CheckIT(cond);
12781 if (OutsideITBlockAndAlOrLast(cond) &&
12788 Delegate(kTbh, &Assembler::tbh, cond, rn, rm);
12791 void Assembler::teq(Condition cond, Register rn, const Operand& operand) {
12793 CheckIT(cond);
12810 if (immediate_a32.IsValid() && cond.IsNotNever()) {
12811 EmitA32(0x03300000U | (cond.GetCondition() << 28) |
12834 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
12836 EmitA32(0x01300000U | (cond.GetCondition() << 28) |
12849 if (cond.IsNotNever() &&
12851 EmitA32(0x01300010U | (cond.GetCondition() << 28) |
12858 Delegate(kTeq, &Assembler::teq, cond, rn, operand);
12861 void Assembler::tst(Condition cond,
12866 CheckIT(cond);
12884 if (immediate_a32.IsValid() && cond.IsNotNever()) {
12885 EmitA32(0x03100000U | (cond.GetCondition() << 28) |
12918 if (shift.IsValidAmount(amount) && cond.IsNotNever()) {
12920 EmitA32(0x01100000U | (cond.GetCondition() << 28) |
12933 if (cond.IsNotNever() &&
12935 EmitA32(0x01100010U | (cond.GetCondition() << 28) |
12942 Delegate(kTst, &Assembler::tst, cond, size, rn, operand);
12945 void Assembler::uadd16(Condition cond, Register rd, Register rn, Register rm) {
12947 CheckIT(cond);
12958 if (cond.IsNotNever() &&
12960 EmitA32(0x06500f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
12965 Delegate(kUadd16, &Assembler::uadd16, cond, rd, rn, rm);
12968 void Assembler::uadd8(Condition cond, Register rd, Register rn, Register rm) {
12970 CheckIT(cond);
12981 if (cond.IsNotNever() &&
12983 EmitA32(0x06500f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
12988 Delegate(kUadd8, &Assembler::uadd8, cond, rd, rn, rm);
12991 void Assembler::uasx(Condition cond, Register rd, Register rn, Register rm) {
12993 CheckIT(cond);
13004 if (cond.IsNotNever() &&
13006 EmitA32(0x06500f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13011 Delegate(kUasx, &Assembler::uasx, cond, rd, rn, rm);
13015 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
13017 CheckIT(cond);
13031 if ((lsb <= 31) && cond.IsNotNever() &&
13035 EmitA32(0x07e00050U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13040 Delegate(kUbfx, &Assembler::ubfx, cond, rd, rn, lsb, width);
13043 void Assembler::udf(Condition cond, EncodingSize size, uint32_t imm) {
13045 CheckIT(cond);
13049 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13057 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13066 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13072 Delegate(kUdf, &Assembler::udf, cond, size, imm);
13075 void Assembler::udiv(Condition cond, Register rd, Register rn, Register rm) {
13077 CheckIT(cond);
13088 if (cond.IsNotNever() &&
13090 EmitA32(0x0730f010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
13095 Delegate(kUdiv, &Assembler::udiv, cond, rd, rn, rm);
13098 void Assembler::uhadd16(Condition cond, Register rd, Register rn, Register rm) {
13100 CheckIT(cond);
13111 if (cond.IsNotNever() &&
13113 EmitA32(0x06700f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13118 Delegate(kUhadd16, &Assembler::uhadd16, cond, rd, rn, rm);
13121 void Assembler::uhadd8(Condition cond, Register rd, Register rn, Register rm) {
13123 CheckIT(cond);
13134 if (cond.IsNotNever() &&
13136 EmitA32(0x06700f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13141 Delegate(kUhadd8, &Assembler::uhadd8, cond, rd, rn, rm);
13144 void Assembler::uhasx(Condition cond, Register rd, Register rn, Register rm) {
13146 CheckIT(cond);
13157 if (cond.IsNotNever() &&
13159 EmitA32(0x06700f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13164 Delegate(kUhasx, &Assembler::uhasx, cond, rd, rn, rm);
13167 void Assembler::uhsax(Condition cond, Register rd, Register rn, Register rm) {
13169 CheckIT(cond);
13180 if (cond.IsNotNever() &&
13182 EmitA32(0x06700f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13187 Delegate(kUhsax, &Assembler::uhsax, cond, rd, rn, rm);
13190 void Assembler::uhsub16(Condition cond, Register rd, Register rn, Register rm) {
13192 CheckIT(cond);
13203 if (cond.IsNotNever() &&
13205 EmitA32(0x06700f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13210 Delegate(kUhsub16, &Assembler::uhsub16, cond, rd, rn, rm);
13213 void Assembler::uhsub8(Condition cond, Register rd, Register rn, Register rm) {
13215 CheckIT(cond);
13226 if (cond.IsNotNever() &&
13228 EmitA32(0x06700ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13233 Delegate(kUhsub8, &Assembler::uhsub8, cond, rd, rn, rm);
13237 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
13239 CheckIT(cond);
13251 if (cond.IsNotNever() &&
13254 EmitA32(0x00400090U | (cond.GetCondition() << 28) |
13260 Delegate(kUmaal, &Assembler::umaal, cond, rdlo, rdhi, rn, rm);
13264 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
13266 CheckIT(cond);
13278 if (cond.IsNotNever() &&
13281 EmitA32(0x00a00090U | (cond.GetCondition() << 28) |
13287 Delegate(kUmlal, &Assembler::umlal, cond, rdlo, rdhi, rn, rm);
13291 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
13293 CheckIT(cond);
13296 if (cond.IsNotNever() &&
13299 EmitA32(0x00b00090U | (cond.GetCondition() << 28) |
13305 Delegate(kUmlals, &Assembler::umlals, cond, rdlo, rdhi, rn, rm);
13309 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
13311 CheckIT(cond);
13323 if (cond.IsNotNever() &&
13326 EmitA32(0x00800090U | (cond.GetCondition() << 28) |
13332 Delegate(kUmull, &Assembler::umull, cond, rdlo, rdhi, rn, rm);
13336 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
13338 CheckIT(cond);
13341 if (cond.IsNotNever() &&
13344 EmitA32(0x00900090U | (cond.GetCondition() << 28) |
13350 Delegate(kUmulls, &Assembler::umulls, cond, rdlo, rdhi, rn, rm);
13353 void Assembler::uqadd16(Condition cond, Register rd, Register rn, Register rm) {
13355 CheckIT(cond);
13366 if (cond.IsNotNever() &&
13368 EmitA32(0x06600f10U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13373 Delegate(kUqadd16, &Assembler::uqadd16, cond, rd, rn, rm);
13376 void Assembler::uqadd8(Condition cond, Register rd, Register rn, Register rm) {
13378 CheckIT(cond);
13389 if (cond.IsNotNever() &&
13391 EmitA32(0x06600f90U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13396 Delegate(kUqadd8, &Assembler::uqadd8, cond, rd, rn, rm);
13399 void Assembler::uqasx(Condition cond, Register rd, Register rn, Register rm) {
13401 CheckIT(cond);
13412 if (cond.IsNotNever() &&
13414 EmitA32(0x06600f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13419 Delegate(kUqasx, &Assembler::uqasx, cond, rd, rn, rm);
13422 void Assembler::uqsax(Condition cond, Register rd, Register rn, Register rm) {
13424 CheckIT(cond);
13435 if (cond.IsNotNever() &&
13437 EmitA32(0x06600f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13442 Delegate(kUqsax, &Assembler::uqsax, cond, rd, rn, rm);
13445 void Assembler::uqsub16(Condition cond, Register rd, Register rn, Register rm) {
13447 CheckIT(cond);
13458 if (cond.IsNotNever() &&
13460 EmitA32(0x06600f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13465 Delegate(kUqsub16, &Assembler::uqsub16, cond, rd, rn, rm);
13468 void Assembler::uqsub8(Condition cond, Register rd, Register rn, Register rm) {
13470 CheckIT(cond);
13481 if (cond.IsNotNever() &&
13483 EmitA32(0x06600ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13488 Delegate(kUqsub8, &Assembler::uqsub8, cond, rd, rn, rm);
13491 void Assembler::usad8(Condition cond, Register rd, Register rn, Register rm) {
13493 CheckIT(cond);
13504 if (cond.IsNotNever() &&
13506 EmitA32(0x0780f010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
13511 Delegate(kUsad8, &Assembler::usad8, cond, rd, rn, rm);
13515 Condition cond, Register rd, Register rn, Register rm, Register ra) {
13517 CheckIT(cond);
13529 if (cond.IsNotNever() && !ra.Is(pc) &&
13531 EmitA32(0x07800010U | (cond.GetCondition() << 28) | (rd.GetCode() << 16) |
13536 Delegate(kUsada8, &Assembler::usada8, cond, rd, rn, rm, ra);
13539 void Assembler::usat(Condition cond,
13544 CheckIT(cond);
13571 cond.IsNotNever() &&
13574 EmitA32(0x06e00050U | (cond.GetCondition() << 28) |
13580 if ((imm <= 31) && shift.IsLSL() && (amount <= 31) && cond.IsNotNever() &&
13582 EmitA32(0x06e00010U | (cond.GetCondition() << 28) |
13589 Delegate(kUsat, &Assembler::usat, cond, rd, imm, operand);
13592 void Assembler::usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
13594 CheckIT(cond);
13605 if ((imm <= 15) && cond.IsNotNever() &&
13607 EmitA32(0x06e00f30U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13612 Delegate(kUsat16, &Assembler::usat16, cond, rd, imm, rn);
13615 void Assembler::usax(Condition cond, Register rd, Register rn, Register rm) {
13617 CheckIT(cond);
13628 if (cond.IsNotNever() &&
13630 EmitA32(0x06500f50U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13635 Delegate(kUsax, &Assembler::usax, cond, rd, rn, rm);
13638 void Assembler::usub16(Condition cond, Register rd, Register rn, Register rm) {
13640 CheckIT(cond);
13651 if (cond.IsNotNever() &&
13653 EmitA32(0x06500f70U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13658 Delegate(kUsub16, &Assembler::usub16, cond, rd, rn, rm);
13661 void Assembler::usub8(Condition cond, Register rd, Register rn, Register rm) {
13663 CheckIT(cond);
13674 if (cond.IsNotNever() &&
13676 EmitA32(0x06500ff0U | (cond.GetCondition() << 28) | (rd.GetCode() << 12) |
13681 Delegate(kUsub8, &Assembler::usub8, cond, rd, rn, rm);
13684 void Assembler::uxtab(Condition cond,
13689 CheckIT(cond);
13708 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
13711 EmitA32(0x06e00070U | (cond.GetCondition() << 28) |
13718 Delegate(kUxtab, &Assembler::uxtab, cond, rd, rn, operand);
13721 void Assembler::uxtab16(Condition cond,
13726 CheckIT(cond);
13745 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
13748 EmitA32(0x06c00070U | (cond.GetCondition() << 28) |
13755 Delegate(kUxtab16, &Assembler::uxtab16, cond, rd, rn, operand);
13758 void Assembler::uxtah(Condition cond,
13763 CheckIT(cond);
13782 ((amount % 8) == 0) && cond.IsNotNever() && !rn.Is(pc) &&
13785 EmitA32(0x06f00070U | (cond.GetCondition() << 28) |
13792 Delegate(kUxtah, &Assembler::uxtah, cond, rd, rn, operand);
13795 void Assembler::uxtb(Condition cond,
13800 CheckIT(cond);
13829 ((amount % 8) == 0) && cond.IsNotNever() &&
13832 EmitA32(0x06ef0070U | (cond.GetCondition() << 28) |
13838 Delegate(kUxtb, &Assembler::uxtb, cond, size, rd, operand);
13841 void Assembler::uxtb16(Condition cond, Register rd, const Operand& operand) {
13843 CheckIT(cond);
13862 ((amount % 8) == 0) && cond.IsNotNever() &&
13865 EmitA32(0x06cf0070U | (cond.GetCondition() << 28) |
13871 Delegate(kUxtb16, &Assembler::uxtb16, cond, rd, operand);
13874 void Assembler::uxth(Condition cond,
13879 CheckIT(cond);
13908 ((amount % 8) == 0) && cond.IsNotNever() &&
13911 EmitA32(0x06ff0070U | (cond.GetCondition() << 28) |
13917 Delegate(kUxth, &Assembler::uxth, cond, size, rd, operand);
13921 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
13923 CheckIT(cond);
13928 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13939 if (cond.Is(al)) {
13947 Delegate(kVaba, &Assembler::vaba, cond, dt, rd, rn, rm);
13951 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
13953 CheckIT(cond);
13958 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13969 if (cond.Is(al)) {
13977 Delegate(kVaba, &Assembler::vaba, cond, dt, rd, rn, rm);
13981 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
13983 CheckIT(cond);
13988 if (cond.Is(al) || AllowStronglyDiscouraged()) {
13999 if (cond.Is(al)) {
14007 Delegate(kVabal, &Assembler::vabal, cond, dt, rd, rn, rm);
14011 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14013 CheckIT(cond);
14018 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14027 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14038 if (cond.Is(al)) {
14046 if (cond.Is(al)) {
14054 Delegate(kVabd, &Assembler::vabd, cond, dt, rd, rn, rm);
14058 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14060 CheckIT(cond);
14065 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14074 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14085 if (cond.Is(al)) {
14093 if (cond.Is(al)) {
14101 Delegate(kVabd, &Assembler::vabd, cond, dt, rd, rn, rm);
14105 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
14107 CheckIT(cond);
14112 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14123 if (cond.Is(al)) {
14131 Delegate(kVabdl, &Assembler::vabdl, cond, dt, rd, rn, rm);
14134 void Assembler::vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
14136 CheckIT(cond);
14141 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14158 if (cond.Is(al)) {
14166 if (dt.Is(F64) && cond.IsNotNever()) {
14167 EmitA32(0x0eb00bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
14172 Delegate(kVabs, &Assembler::vabs, cond, dt, rd, rm);
14175 void Assembler::vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
14177 CheckIT(cond);
14182 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14193 if (cond.Is(al)) {
14201 Delegate(kVabs, &Assembler::vabs, cond, dt, rd, rm);
14204 void Assembler::vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
14206 CheckIT(cond);
14216 if (dt.Is(F32) && cond.IsNotNever()) {
14217 EmitA32(0x0eb00ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
14222 Delegate(kVabs, &Assembler::vabs, cond, dt, rd, rm);
14226 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14228 CheckIT(cond);
14232 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14242 if (cond.Is(al)) {
14249 Delegate(kVacge, &Assembler::vacge, cond, dt, rd, rn, rm);
14253 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14255 CheckIT(cond);
14259 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14269 if (cond.Is(al)) {
14276 Delegate(kVacge, &Assembler::vacge, cond, dt, rd, rn, rm);
14280 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14282 CheckIT(cond);
14286 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14296 if (cond.Is(al)) {
14303 Delegate(kVacgt, &Assembler::vacgt, cond, dt, rd, rn, rm);
14307 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14309 CheckIT(cond);
14313 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14323 if (cond.Is(al)) {
14330 Delegate(kVacgt, &Assembler::vacgt, cond, dt, rd, rn, rm);
14334 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14336 CheckIT(cond);
14340 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14350 if (cond.Is(al)) {
14357 Delegate(kVacle, &Assembler::vacle, cond, dt, rd, rn, rm);
14361 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14363 CheckIT(cond);
14367 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14377 if (cond.Is(al)) {
14384 Delegate(kVacle, &Assembler::vacle, cond, dt, rd, rn, rm);
14388 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14390 CheckIT(cond);
14394 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14404 if (cond.Is(al)) {
14411 Delegate(kVaclt, &Assembler::vaclt, cond, dt, rd, rn, rm);
14415 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14417 CheckIT(cond);
14421 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14431 if (cond.Is(al)) {
14438 Delegate(kVaclt, &Assembler::vaclt, cond, dt, rd, rn, rm);
14442 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14444 CheckIT(cond);
14449 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14465 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14475 if (cond.Is(al)) {
14482 if (dt.Is(F64) && cond.IsNotNever()) {
14483 EmitA32(0x0e300b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
14489 if (cond.Is(al)) {
14496 Delegate(kVadd, &Assembler::vadd, cond, dt, rd, rn, rm);
14500 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14502 CheckIT(cond);
14507 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14516 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14526 if (cond.Is(al)) {
14534 if (cond.Is(al)) {
14541 Delegate(kVadd, &Assembler::vadd, cond, dt, rd, rn, rm);
14545 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
14547 CheckIT(cond);
14558 if (dt.Is(F32) && cond.IsNotNever()) {
14559 EmitA32(0x0e300a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
14564 Delegate(kVadd, &Assembler::vadd, cond, dt, rd, rn, rm);
14568 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
14570 CheckIT(cond);
14575 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14585 if (cond.Is(al)) {
14592 Delegate(kVaddhn, &Assembler::vaddhn, cond, dt, rd, rn, rm);
14596 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
14598 CheckIT(cond);
14603 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14614 if (cond.Is(al)) {
14622 Delegate(kVaddl, &Assembler::vaddl, cond, dt, rd, rn, rm);
14626 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
14628 CheckIT(cond);
14633 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14644 if (cond.Is(al)) {
14652 Delegate(kVaddw, &Assembler::vaddw, cond, dt, rd, rn, rm);
14655 void Assembler::vand(Condition cond,
14661 CheckIT(cond);
14667 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14680 if (cond.Is(al)) {
14695 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14703 if (cond.Is(al)) {
14710 Delegate(kVand, &Assembler::vand, cond, dt, rd, rn, operand);
14713 void Assembler::vand(Condition cond,
14719 CheckIT(cond);
14725 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14738 if (cond.Is(al)) {
14753 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14761 if (cond.Is(al)) {
14768 Delegate(kVand, &Assembler::vand, cond, dt, rd, rn, operand);
14771 void Assembler::vbic(Condition cond,
14777 CheckIT(cond);
14783 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14796 if (cond.Is(al)) {
14811 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14819 if (cond.Is(al)) {
14826 Delegate(kVbic, &Assembler::vbic, cond, dt, rd, rn, operand);
14829 void Assembler::vbic(Condition cond,
14835 CheckIT(cond);
14841 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14854 if (cond.Is(al)) {
14869 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14877 if (cond.Is(al)) {
14884 Delegate(kVbic, &Assembler::vbic, cond, dt, rd, rn, operand);
14888 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14890 CheckIT(cond);
14894 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14902 if (cond.Is(al)) {
14908 Delegate(kVbif, &Assembler::vbif, cond, dt, rd, rn, rm);
14912 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14914 CheckIT(cond);
14918 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14926 if (cond.Is(al)) {
14932 Delegate(kVbif, &Assembler::vbif, cond, dt, rd, rn, rm);
14936 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14938 CheckIT(cond);
14942 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14950 if (cond.Is(al)) {
14956 Delegate(kVbit, &Assembler::vbit, cond, dt, rd, rn, rm);
14960 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
14962 CheckIT(cond);
14966 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14974 if (cond.Is(al)) {
14980 Delegate(kVbit, &Assembler::vbit, cond, dt, rd, rn, rm);
14984 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
14986 CheckIT(cond);
14990 if (cond.Is(al) || AllowStronglyDiscouraged()) {
14998 if (cond.Is(al)) {
15004 Delegate(kVbsl, &Assembler::vbsl, cond, dt, rd, rn, rm);
15008 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15010 CheckIT(cond);
15014 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15022 if (cond.Is(al)) {
15028 Delegate(kVbsl, &Assembler::vbsl, cond, dt, rd, rn, rm);
15031 void Assembler::vceq(Condition cond,
15037 CheckIT(cond);
15045 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15057 if (cond.Is(al)) {
15068 Delegate(kVceq, &Assembler::vceq, cond, dt, rd, rm, operand);
15071 void Assembler::vceq(Condition cond,
15077 CheckIT(cond);
15085 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15097 if (cond.Is(al)) {
15108 Delegate(kVceq, &Assembler::vceq, cond, dt, rd, rm, operand);
15112 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
15114 CheckIT(cond);
15120 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15129 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15139 if (cond.Is(al)) {
15147 if (cond.Is(al)) {
15154 Delegate(kVceq, &Assembler::vceq, cond, dt, rd, rn, rm);
15158 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15160 CheckIT(cond);
15166 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15175 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15185 if (cond.Is(al)) {
15193 if (cond.Is(al)) {
15200 Delegate(kVceq, &Assembler::vceq, cond, dt, rd, rn, rm);
15203 void Assembler::vcge(Condition cond,
15209 CheckIT(cond);
15217 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15229 if (cond.Is(al)) {
15240 Delegate(kVcge, &Assembler::vcge, cond, dt, rd, rm, operand);
15243 void Assembler::vcge(Condition cond,
15249 CheckIT(cond);
15257 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15269 if (cond.Is(al)) {
15280 Delegate(kVcge, &Assembler::vcge, cond, dt, rd, rm, operand);
15284 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
15286 CheckIT(cond);
15291 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15301 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15311 if (cond.Is(al)) {
15320 if (cond.Is(al)) {
15327 Delegate(kVcge, &Assembler::vcge, cond, dt, rd, rn, rm);
15331 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15333 CheckIT(cond);
15338 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15348 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15358 if (cond.Is(al)) {
15367 if (cond.Is(al)) {
15374 Delegate(kVcge, &Assembler::vcge, cond, dt, rd, rn, rm);
15377 void Assembler::vcgt(Condition cond,
15383 CheckIT(cond);
15391 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15403 if (cond.Is(al)) {
15414 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rm, operand);
15417 void Assembler::vcgt(Condition cond,
15423 CheckIT(cond);
15431 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15443 if (cond.Is(al)) {
15454 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rm, operand);
15458 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
15460 CheckIT(cond);
15465 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15475 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15485 if (cond.Is(al)) {
15494 if (cond.Is(al)) {
15501 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rn, rm);
15505 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15507 CheckIT(cond);
15512 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15522 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15532 if (cond.Is(al)) {
15541 if (cond.Is(al)) {
15548 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rn, rm);
15551 void Assembler::vcle(Condition cond,
15557 CheckIT(cond);
15565 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15577 if (cond.Is(al)) {
15588 Delegate(kVcle, &Assembler::vcle, cond, dt, rd, rm, operand);
15591 void Assembler::vcle(Condition cond,
15597 CheckIT(cond);
15605 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15617 if (cond.Is(al)) {
15628 Delegate(kVcle, &Assembler::vcle, cond, dt, rd, rm, operand);
15632 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
15634 CheckIT(cond);
15639 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15649 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15659 if (cond.Is(al)) {
15668 if (cond.Is(al)) {
15675 Delegate(kVcle, &Assembler::vcle, cond, dt, rd, rn, rm);
15679 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15681 CheckIT(cond);
15686 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15696 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15706 if (cond.Is(al)) {
15715 if (cond.Is(al)) {
15722 Delegate(kVcle, &Assembler::vcle, cond, dt, rd, rn, rm);
15725 void Assembler::vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
15727 CheckIT(cond);
15732 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15742 if (cond.Is(al)) {
15749 Delegate(kVcls, &Assembler::vcls, cond, dt, rd, rm);
15752 void Assembler::vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
15754 CheckIT(cond);
15759 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15769 if (cond.Is(al)) {
15776 Delegate(kVcls, &Assembler::vcls, cond, dt, rd, rm);
15779 void Assembler::vclt(Condition cond,
15785 CheckIT(cond);
15793 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15805 if (cond.Is(al)) {
15816 Delegate(kVclt, &Assembler::vclt, cond, dt, rd, rm, operand);
15819 void Assembler::vclt(Condition cond,
15825 CheckIT(cond);
15833 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15845 if (cond.Is(al)) {
15856 Delegate(kVclt, &Assembler::vclt, cond, dt, rd, rm, operand);
15860 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
15862 CheckIT(cond);
15867 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15877 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15887 if (cond.Is(al)) {
15896 if (cond.Is(al)) {
15903 Delegate(kVclt, &Assembler::vclt, cond, dt, rd, rn, rm);
15907 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
15909 CheckIT(cond);
15914 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15924 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15934 if (cond.Is(al)) {
15943 if (cond.Is(al)) {
15950 Delegate(kVclt, &Assembler::vclt, cond, dt, rd, rn, rm);
15953 void Assembler::vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
15955 CheckIT(cond);
15960 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15970 if (cond.Is(al)) {
15977 Delegate(kVclz, &Assembler::vclz, cond, dt, rd, rm);
15980 void Assembler::vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
15982 CheckIT(cond);
15987 if (cond.Is(al) || AllowStronglyDiscouraged()) {
15997 if (cond.Is(al)) {
16004 Delegate(kVclz, &Assembler::vclz, cond, dt, rd, rm);
16007 void Assembler::vcmp(Condition cond,
16012 CheckIT(cond);
16024 if (dt.Is(F32) && cond.IsNotNever()) {
16025 EmitA32(0x0eb40a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16041 if (dt.Is(F32) && (operand.IsFloatZero()) && cond.IsNotNever()) {
16042 EmitA32(0x0eb50a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12));
16047 Delegate(kVcmp, &Assembler::vcmp, cond, dt, rd, operand);
16050 void Assembler::vcmp(Condition cond,
16055 CheckIT(cond);
16067 if (dt.Is(F64) && cond.IsNotNever()) {
16068 EmitA32(0x0eb40b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16084 if (dt.Is(F64) && (operand.IsFloatZero()) && cond.IsNotNever()) {
16085 EmitA32(0x0eb50b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12));
16090 Delegate(kVcmp, &Assembler::vcmp, cond, dt, rd, operand);
16093 void Assembler::vcmpe(Condition cond,
16098 CheckIT(cond);
16110 if (dt.Is(F32) && cond.IsNotNever()) {
16111 EmitA32(0x0eb40ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16127 if (dt.Is(F32) && (operand.IsFloatZero()) && cond.IsNotNever()) {
16128 EmitA32(0x0eb50ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12));
16133 Delegate(kVcmpe, &Assembler::vcmpe, cond, dt, rd, operand);
16136 void Assembler::vcmpe(Condition cond,
16141 CheckIT(cond);
16153 if (dt.Is(F64) && cond.IsNotNever()) {
16154 EmitA32(0x0eb40bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16170 if (dt.Is(F64) && (operand.IsFloatZero()) && cond.IsNotNever()) {
16171 EmitA32(0x0eb50bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12));
16176 Delegate(kVcmpe, &Assembler::vcmpe, cond, dt, rd, operand);
16179 void Assembler::vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
16181 CheckIT(cond);
16185 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16194 if (cond.Is(al)) {
16200 Delegate(kVcnt, &Assembler::vcnt, cond, dt, rd, rm);
16203 void Assembler::vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
16205 CheckIT(cond);
16209 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16218 if (cond.Is(al)) {
16224 Delegate(kVcnt, &Assembler::vcnt, cond, dt, rd, rm);
16228 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
16230 CheckIT(cond);
16248 if (dt1.Is(F64) && dt2.Is(F32) && cond.IsNotNever()) {
16249 EmitA32(0x0eb70ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16254 if (dt1.Is(F64) && encoded_dt.IsValid() && cond.IsNotNever()) {
16255 EmitA32(0x0eb80b40U | (cond.GetCondition() << 28) |
16261 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16265 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
16267 CheckIT(cond);
16289 if (dt1.Is(F32) && dt2.Is(F64) && cond.IsNotNever()) {
16290 EmitA32(0x0eb70bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16295 if (dt1.Is(U32) && dt2.Is(F64) && cond.IsNotNever()) {
16296 EmitA32(0x0ebc0bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16301 if (dt1.Is(S32) && dt2.Is(F64) && cond.IsNotNever()) {
16302 EmitA32(0x0ebd0bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16307 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16310 void Assembler::vcvt(Condition cond,
16317 CheckIT(cond);
16324 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16368 if (cond.Is(al)) {
16380 cond.IsNotNever()) {
16386 EmitA32(0x0eba0b40U | (cond.GetCondition() << 28) |
16397 cond.IsNotNever()) {
16403 EmitA32(0x0ebe0b40U | (cond.GetCondition() << 28) |
16411 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm, fbits);
16414 void Assembler::vcvt(Condition cond,
16421 CheckIT(cond);
16426 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16438 if (cond.Is(al)) {
16447 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm, fbits);
16450 void Assembler::vcvt(Condition cond,
16457 CheckIT(cond);
16498 cond.IsNotNever()) {
16504 EmitA32(0x0eba0a40U | (cond.GetCondition() << 28) |
16515 cond.IsNotNever()) {
16521 EmitA32(0x0ebe0a40U | (cond.GetCondition() << 28) |
16529 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm, fbits);
16533 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
16535 CheckIT(cond);
16540 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16550 if (cond.Is(al)) {
16557 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16561 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
16563 CheckIT(cond);
16568 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16578 if (cond.Is(al)) {
16585 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16589 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
16591 CheckIT(cond);
16595 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16604 if (cond.Is(al)) {
16610 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16614 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
16616 CheckIT(cond);
16620 if (cond.Is(al) || AllowStronglyDiscouraged()) {
16629 if (cond.Is(al)) {
16635 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16639 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
16641 CheckIT(cond);
16665 if (dt1.Is(U32) && dt2.Is(F32) && cond.IsNotNever()) {
16666 EmitA32(0x0ebc0ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16671 if (dt1.Is(S32) && dt2.Is(F32) && cond.IsNotNever()) {
16672 EmitA32(0x0ebd0ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16677 if (dt1.Is(F32) && encoded_dt.IsValid() && cond.IsNotNever()) {
16678 EmitA32(0x0eb80a40U | (cond.GetCondition() << 28) |
16684 Delegate(kVcvt, &Assembler::vcvt, cond, dt1, dt2, rd, rm);
16780 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
16782 CheckIT(cond);
16798 if (dt1.Is(F32) && dt2.Is(F16) && cond.IsNotNever()) {
16799 EmitA32(0x0eb20a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16804 if (dt1.Is(F16) && dt2.Is(F32) && cond.IsNotNever()) {
16805 EmitA32(0x0eb30a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16810 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm);
16814 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
16816 CheckIT(cond);
16826 if (dt1.Is(F64) && dt2.Is(F16) && cond.IsNotNever()) {
16827 EmitA32(0x0eb20b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16832 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm);
16836 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
16838 CheckIT(cond);
16848 if (dt1.Is(F16) && dt2.Is(F64) && cond.IsNotNever()) {
16849 EmitA32(0x0eb30b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
16854 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm);
17134 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
17136 CheckIT(cond);
17152 if (dt1.Is(U32) && dt2.Is(F32) && cond.IsNotNever()) {
17153 EmitA32(0x0ebc0a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17158 if (dt1.Is(S32) && dt2.Is(F32) && cond.IsNotNever()) {
17159 EmitA32(0x0ebd0a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17164 Delegate(kVcvtr, &Assembler::vcvtr, cond, dt1, dt2, rd, rm);
17168 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
17170 CheckIT(cond);
17186 if (dt1.Is(U32) && dt2.Is(F64) && cond.IsNotNever()) {
17187 EmitA32(0x0ebc0b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17192 if (dt1.Is(S32) && dt2.Is(F64) && cond.IsNotNever()) {
17193 EmitA32(0x0ebd0b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17198 Delegate(kVcvtr, &Assembler::vcvtr, cond, dt1, dt2, rd, rm);
17202 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
17204 CheckIT(cond);
17220 if (dt1.Is(F32) && dt2.Is(F16) && cond.IsNotNever()) {
17221 EmitA32(0x0eb20ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17226 if (dt1.Is(F16) && dt2.Is(F32) && cond.IsNotNever()) {
17227 EmitA32(0x0eb30ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17232 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm);
17236 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
17238 CheckIT(cond);
17248 if (dt1.Is(F64) && dt2.Is(F16) && cond.IsNotNever()) {
17249 EmitA32(0x0eb20bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17254 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm);
17258 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
17260 CheckIT(cond);
17270 if (dt1.Is(F16) && dt2.Is(F64) && cond.IsNotNever()) {
17271 EmitA32(0x0eb30bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17276 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm);
17280 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
17282 CheckIT(cond);
17293 if (dt.Is(F32) && cond.IsNotNever()) {
17294 EmitA32(0x0e800a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17299 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm);
17303 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17305 CheckIT(cond);
17316 if (dt.Is(F64) && cond.IsNotNever()) {
17317 EmitA32(0x0e800b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17322 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm);
17325 void Assembler::vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
17327 CheckIT(cond);
17332 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17342 if (encoded_dt.IsValid() && cond.IsNotNever() &&
17344 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17345 EmitA32(0x0ea00b10U | (cond.GetCondition() << 28) |
17353 Delegate(kVdup, &Assembler::vdup, cond, dt, rd, rt);
17356 void Assembler::vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
17358 CheckIT(cond);
17363 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17373 if (encoded_dt.IsValid() && cond.IsNotNever() &&
17375 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17376 EmitA32(0x0e800b10U | (cond.GetCondition() << 28) |
17384 Delegate(kVdup, &Assembler::vdup, cond, dt, rd, rt);
17387 void Assembler::vdup(Condition cond,
17392 CheckIT(cond);
17397 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17407 if (cond.Is(al)) {
17414 Delegate(kVdup, &Assembler::vdup, cond, dt, rd, rm);
17417 void Assembler::vdup(Condition cond,
17422 CheckIT(cond);
17427 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17437 if (cond.Is(al)) {
17444 Delegate(kVdup, &Assembler::vdup, cond, dt, rd, rm);
17448 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17450 CheckIT(cond);
17454 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17462 if (cond.Is(al)) {
17468 Delegate(kVeor, &Assembler::veor, cond, dt, rd, rn, rm);
17472 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
17474 CheckIT(cond);
17478 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17486 if (cond.Is(al)) {
17492 Delegate(kVeor, &Assembler::veor, cond, dt, rd, rn, rm);
17495 void Assembler::vext(Condition cond,
17502 CheckIT(cond);
17509 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17519 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17530 if (cond.Is(al)) {
17539 if (cond.Is(al)) {
17549 Delegate(kVext, &Assembler::vext, cond, dt, rd, rn, rm, operand);
17552 void Assembler::vext(Condition cond,
17559 CheckIT(cond);
17566 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17576 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17587 if (cond.Is(al)) {
17596 if (cond.Is(al)) {
17606 Delegate(kVext, &Assembler::vext, cond, dt, rd, rn, rm, operand);
17610 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17612 CheckIT(cond);
17616 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17633 if (cond.Is(al)) {
17640 if (dt.Is(F64) && cond.IsNotNever()) {
17641 EmitA32(0x0ea00b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17646 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm);
17650 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
17652 CheckIT(cond);
17656 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17666 if (cond.Is(al)) {
17673 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm);
17677 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
17679 CheckIT(cond);
17690 if (dt.Is(F32) && cond.IsNotNever()) {
17691 EmitA32(0x0ea00a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17696 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm);
17700 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17702 CheckIT(cond);
17706 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17723 if (cond.Is(al)) {
17730 if (dt.Is(F64) && cond.IsNotNever()) {
17731 EmitA32(0x0ea00b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17736 Delegate(kVfms, &Assembler::vfms, cond, dt, rd, rn, rm);
17740 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
17742 CheckIT(cond);
17746 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17756 if (cond.Is(al)) {
17763 Delegate(kVfms, &Assembler::vfms, cond, dt, rd, rn, rm);
17767 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
17769 CheckIT(cond);
17780 if (dt.Is(F32) && cond.IsNotNever()) {
17781 EmitA32(0x0ea00a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17786 Delegate(kVfms, &Assembler::vfms, cond, dt, rd, rn, rm);
17790 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
17792 CheckIT(cond);
17803 if (dt.Is(F32) && cond.IsNotNever()) {
17804 EmitA32(0x0e900a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17809 Delegate(kVfnma, &Assembler::vfnma, cond, dt, rd, rn, rm);
17813 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17815 CheckIT(cond);
17826 if (dt.Is(F64) && cond.IsNotNever()) {
17827 EmitA32(0x0e900b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17832 Delegate(kVfnma, &Assembler::vfnma, cond, dt, rd, rn, rm);
17836 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
17838 CheckIT(cond);
17849 if (dt.Is(F32) && cond.IsNotNever()) {
17850 EmitA32(0x0e900a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17855 Delegate(kVfnms, &Assembler::vfnms, cond, dt, rd, rn, rm);
17859 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17861 CheckIT(cond);
17872 if (dt.Is(F64) && cond.IsNotNever()) {
17873 EmitA32(0x0e900b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
17878 Delegate(kVfnms, &Assembler::vfnms, cond, dt, rd, rn, rm);
17882 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17884 CheckIT(cond);
17889 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17900 if (cond.Is(al)) {
17908 Delegate(kVhadd, &Assembler::vhadd, cond, dt, rd, rn, rm);
17912 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
17914 CheckIT(cond);
17919 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17930 if (cond.Is(al)) {
17938 Delegate(kVhadd, &Assembler::vhadd, cond, dt, rd, rn, rm);
17942 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
17944 CheckIT(cond);
17949 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17960 if (cond.Is(al)) {
17968 Delegate(kVhsub, &Assembler::vhsub, cond, dt, rd, rn, rm);
17972 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
17974 CheckIT(cond);
17979 if (cond.Is(al) || AllowStronglyDiscouraged()) {
17990 if (cond.Is(al)) {
17998 Delegate(kVhsub, &Assembler::vhsub, cond, dt, rd, rn, rm);
18001 void Assembler::vld1(Condition cond,
18006 CheckIT(cond);
18021 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18053 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18085 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18101 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18116 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18129 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18144 if (cond.Is(al)) {
18175 if (cond.Is(al)) {
18206 if (cond.Is(al)) {
18221 if (cond.Is(al)) {
18235 if (cond.Is(al)) {
18247 if (cond.Is(al)) {
18271 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18302 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18317 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18332 if (cond.Is(al)) {
18362 if (cond.Is(al)) {
18376 if (cond.Is(al)) {
18386 Delegate(kVld1, &Assembler::vld1, cond, dt, nreglist, operand);
18389 void Assembler::vld2(Condition cond,
18394 CheckIT(cond);
18410 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18437 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18463 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18480 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18497 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18512 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18529 if (cond.Is(al)) {
18555 if (cond.Is(al)) {
18580 if (cond.Is(al)) {
18596 if (cond.Is(al)) {
18612 if (cond.Is(al)) {
18626 if (cond.Is(al)) {
18651 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18676 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18692 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18709 if (cond.Is(al)) {
18733 if (cond.Is(al)) {
18748 if (cond.Is(al)) {
18758 Delegate(kVld2, &Assembler::vld2, cond, dt, nreglist, operand);
18761 void Assembler::vld3(Condition cond,
18766 CheckIT(cond);
18779 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18796 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18814 if (cond.Is(al)) {
18830 if (cond.Is(al)) {
18854 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18871 if (cond.Is(al)) {
18883 Delegate(kVld3, &Assembler::vld3, cond, dt, nreglist, operand);
18886 void Assembler::vld3(Condition cond,
18891 CheckIT(cond);
18902 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18917 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18932 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18946 if (cond.Is(al) || AllowStronglyDiscouraged()) {
18961 if (cond.Is(al)) {
18975 if (cond.Is(al)) {
18989 if (cond.Is(al)) {
19002 if (cond.Is(al)) {
19025 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19041 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19058 if (cond.Is(al)) {
19073 if (cond.Is(al)) {
19083 Delegate(kVld3, &Assembler::vld3, cond, dt, nreglist, operand);
19086 void Assembler::vld4(Condition cond,
19091 CheckIT(cond);
19107 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19124 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19141 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19158 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19175 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19190 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19206 if (cond.Is(al)) {
19222 if (cond.Is(al)) {
19238 if (cond.Is(al)) {
19254 if (cond.Is(al)) {
19270 if (cond.Is(al)) {
19284 if (cond.Is(al)) {
19309 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19325 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19341 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19357 if (cond.Is(al)) {
19372 if (cond.Is(al)) {
19387 if (cond.Is(al)) {
19397 Delegate(kVld4, &Assembler::vld4, cond, dt, nreglist, operand);
19400 void Assembler::vldm(Condition cond,
19406 CheckIT(cond);
19422 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
19427 EmitA32(0x0c900b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19433 Delegate(kVldm, &Assembler::vldm, cond, dt, rn, write_back, dreglist);
19436 void Assembler::vldm(Condition cond,
19442 CheckIT(cond);
19457 if (cond.IsNotNever() &&
19461 EmitA32(0x0c900a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19467 Delegate(kVldm, &Assembler::vldm, cond, dt, rn, write_back, sreglist);
19470 void Assembler::vldmdb(Condition cond,
19476 CheckIT(cond);
19492 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
19497 EmitA32(0x0d300b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19502 Delegate(kVldmdb, &Assembler::vldmdb, cond, dt, rn, write_back, dreglist);
19505 void Assembler::vldmdb(Condition cond,
19511 CheckIT(cond);
19525 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
19529 EmitA32(0x0d300a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19534 Delegate(kVldmdb, &Assembler::vldmdb, cond, dt, rn, write_back, sreglist);
19537 void Assembler::vldmia(Condition cond,
19543 CheckIT(cond);
19559 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
19564 EmitA32(0x0c900b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19570 Delegate(kVldmia, &Assembler::vldmia, cond, dt, rn, write_back, dreglist);
19573 void Assembler::vldmia(Condition cond,
19579 CheckIT(cond);
19594 if (cond.IsNotNever() &&
19598 EmitA32(0x0c900a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
19604 Delegate(kVldmia, &Assembler::vldmia, cond, dt, rn, write_back, sreglist);
19607 void Assembler::vldr(Condition cond,
19612 CheckIT(cond);
19653 cond.IsNotNever()) {
19671 Link(0x0d1f0b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12),
19678 Delegate(kVldr, &Assembler::vldr, cond, dt, rd, location);
19681 bool Assembler::vldr_info(Condition cond,
19697 if (dt.IsNoneOr(Untyped64) && cond.IsNotNever()) {
19705 void Assembler::vldr(Condition cond,
19710 CheckIT(cond);
19739 cond.IsNotNever()) {
19742 EmitA32(0x0d1f0b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
19748 ((offset % 4) == 0) && operand.IsOffset() && cond.IsNotNever() &&
19752 EmitA32(0x0d100b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
19758 Delegate(kVldr, &Assembler::vldr, cond, dt, rd, operand);
19761 void Assembler::vldr(Condition cond,
19766 CheckIT(cond);
19807 cond.IsNotNever()) {
19825 Link(0x0d1f0a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12),
19832 Delegate(kVldr, &Assembler::vldr, cond, dt, rd, location);
19835 bool Assembler::vldr_info(Condition cond,
19851 if (dt.IsNoneOr(Untyped32) && cond.IsNotNever()) {
19859 void Assembler::vldr(Condition cond,
19864 CheckIT(cond);
19893 cond.IsNotNever()) {
19896 EmitA32(0x0d1f0a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
19902 ((offset % 4) == 0) && operand.IsOffset() && cond.IsNotNever() &&
19906 EmitA32(0x0d100a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
19912 Delegate(kVldr, &Assembler::vldr, cond, dt, rd, operand);
19916 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
19918 CheckIT(cond);
19923 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19932 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19943 if (cond.Is(al)) {
19951 if (cond.Is(al)) {
19959 Delegate(kVmax, &Assembler::vmax, cond, dt, rd, rn, rm);
19963 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
19965 CheckIT(cond);
19970 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19979 if (cond.Is(al) || AllowStronglyDiscouraged()) {
19990 if (cond.Is(al)) {
19998 if (cond.Is(al)) {
20006 Delegate(kVmax, &Assembler::vmax, cond, dt, rd, rn, rm);
20089 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
20091 CheckIT(cond);
20096 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20105 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20116 if (cond.Is(al)) {
20124 if (cond.Is(al)) {
20132 Delegate(kVmin, &Assembler::vmin, cond, dt, rd, rn, rm);
20136 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
20138 CheckIT(cond);
20143 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20152 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20163 if (cond.Is(al)) {
20171 if (cond.Is(al)) {
20179 Delegate(kVmin, &Assembler::vmin, cond, dt, rd, rn, rm);
20262 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
20264 CheckIT(cond);
20272 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20286 if (cond.Is(al)) {
20294 Delegate(kVmla, &Assembler::vmla, cond, dt, rd, rn, rm);
20298 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
20300 CheckIT(cond);
20308 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20322 if (cond.Is(al)) {
20330 Delegate(kVmla, &Assembler::vmla, cond, dt, rd, rn, rm);
20334 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
20336 CheckIT(cond);
20341 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20357 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20367 if (cond.Is(al)) {
20374 if (dt.Is(F64) && cond.IsNotNever()) {
20375 EmitA32(0x0e000b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
20381 if (cond.Is(al)) {
20388 Delegate(kVmla, &Assembler::vmla, cond, dt, rd, rn, rm);
20392 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
20394 CheckIT(cond);
20399 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20408 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20418 if (cond.Is(al)) {
20426 if (cond.Is(al)) {
20433 Delegate(kVmla, &Assembler::vmla, cond, dt, rd, rn, rm);
20437 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
20439 CheckIT(cond);
20450 if (dt.Is(F32) && cond.IsNotNever()) {
20451 EmitA32(0x0e000a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
20456 Delegate(kVmla, &Assembler::vmla, cond, dt, rd, rn, rm);
20460 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
20462 CheckIT(cond);
20470 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20484 if (cond.Is(al)) {
20492 Delegate(kVmlal, &Assembler::vmlal, cond, dt, rd, rn, rm);
20496 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
20498 CheckIT(cond);
20503 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20514 if (cond.Is(al)) {
20522 Delegate(kVmlal, &Assembler::vmlal, cond, dt, rd, rn, rm);
20526 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
20528 CheckIT(cond);
20536 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20550 if (cond.Is(al)) {
20558 Delegate(kVmls, &Assembler::vmls, cond, dt, rd, rn, rm);
20562 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
20564 CheckIT(cond);
20572 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20586 if (cond.Is(al)) {
20594 Delegate(kVmls, &Assembler::vmls, cond, dt, rd, rn, rm);
20598 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
20600 CheckIT(cond);
20605 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20621 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20631 if (cond.Is(al)) {
20638 if (dt.Is(F64) && cond.IsNotNever()) {
20639 EmitA32(0x0e000b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
20645 if (cond.Is(al)) {
20652 Delegate(kVmls, &Assembler::vmls, cond, dt, rd, rn, rm);
20656 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
20658 CheckIT(cond);
20663 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20672 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20682 if (cond.Is(al)) {
20690 if (cond.Is(al)) {
20697 Delegate(kVmls, &Assembler::vmls, cond, dt, rd, rn, rm);
20701 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
20703 CheckIT(cond);
20714 if (dt.Is(F32) && cond.IsNotNever()) {
20715 EmitA32(0x0e000a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
20720 Delegate(kVmls, &Assembler::vmls, cond, dt, rd, rn, rm);
20724 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
20726 CheckIT(cond);
20734 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20748 if (cond.Is(al)) {
20756 Delegate(kVmlsl, &Assembler::vmlsl, cond, dt, rd, rn, rm);
20760 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
20762 CheckIT(cond);
20767 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20778 if (cond.Is(al)) {
20786 Delegate(kVmlsl, &Assembler::vmlsl, cond, dt, rd, rn, rm);
20789 void Assembler::vmov(Condition cond, Register rt, SRegister rn) {
20791 CheckIT(cond);
20801 if (cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
20802 EmitA32(0x0e100a10U | (cond.GetCondition() << 28) | (rt.GetCode() << 12) |
20807 Delegate(kVmov, &Assembler::vmov, cond, rt, rn);
20810 void Assembler::vmov(Condition cond, SRegister rn, Register rt) {
20812 CheckIT(cond);
20822 if (cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
20823 EmitA32(0x0e000a10U | (cond.GetCondition() << 28) | rn.Encode(7, 16) |
20828 Delegate(kVmov, &Assembler::vmov, cond, rn, rt);
20831 void Assembler::vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
20833 CheckIT(cond);
20844 if (cond.IsNotNever() &&
20846 EmitA32(0x0c500b10U | (cond.GetCondition() << 28) | (rt.GetCode() << 12) |
20851 Delegate(kVmov, &Assembler::vmov, cond, rt, rt2, rm);
20854 void Assembler::vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
20856 CheckIT(cond);
20867 if (cond.IsNotNever() &&
20869 EmitA32(0x0c400b10U | (cond.GetCondition() << 28) | rm.Encode(5, 0) |
20874 Delegate(kVmov, &Assembler::vmov, cond, rm, rt, rt2);
20878 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
20880 CheckIT(cond);
20893 cond.IsNotNever() &&
20895 EmitA32(0x0c500a10U | (cond.GetCondition() << 28) | (rt.GetCode() << 12) |
20900 Delegate(kVmov, &Assembler::vmov, cond, rt, rt2, rm, rm1);
20904 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
20906 CheckIT(cond);
20919 cond.IsNotNever() &&
20921 EmitA32(0x0c400a10U | (cond.GetCondition() << 28) | rm.Encode(5, 0) |
20926 Delegate(kVmov, &Assembler::vmov, cond, rm, rm1, rt, rt2);
20929 void Assembler::vmov(Condition cond,
20934 CheckIT(cond);
20947 if (encoded_dt.IsValid() && cond.IsNotNever() &&
20949 EmitA32(0x0e000b10U | (cond.GetCondition() << 28) |
20956 Delegate(kVmov, &Assembler::vmov, cond, dt, rd, rt);
20959 void Assembler::vmov(Condition cond,
20964 CheckIT(cond);
20970 if (cond.Is(al) || AllowStronglyDiscouraged()) {
20984 if (cond.Is(al)) {
21008 if (dt.Is(F64) && vfp.IsValid() && cond.IsNotNever()) {
21009 EmitA32(0x0eb00b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21027 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21036 if (dt.Is(F64) && cond.IsNotNever()) {
21037 EmitA32(0x0eb00b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21043 if (cond.Is(al)) {
21051 Delegate(kVmov, &Assembler::vmov, cond, dt, rd, operand);
21054 void Assembler::vmov(Condition cond,
21059 CheckIT(cond);
21065 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21079 if (cond.Is(al)) {
21095 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21105 if (cond.Is(al)) {
21113 Delegate(kVmov, &Assembler::vmov, cond, dt, rd, operand);
21116 void Assembler::vmov(Condition cond,
21121 CheckIT(cond);
21135 if (dt.Is(F32) && vfp.IsValid() && cond.IsNotNever()) {
21136 EmitA32(0x0eb00a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21154 if (dt.Is(F32) && cond.IsNotNever()) {
21155 EmitA32(0x0eb00a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21161 Delegate(kVmov, &Assembler::vmov, cond, dt, rd, operand);
21164 void Assembler::vmov(Condition cond,
21169 CheckIT(cond);
21183 if (encoded_dt.IsValid() && cond.IsNotNever() &&
21185 EmitA32(0x0e100b10U | (cond.GetCondition() << 28) |
21193 Delegate(kVmov, &Assembler::vmov, cond, dt, rt, rn);
21196 void Assembler::vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
21198 CheckIT(cond);
21203 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21214 if (cond.Is(al)) {
21222 Delegate(kVmovl, &Assembler::vmovl, cond, dt, rd, rm);
21225 void Assembler::vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
21227 CheckIT(cond);
21232 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21242 if (cond.Is(al)) {
21249 Delegate(kVmovn, &Assembler::vmovn, cond, dt, rd, rm);
21252 void Assembler::vmrs(Condition cond,
21256 CheckIT(cond);
21264 if (cond.IsNotNever()) {
21265 EmitA32(0x0ef00a10U | (cond.GetCondition() << 28) | (rt.GetCode() << 12) |
21270 Delegate(kVmrs, &Assembler::vmrs, cond, rt, spec_reg);
21273 void Assembler::vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
21275 CheckIT(cond);
21286 if (cond.IsNotNever() && (!rt.IsPC() || AllowUnpredictable())) {
21287 EmitA32(0x0ee00a10U | (cond.GetCondition() << 28) |
21292 Delegate(kVmsr, &Assembler::vmsr, cond, spec_reg, rt);
21295 void Assembler::vmul(Condition cond,
21302 CheckIT(cond);
21309 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21328 if (cond.Is(al)) {
21342 Delegate(kVmul, &Assembler::vmul, cond, dt, rd, rn, dm, index);
21345 void Assembler::vmul(Condition cond,
21352 CheckIT(cond);
21359 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21378 if (cond.Is(al)) {
21392 Delegate(kVmul, &Assembler::vmul, cond, dt, rd, rn, dm, index);
21396 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
21398 CheckIT(cond);
21403 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21419 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21430 if (cond.Is(al)) {
21437 if (dt.Is(F64) && cond.IsNotNever()) {
21438 EmitA32(0x0e200b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21444 if (cond.Is(al)) {
21452 Delegate(kVmul, &Assembler::vmul, cond, dt, rd, rn, rm);
21456 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
21458 CheckIT(cond);
21463 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21472 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21483 if (cond.Is(al)) {
21491 if (cond.Is(al)) {
21499 Delegate(kVmul, &Assembler::vmul, cond, dt, rd, rn, rm);
21503 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
21505 CheckIT(cond);
21516 if (dt.Is(F32) && cond.IsNotNever()) {
21517 EmitA32(0x0e200a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21522 Delegate(kVmul, &Assembler::vmul, cond, dt, rd, rn, rm);
21525 void Assembler::vmull(Condition cond,
21532 CheckIT(cond);
21540 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21560 if (cond.Is(al)) {
21574 Delegate(kVmull, &Assembler::vmull, cond, dt, rd, rn, dm, index);
21578 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
21580 CheckIT(cond);
21585 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21597 if (cond.Is(al)) {
21606 Delegate(kVmull, &Assembler::vmull, cond, dt, rd, rn, rm);
21609 void Assembler::vmvn(Condition cond,
21614 CheckIT(cond);
21620 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21633 if (cond.Is(al)) {
21648 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21655 if (cond.Is(al)) {
21661 Delegate(kVmvn, &Assembler::vmvn, cond, dt, rd, operand);
21664 void Assembler::vmvn(Condition cond,
21669 CheckIT(cond);
21675 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21688 if (cond.Is(al)) {
21703 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21710 if (cond.Is(al)) {
21716 Delegate(kVmvn, &Assembler::vmvn, cond, dt, rd, operand);
21719 void Assembler::vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
21721 CheckIT(cond);
21726 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21743 if (cond.Is(al)) {
21751 if (dt.Is(F64) && cond.IsNotNever()) {
21752 EmitA32(0x0eb10b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21757 Delegate(kVneg, &Assembler::vneg, cond, dt, rd, rm);
21760 void Assembler::vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
21762 CheckIT(cond);
21767 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21778 if (cond.Is(al)) {
21786 Delegate(kVneg, &Assembler::vneg, cond, dt, rd, rm);
21789 void Assembler::vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
21791 CheckIT(cond);
21801 if (dt.Is(F32) && cond.IsNotNever()) {
21802 EmitA32(0x0eb10a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21807 Delegate(kVneg, &Assembler::vneg, cond, dt, rd, rm);
21811 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
21813 CheckIT(cond);
21824 if (dt.Is(F32) && cond.IsNotNever()) {
21825 EmitA32(0x0e100a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21830 Delegate(kVnmla, &Assembler::vnmla, cond, dt, rd, rn, rm);
21834 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
21836 CheckIT(cond);
21847 if (dt.Is(F64) && cond.IsNotNever()) {
21848 EmitA32(0x0e100b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21853 Delegate(kVnmla, &Assembler::vnmla, cond, dt, rd, rn, rm);
21857 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
21859 CheckIT(cond);
21870 if (dt.Is(F32) && cond.IsNotNever()) {
21871 EmitA32(0x0e100a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21876 Delegate(kVnmls, &Assembler::vnmls, cond, dt, rd, rn, rm);
21880 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
21882 CheckIT(cond);
21893 if (dt.Is(F64) && cond.IsNotNever()) {
21894 EmitA32(0x0e100b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21899 Delegate(kVnmls, &Assembler::vnmls, cond, dt, rd, rn, rm);
21903 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
21905 CheckIT(cond);
21916 if (dt.Is(F32) && cond.IsNotNever()) {
21917 EmitA32(0x0e200a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21922 Delegate(kVnmul, &Assembler::vnmul, cond, dt, rd, rn, rm);
21926 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
21928 CheckIT(cond);
21939 if (dt.Is(F64) && cond.IsNotNever()) {
21940 EmitA32(0x0e200b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
21945 Delegate(kVnmul, &Assembler::vnmul, cond, dt, rd, rn, rm);
21948 void Assembler::vorn(Condition cond,
21954 CheckIT(cond);
21960 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21973 if (cond.Is(al)) {
21988 if (cond.Is(al) || AllowStronglyDiscouraged()) {
21996 if (cond.Is(al)) {
22003 Delegate(kVorn, &Assembler::vorn, cond, dt, rd, rn, operand);
22006 void Assembler::vorn(Condition cond,
22012 CheckIT(cond);
22018 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22031 if (cond.Is(al)) {
22046 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22054 if (cond.Is(al)) {
22061 Delegate(kVorn, &Assembler::vorn, cond, dt, rd, rn, operand);
22064 void Assembler::vorr(Condition cond,
22070 CheckIT(cond);
22076 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22084 if (cond.Is(al)) {
22096 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22109 if (cond.Is(al)) {
22119 Delegate(kVorr, &Assembler::vorr, cond, dt, rd, rn, operand);
22122 void Assembler::vorr(Condition cond,
22128 CheckIT(cond);
22134 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22142 if (cond.Is(al)) {
22154 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22167 if (cond.Is(al)) {
22177 Delegate(kVorr, &Assembler::vorr, cond, dt, rd, rn, operand);
22180 void Assembler::vpadal(Condition cond,
22185 CheckIT(cond);
22190 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22201 if (cond.Is(al)) {
22209 Delegate(kVpadal, &Assembler::vpadal, cond, dt, rd, rm);
22212 void Assembler::vpadal(Condition cond,
22217 CheckIT(cond);
22222 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22233 if (cond.Is(al)) {
22241 Delegate(kVpadal, &Assembler::vpadal, cond, dt, rd, rm);
22245 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
22247 CheckIT(cond);
22252 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22261 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22271 if (cond.Is(al)) {
22279 if (cond.Is(al)) {
22286 Delegate(kVpadd, &Assembler::vpadd, cond, dt, rd, rn, rm);
22289 void Assembler::vpaddl(Condition cond,
22294 CheckIT(cond);
22299 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22310 if (cond.Is(al)) {
22318 Delegate(kVpaddl, &Assembler::vpaddl, cond, dt, rd, rm);
22321 void Assembler::vpaddl(Condition cond,
22326 CheckIT(cond);
22331 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22342 if (cond.Is(al)) {
22350 Delegate(kVpaddl, &Assembler::vpaddl, cond, dt, rd, rm);
22354 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
22356 CheckIT(cond);
22361 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22370 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22381 if (cond.Is(al)) {
22389 if (cond.Is(al)) {
22397 Delegate(kVpmax, &Assembler::vpmax, cond, dt, rd, rn, rm);
22401 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
22403 CheckIT(cond);
22408 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22417 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22428 if (cond.Is(al)) {
22436 if (cond.Is(al)) {
22444 Delegate(kVpmin, &Assembler::vpmin, cond, dt, rd, rn, rm);
22447 void Assembler::vpop(Condition cond, DataType dt, DRegisterList dreglist) {
22449 CheckIT(cond);
22462 if (cond.IsNotNever() &&
22466 EmitA32(0x0cbd0b00U | (cond.GetCondition() << 28) | dreg.Encode(22, 12) |
22471 Delegate(kVpop, &Assembler::vpop, cond, dt, dreglist);
22474 void Assembler::vpop(Condition cond, DataType dt, SRegisterList sreglist) {
22476 CheckIT(cond);
22487 if (cond.IsNotNever()) {
22490 EmitA32(0x0cbd0a00U | (cond.GetCondition() << 28) | sreg.Encode(22, 12) |
22495 Delegate(kVpop, &Assembler::vpop, cond, dt, sreglist);
22498 void Assembler::vpush(Condition cond, DataType dt, DRegisterList dreglist) {
22500 CheckIT(cond);
22513 if (cond.IsNotNever() &&
22517 EmitA32(0x0d2d0b00U | (cond.GetCondition() << 28) | dreg.Encode(22, 12) |
22522 Delegate(kVpush, &Assembler::vpush, cond, dt, dreglist);
22525 void Assembler::vpush(Condition cond, DataType dt, SRegisterList sreglist) {
22527 CheckIT(cond);
22538 if (cond.IsNotNever()) {
22541 EmitA32(0x0d2d0a00U | (cond.GetCondition() << 28) | sreg.Encode(22, 12) |
22546 Delegate(kVpush, &Assembler::vpush, cond, dt, sreglist);
22549 void Assembler::vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
22551 CheckIT(cond);
22556 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22566 if (cond.Is(al)) {
22573 Delegate(kVqabs, &Assembler::vqabs, cond, dt, rd, rm);
22576 void Assembler::vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
22578 CheckIT(cond);
22583 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22593 if (cond.Is(al)) {
22600 Delegate(kVqabs, &Assembler::vqabs, cond, dt, rd, rm);
22604 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
22606 CheckIT(cond);
22611 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22622 if (cond.Is(al)) {
22630 Delegate(kVqadd, &Assembler::vqadd, cond, dt, rd, rn, rm);
22634 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
22636 CheckIT(cond);
22641 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22652 if (cond.Is(al)) {
22660 Delegate(kVqadd, &Assembler::vqadd, cond, dt, rd, rn, rm);
22664 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
22666 CheckIT(cond);
22671 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22681 if (cond.Is(al)) {
22688 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, rm);
22691 void Assembler::vqdmlal(Condition cond,
22698 CheckIT(cond);
22706 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22725 if (cond.Is(al)) {
22738 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, dm, index);
22742 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
22744 CheckIT(cond);
22749 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22759 if (cond.Is(al)) {
22766 Delegate(kVqdmlsl, &Assembler::vqdmlsl, cond, dt, rd, rn, rm);
22769 void Assembler::vqdmlsl(Condition cond,
22776 CheckIT(cond);
22784 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22803 if (cond.Is(al)) {
22816 Delegate(kVqdmlsl, &Assembler::vqdmlsl, cond, dt, rd, rn, dm, index);
22820 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
22822 CheckIT(cond);
22827 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22837 if (cond.Is(al)) {
22844 Delegate(kVqdmulh, &Assembler::vqdmulh, cond, dt, rd, rn, rm);
22848 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
22850 CheckIT(cond);
22855 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22865 if (cond.Is(al)) {
22872 Delegate(kVqdmulh, &Assembler::vqdmulh, cond, dt, rd, rn, rm);
22876 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
22878 CheckIT(cond);
22887 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22901 if (cond.Is(al)) {
22908 Delegate(kVqdmulh, &Assembler::vqdmulh, cond, dt, rd, rn, rm);
22912 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
22914 CheckIT(cond);
22923 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22937 if (cond.Is(al)) {
22944 Delegate(kVqdmulh, &Assembler::vqdmulh, cond, dt, rd, rn, rm);
22948 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
22950 CheckIT(cond);
22955 if (cond.Is(al) || AllowStronglyDiscouraged()) {
22965 if (cond.Is(al)) {
22972 Delegate(kVqdmull, &Assembler::vqdmull, cond, dt, rd, rn, rm);
22976 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
22978 CheckIT(cond);
22987 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23001 if (cond.Is(al)) {
23008 Delegate(kVqdmull, &Assembler::vqdmull, cond, dt, rd, rn, rm);
23011 void Assembler::vqmovn(Condition cond,
23016 CheckIT(cond);
23021 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23032 if (cond.Is(al)) {
23040 Delegate(kVqmovn, &Assembler::vqmovn, cond, dt, rd, rm);
23043 void Assembler::vqmovun(Condition cond,
23048 CheckIT(cond);
23053 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23063 if (cond.Is(al)) {
23070 Delegate(kVqmovun, &Assembler::vqmovun, cond, dt, rd, rm);
23073 void Assembler::vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
23075 CheckIT(cond);
23080 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23090 if (cond.Is(al)) {
23097 Delegate(kVqneg, &Assembler::vqneg, cond, dt, rd, rm);
23100 void Assembler::vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
23102 CheckIT(cond);
23107 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23117 if (cond.Is(al)) {
23124 Delegate(kVqneg, &Assembler::vqneg, cond, dt, rd, rm);
23128 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
23130 CheckIT(cond);
23135 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23145 if (cond.Is(al)) {
23152 Delegate(kVqrdmulh, &Assembler::vqrdmulh, cond, dt, rd, rn, rm);
23156 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
23158 CheckIT(cond);
23163 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23173 if (cond.Is(al)) {
23180 Delegate(kVqrdmulh, &Assembler::vqrdmulh, cond, dt, rd, rn, rm);
23184 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
23186 CheckIT(cond);
23195 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23209 if (cond.Is(al)) {
23216 Delegate(kVqrdmulh, &Assembler::vqrdmulh, cond, dt, rd, rn, rm);
23220 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
23222 CheckIT(cond);
23231 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23245 if (cond.Is(al)) {
23252 Delegate(kVqrdmulh, &Assembler::vqrdmulh, cond, dt, rd, rn, rm);
23256 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
23258 CheckIT(cond);
23263 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23274 if (cond.Is(al)) {
23282 Delegate(kVqrshl, &Assembler::vqrshl, cond, dt, rd, rm, rn);
23286 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
23288 CheckIT(cond);
23293 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23304 if (cond.Is(al)) {
23312 Delegate(kVqrshl, &Assembler::vqrshl, cond, dt, rd, rm, rn);
23315 void Assembler::vqrshrn(Condition cond,
23321 CheckIT(cond);
23330 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23341 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23354 if (cond.Is(al)) {
23364 if (cond.Is(al)) {
23375 Delegate(kVqrshrn, &Assembler::vqrshrn, cond, dt, rd, rm, operand);
23378 void Assembler::vqrshrun(Condition cond,
23384 CheckIT(cond);
23393 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23404 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23414 if (cond.Is(al)) {
23424 if (cond.Is(al)) {
23433 Delegate(kVqrshrun, &Assembler::vqrshrun, cond, dt, rd, rm, operand);
23436 void Assembler::vqshl(Condition cond,
23442 CheckIT(cond);
23449 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23461 if (cond.Is(al)) {
23477 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23490 if (cond.Is(al)) {
23502 Delegate(kVqshl, &Assembler::vqshl, cond, dt, rd, rm, operand);
23505 void Assembler::vqshl(Condition cond,
23511 CheckIT(cond);
23518 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23530 if (cond.Is(al)) {
23546 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23559 if (cond.Is(al)) {
23571 Delegate(kVqshl, &Assembler::vqshl, cond, dt, rd, rm, operand);
23574 void Assembler::vqshlu(Condition cond,
23580 CheckIT(cond);
23588 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23601 if (cond.Is(al)) {
23613 Delegate(kVqshlu, &Assembler::vqshlu, cond, dt, rd, rm, operand);
23616 void Assembler::vqshlu(Condition cond,
23622 CheckIT(cond);
23630 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23643 if (cond.Is(al)) {
23655 Delegate(kVqshlu, &Assembler::vqshlu, cond, dt, rd, rm, operand);
23658 void Assembler::vqshrn(Condition cond,
23664 CheckIT(cond);
23673 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23684 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23697 if (cond.Is(al)) {
23707 if (cond.Is(al)) {
23718 Delegate(kVqshrn, &Assembler::vqshrn, cond, dt, rd, rm, operand);
23721 void Assembler::vqshrun(Condition cond,
23727 CheckIT(cond);
23736 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23747 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23757 if (cond.Is(al)) {
23767 if (cond.Is(al)) {
23776 Delegate(kVqshrun, &Assembler::vqshrun, cond, dt, rd, rm, operand);
23780 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
23782 CheckIT(cond);
23787 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23798 if (cond.Is(al)) {
23806 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm);
23810 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
23812 CheckIT(cond);
23817 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23828 if (cond.Is(al)) {
23836 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm);
23840 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
23842 CheckIT(cond);
23847 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23857 if (cond.Is(al)) {
23864 Delegate(kVraddhn, &Assembler::vraddhn, cond, dt, rd, rn, rm);
23867 void Assembler::vrecpe(Condition cond,
23872 CheckIT(cond);
23877 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23888 if (cond.Is(al)) {
23896 Delegate(kVrecpe, &Assembler::vrecpe, cond, dt, rd, rm);
23899 void Assembler::vrecpe(Condition cond,
23904 CheckIT(cond);
23909 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23920 if (cond.Is(al)) {
23928 Delegate(kVrecpe, &Assembler::vrecpe, cond, dt, rd, rm);
23932 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
23934 CheckIT(cond);
23938 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23948 if (cond.Is(al)) {
23955 Delegate(kVrecps, &Assembler::vrecps, cond, dt, rd, rn, rm);
23959 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
23961 CheckIT(cond);
23965 if (cond.Is(al) || AllowStronglyDiscouraged()) {
23975 if (cond.Is(al)) {
23982 Delegate(kVrecps, &Assembler::vrecps, cond, dt, rd, rn, rm);
23985 void Assembler::vrev16(Condition cond,
23990 CheckIT(cond);
23995 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24005 if (cond.Is(al)) {
24012 Delegate(kVrev16, &Assembler::vrev16, cond, dt, rd, rm);
24015 void Assembler::vrev16(Condition cond,
24020 CheckIT(cond);
24025 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24035 if (cond.Is(al)) {
24042 Delegate(kVrev16, &Assembler::vrev16, cond, dt, rd, rm);
24045 void Assembler::vrev32(Condition cond,
24050 CheckIT(cond);
24055 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24065 if (cond.Is(al)) {
24072 Delegate(kVrev32, &Assembler::vrev32, cond, dt, rd, rm);
24075 void Assembler::vrev32(Condition cond,
24080 CheckIT(cond);
24085 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24095 if (cond.Is(al)) {
24102 Delegate(kVrev32, &Assembler::vrev32, cond, dt, rd, rm);
24105 void Assembler::vrev64(Condition cond,
24110 CheckIT(cond);
24115 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24125 if (cond.Is(al)) {
24132 Delegate(kVrev64, &Assembler::vrev64, cond, dt, rd, rm);
24135 void Assembler::vrev64(Condition cond,
24140 CheckIT(cond);
24145 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24155 if (cond.Is(al)) {
24162 Delegate(kVrev64, &Assembler::vrev64, cond, dt, rd, rm);
24166 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
24168 CheckIT(cond);
24173 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24184 if (cond.Is(al)) {
24192 Delegate(kVrhadd, &Assembler::vrhadd, cond, dt, rd, rn, rm);
24196 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
24198 CheckIT(cond);
24203 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24214 if (cond.Is(al)) {
24222 Delegate(kVrhadd, &Assembler::vrhadd, cond, dt, rd, rn, rm);
24533 void Assembler::vrintr(Condition cond,
24538 CheckIT(cond);
24548 if (dt.Is(F32) && cond.IsNotNever()) {
24549 EmitA32(0x0eb60a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24554 Delegate(kVrintr, &Assembler::vrintr, cond, dt, rd, rm);
24557 void Assembler::vrintr(Condition cond,
24562 CheckIT(cond);
24572 if (dt.Is(F64) && cond.IsNotNever()) {
24573 EmitA32(0x0eb60b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24578 Delegate(kVrintr, &Assembler::vrintr, cond, dt, rd, rm);
24581 void Assembler::vrintx(Condition cond,
24586 CheckIT(cond);
24610 if (dt.Is(F64) && cond.IsNotNever()) {
24611 EmitA32(0x0eb70b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24616 Delegate(kVrintx, &Assembler::vrintx, cond, dt, rd, rm);
24642 void Assembler::vrintx(Condition cond,
24647 CheckIT(cond);
24657 if (dt.Is(F32) && cond.IsNotNever()) {
24658 EmitA32(0x0eb70a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24663 Delegate(kVrintx, &Assembler::vrintx, cond, dt, rd, rm);
24666 void Assembler::vrintz(Condition cond,
24671 CheckIT(cond);
24695 if (dt.Is(F64) && cond.IsNotNever()) {
24696 EmitA32(0x0eb60bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24701 Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm);
24727 void Assembler::vrintz(Condition cond,
24732 CheckIT(cond);
24742 if (dt.Is(F32) && cond.IsNotNever()) {
24743 EmitA32(0x0eb60ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
24748 Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm);
24752 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
24754 CheckIT(cond);
24759 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24770 if (cond.Is(al)) {
24778 Delegate(kVrshl, &Assembler::vrshl, cond, dt, rd, rm, rn);
24782 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
24784 CheckIT(cond);
24789 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24800 if (cond.Is(al)) {
24808 Delegate(kVrshl, &Assembler::vrshl, cond, dt, rd, rm, rn);
24811 void Assembler::vrshr(Condition cond,
24817 CheckIT(cond);
24825 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24837 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24847 if (cond.Is(al)) {
24858 if (cond.Is(al)) {
24867 Delegate(kVrshr, &Assembler::vrshr, cond, dt, rd, rm, operand);
24870 void Assembler::vrshr(Condition cond,
24876 CheckIT(cond);
24884 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24896 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24906 if (cond.Is(al)) {
24917 if (cond.Is(al)) {
24926 Delegate(kVrshr, &Assembler::vrshr, cond, dt, rd, rm, operand);
24929 void Assembler::vrshrn(Condition cond,
24935 CheckIT(cond);
24944 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24955 if (cond.Is(al) || AllowStronglyDiscouraged()) {
24965 if (cond.Is(al)) {
24975 if (cond.Is(al)) {
24984 Delegate(kVrshrn, &Assembler::vrshrn, cond, dt, rd, rm, operand);
24987 void Assembler::vrsqrte(Condition cond,
24992 CheckIT(cond);
24997 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25008 if (cond.Is(al)) {
25016 Delegate(kVrsqrte, &Assembler::vrsqrte, cond, dt, rd, rm);
25019 void Assembler::vrsqrte(Condition cond,
25024 CheckIT(cond);
25029 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25040 if (cond.Is(al)) {
25048 Delegate(kVrsqrte, &Assembler::vrsqrte, cond, dt, rd, rm);
25052 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
25054 CheckIT(cond);
25058 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25068 if (cond.Is(al)) {
25075 Delegate(kVrsqrts, &Assembler::vrsqrts, cond, dt, rd, rn, rm);
25079 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
25081 CheckIT(cond);
25085 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25095 if (cond.Is(al)) {
25102 Delegate(kVrsqrts, &Assembler::vrsqrts, cond, dt, rd, rn, rm);
25105 void Assembler::vrsra(Condition cond,
25111 CheckIT(cond);
25119 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25132 if (cond.Is(al)) {
25144 Delegate(kVrsra, &Assembler::vrsra, cond, dt, rd, rm, operand);
25147 void Assembler::vrsra(Condition cond,
25153 CheckIT(cond);
25161 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25174 if (cond.Is(al)) {
25186 Delegate(kVrsra, &Assembler::vrsra, cond, dt, rd, rm, operand);
25190 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
25192 CheckIT(cond);
25197 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25207 if (cond.Is(al)) {
25214 Delegate(kVrsubhn, &Assembler::vrsubhn, cond, dt, rd, rn, rm);
25393 void Assembler::vshl(Condition cond,
25399 CheckIT(cond);
25407 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25420 if (cond.Is(al)) {
25438 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25450 if (cond.Is(al)) {
25459 Delegate(kVshl, &Assembler::vshl, cond, dt, rd, rm, operand);
25462 void Assembler::vshl(Condition cond,
25468 CheckIT(cond);
25476 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25489 if (cond.Is(al)) {
25507 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25519 if (cond.Is(al)) {
25528 Delegate(kVshl, &Assembler::vshl, cond, dt, rd, rm, operand);
25531 void Assembler::vshll(Condition cond,
25537 CheckIT(cond);
25546 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25557 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25567 if (cond.Is(al)) {
25577 if (cond.Is(al)) {
25586 Delegate(kVshll, &Assembler::vshll, cond, dt, rd, rm, operand);
25589 void Assembler::vshr(Condition cond,
25595 CheckIT(cond);
25603 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25615 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25625 if (cond.Is(al)) {
25636 if (cond.Is(al)) {
25645 Delegate(kVshr, &Assembler::vshr, cond, dt, rd, rm, operand);
25648 void Assembler::vshr(Condition cond,
25654 CheckIT(cond);
25662 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25674 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25684 if (cond.Is(al)) {
25695 if (cond.Is(al)) {
25704 Delegate(kVshr, &Assembler::vshr, cond, dt, rd, rm, operand);
25707 void Assembler::vshrn(Condition cond,
25713 CheckIT(cond);
25722 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25733 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25743 if (cond.Is(al)) {
25753 if (cond.Is(al)) {
25762 Delegate(kVshrn, &Assembler::vshrn, cond, dt, rd, rm, operand);
25765 void Assembler::vsli(Condition cond,
25771 CheckIT(cond);
25779 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25792 if (cond.Is(al)) {
25804 Delegate(kVsli, &Assembler::vsli, cond, dt, rd, rm, operand);
25807 void Assembler::vsli(Condition cond,
25813 CheckIT(cond);
25821 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25834 if (cond.Is(al)) {
25846 Delegate(kVsli, &Assembler::vsli, cond, dt, rd, rm, operand);
25849 void Assembler::vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
25851 CheckIT(cond);
25861 if (dt.Is(F32) && cond.IsNotNever()) {
25862 EmitA32(0x0eb10ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
25867 Delegate(kVsqrt, &Assembler::vsqrt, cond, dt, rd, rm);
25870 void Assembler::vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
25872 CheckIT(cond);
25882 if (dt.Is(F64) && cond.IsNotNever()) {
25883 EmitA32(0x0eb10bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
25888 Delegate(kVsqrt, &Assembler::vsqrt, cond, dt, rd, rm);
25891 void Assembler::vsra(Condition cond,
25897 CheckIT(cond);
25905 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25918 if (cond.Is(al)) {
25930 Delegate(kVsra, &Assembler::vsra, cond, dt, rd, rm, operand);
25933 void Assembler::vsra(Condition cond,
25939 CheckIT(cond);
25947 if (cond.Is(al) || AllowStronglyDiscouraged()) {
25960 if (cond.Is(al)) {
25972 Delegate(kVsra, &Assembler::vsra, cond, dt, rd, rm, operand);
25975 void Assembler::vsri(Condition cond,
25981 CheckIT(cond);
25989 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26002 if (cond.Is(al)) {
26014 Delegate(kVsri, &Assembler::vsri, cond, dt, rd, rm, operand);
26017 void Assembler::vsri(Condition cond,
26023 CheckIT(cond);
26031 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26044 if (cond.Is(al)) {
26056 Delegate(kVsri, &Assembler::vsri, cond, dt, rd, rm, operand);
26059 void Assembler::vst1(Condition cond,
26064 CheckIT(cond);
26078 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26110 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26141 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26154 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26169 if (cond.Is(al)) {
26200 if (cond.Is(al)) {
26230 if (cond.Is(al)) {
26242 if (cond.Is(al)) {
26265 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26296 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26311 if (cond.Is(al)) {
26341 if (cond.Is(al)) {
26351 Delegate(kVst1, &Assembler::vst1, cond, dt, nreglist, operand);
26354 void Assembler::vst2(Condition cond,
26359 CheckIT(cond);
26374 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26401 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26427 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26442 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26459 if (cond.Is(al)) {
26485 if (cond.Is(al)) {
26510 if (cond.Is(al)) {
26524 if (cond.Is(al)) {
26548 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26573 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26590 if (cond.Is(al)) {
26614 if (cond.Is(al)) {
26624 Delegate(kVst2, &Assembler::vst2, cond, dt, nreglist, operand);
26627 void Assembler::vst3(Condition cond,
26632 CheckIT(cond);
26645 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26662 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26680 if (cond.Is(al)) {
26696 if (cond.Is(al)) {
26720 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26737 if (cond.Is(al)) {
26749 Delegate(kVst3, &Assembler::vst3, cond, dt, nreglist, operand);
26752 void Assembler::vst3(Condition cond,
26757 CheckIT(cond);
26768 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26782 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26797 if (cond.Is(al)) {
26810 if (cond.Is(al)) {
26833 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26850 if (cond.Is(al)) {
26860 Delegate(kVst3, &Assembler::vst3, cond, dt, nreglist, operand);
26863 void Assembler::vst4(Condition cond,
26868 CheckIT(cond);
26882 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26899 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26916 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26931 if (cond.Is(al) || AllowStronglyDiscouraged()) {
26947 if (cond.Is(al)) {
26963 if (cond.Is(al)) {
26979 if (cond.Is(al)) {
26993 if (cond.Is(al)) {
27016 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27032 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27048 if (cond.Is(al)) {
27063 if (cond.Is(al)) {
27073 Delegate(kVst4, &Assembler::vst4, cond, dt, nreglist, operand);
27076 void Assembler::vstm(Condition cond,
27082 CheckIT(cond);
27098 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
27103 EmitA32(0x0c800b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27109 Delegate(kVstm, &Assembler::vstm, cond, dt, rn, write_back, dreglist);
27112 void Assembler::vstm(Condition cond,
27118 CheckIT(cond);
27133 if (cond.IsNotNever() &&
27137 EmitA32(0x0c800a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27143 Delegate(kVstm, &Assembler::vstm, cond, dt, rn, write_back, sreglist);
27146 void Assembler::vstmdb(Condition cond,
27152 CheckIT(cond);
27168 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
27173 EmitA32(0x0d200b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27178 Delegate(kVstmdb, &Assembler::vstmdb, cond, dt, rn, write_back, dreglist);
27181 void Assembler::vstmdb(Condition cond,
27187 CheckIT(cond);
27201 if (write_back.DoesWriteBack() && cond.IsNotNever() &&
27205 EmitA32(0x0d200a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27210 Delegate(kVstmdb, &Assembler::vstmdb, cond, dt, rn, write_back, sreglist);
27213 void Assembler::vstmia(Condition cond,
27219 CheckIT(cond);
27235 if (cond.IsNotNever() && (((dreglist.GetLength() <= 16) &&
27240 EmitA32(0x0c800b00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27246 Delegate(kVstmia, &Assembler::vstmia, cond, dt, rn, write_back, dreglist);
27249 void Assembler::vstmia(Condition cond,
27255 CheckIT(cond);
27270 if (cond.IsNotNever() &&
27274 EmitA32(0x0c800a00U | (cond.GetCondition() << 28) | (rn.GetCode() << 16) |
27280 Delegate(kVstmia, &Assembler::vstmia, cond, dt, rn, write_back, sreglist);
27283 void Assembler::vstr(Condition cond,
27288 CheckIT(cond);
27307 ((offset % 4) == 0) && operand.IsOffset() && cond.IsNotNever()) {
27310 EmitA32(0x0d000b00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
27316 Delegate(kVstr, &Assembler::vstr, cond, dt, rd, operand);
27319 void Assembler::vstr(Condition cond,
27324 CheckIT(cond);
27343 ((offset % 4) == 0) && operand.IsOffset() && cond.IsNotNever()) {
27346 EmitA32(0x0d000a00U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
27352 Delegate(kVstr, &Assembler::vstr, cond, dt, rd, operand);
27356 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
27358 CheckIT(cond);
27363 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27379 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27389 if (cond.Is(al)) {
27396 if (dt.Is(F64) && cond.IsNotNever()) {
27397 EmitA32(0x0e300b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
27403 if (cond.Is(al)) {
27410 Delegate(kVsub, &Assembler::vsub, cond, dt, rd, rn, rm);
27414 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
27416 CheckIT(cond);
27421 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27430 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27440 if (cond.Is(al)) {
27448 if (cond.Is(al)) {
27455 Delegate(kVsub, &Assembler::vsub, cond, dt, rd, rn, rm);
27459 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
27461 CheckIT(cond);
27472 if (dt.Is(F32) && cond.IsNotNever()) {
27473 EmitA32(0x0e300a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) |
27478 Delegate(kVsub, &Assembler::vsub, cond, dt, rd, rn, rm);
27482 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
27484 CheckIT(cond);
27489 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27499 if (cond.Is(al)) {
27506 Delegate(kVsubhn, &Assembler::vsubhn, cond, dt, rd, rn, rm);
27510 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
27512 CheckIT(cond);
27517 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27528 if (cond.Is(al)) {
27536 Delegate(kVsubl, &Assembler::vsubl, cond, dt, rd, rn, rm);
27540 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
27542 CheckIT(cond);
27547 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27558 if (cond.Is(al)) {
27566 Delegate(kVsubw, &Assembler::vsubw, cond, dt, rd, rn, rm);
27569 void Assembler::vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
27571 CheckIT(cond);
27575 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27582 if (cond.Is(al)) {
27587 Delegate(kVswp, &Assembler::vswp, cond, dt, rd, rm);
27590 void Assembler::vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
27592 CheckIT(cond);
27596 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27603 if (cond.Is(al)) {
27608 Delegate(kVswp, &Assembler::vswp, cond, dt, rd, rm);
27611 void Assembler::vtbl(Condition cond,
27617 CheckIT(cond);
27622 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27635 if (cond.Is(al)) {
27644 Delegate(kVtbl, &Assembler::vtbl, cond, dt, rd, nreglist, rm);
27647 void Assembler::vtbx(Condition cond,
27653 CheckIT(cond);
27658 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27671 if (cond.Is(al)) {
27680 Delegate(kVtbx, &Assembler::vtbx, cond, dt, rd, nreglist, rm);
27683 void Assembler::vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
27685 CheckIT(cond);
27690 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27700 if (cond.Is(al)) {
27707 Delegate(kVtrn, &Assembler::vtrn, cond, dt, rd, rm);
27710 void Assembler::vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
27712 CheckIT(cond);
27717 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27727 if (cond.Is(al)) {
27734 Delegate(kVtrn, &Assembler::vtrn, cond, dt, rd, rm);
27738 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
27740 CheckIT(cond);
27745 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27755 if (cond.Is(al)) {
27762 Delegate(kVtst, &Assembler::vtst, cond, dt, rd, rn, rm);
27766 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
27768 CheckIT(cond);
27773 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27783 if (cond.Is(al)) {
27790 Delegate(kVtst, &Assembler::vtst, cond, dt, rd, rn, rm);
27793 void Assembler::vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
27795 CheckIT(cond);
27800 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27809 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27818 if (cond.Is(al)) {
27826 if (cond.Is(al)) {
27832 Delegate(kVuzp, &Assembler::vuzp, cond, dt, rd, rm);
27835 void Assembler::vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
27837 CheckIT(cond);
27842 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27852 if (cond.Is(al)) {
27859 Delegate(kVuzp, &Assembler::vuzp, cond, dt, rd, rm);
27862 void Assembler::vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
27864 CheckIT(cond);
27869 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27878 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27887 if (cond.Is(al)) {
27895 if (cond.Is(al)) {
27901 Delegate(kVzip, &Assembler::vzip, cond, dt, rd, rm);
27904 void Assembler::vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
27906 CheckIT(cond);
27911 if (cond.Is(al) || AllowStronglyDiscouraged()) {
27921 if (cond.Is(al)) {
27928 Delegate(kVzip, &Assembler::vzip, cond, dt, rd, rm);
27931 void Assembler::yield(Condition cond, EncodingSize size) {
27933 CheckIT(cond);
27949 if (cond.IsNotNever()) {
27950 EmitA32(0x0320f001U | (cond.GetCondition() << 28));
27954 Delegate(kYield, &Assembler::yield, cond, size);