Lines Matching refs:r10
230 li r10,`15+6*$SIZE_T`
234 stvx v20,r10,$sp
235 addi r10,r10,32
238 stvx v22,r10,$sp
239 addi r10,r10,32
242 stvx v24,r10,$sp
243 addi r10,r10,32
246 stvx v26,r10,$sp
247 addi r10,r10,32
250 stvx v28,r10,$sp
251 addi r10,r10,32
254 stvx v30,r10,$sp
263 li r10,32
266 lvx_4w v2,r10,r3
267 addi r10,r10,32
270 lvx_4w v4,r10,r3
271 addi r10,r10,32
274 lvx_4w v6,r10,r3
275 addi r10,r10,32
278 lvx_4w v8,r10,r3
279 addi r10,r10,32
282 lvx_4w v10,r10,r3
283 addi r10,r10,32
285 lvx_splt v12,r10,r3
291 li r10,32
294 lvx_u v15,r10,r12
295 addi r10,r10,32
298 lvx_u v17,r10,r12
299 addi r10,r10,32
302 lvx_u v19,r10,r12
303 addi r10,r10,32
306 lvx_u v21,r10,r12
307 addi r10,r10,32
310 lvx_u v23,r10,r12
311 addi r10,r10,32
313 lvx_u v25,r10,r12
320 li r10,32
323 stvx_4w v2,r10,r3
324 addi r10,r10,32
327 stvx_4w v4,r10,r3
328 addi r10,r10,32
331 stvx_4w v6,r10,r3
332 addi r10,r10,32
335 stvx_4w v8,r10,r3
336 addi r10,r10,32
339 stvx_4w v10,r10,r3
340 addi r10,r10,32
342 stvdx_u v12,r10,r3
344 li r10,`15+6*$SIZE_T`
348 lvx v20,r10,$sp
349 addi r10,r10,32
352 lvx v22,r10,$sp
353 addi r10,r10,32
356 lvx v24,r10,$sp
357 addi r10,r10,32
360 lvx v26,r10,$sp
361 addi r10,r10,32
364 lvx v28,r10,$sp
365 addi r10,r10,32
368 lvx v30,r10,$sp
386 li r10,`15+6*$SIZE_T`
390 stvx v20,r10,$sp
391 addi r10,r10,32
394 stvx v22,r10,$sp
395 addi r10,r10,32
398 stvx v24,r10,$sp
399 addi r10,r10,32
402 stvx v26,r10,$sp
403 addi r10,r10,32
406 stvx v28,r10,$sp
407 addi r10,r10,32
410 stvx v30,r10,$sp
419 li r10,32
422 lvx_4w v2,r10,$A_jagged
423 addi r10,r10,32
426 lvx_4w v4,r10,$A_jagged
427 addi r10,r10,32
430 lvx_4w v6,r10,$A_jagged
431 addi r10,r10,32
434 lvx_4w v8,r10,$A_jagged
435 addi r10,r10,32
438 lvx_4w v10,r10,$A_jagged
439 addi r10,r10,32
441 lvx_splt v12,r10,$A_jagged
447 li r10,32
450 lvx_u v15,r10,r12
451 addi r10,r10,32
454 lvx_u v17,r10,r12
455 addi r10,r10,32
458 lvx_u v19,r10,r12
459 addi r10,r10,32
462 lvx_u v21,r10,r12
463 addi r10,r10,32
466 lvx_u v23,r10,r12
467 addi r10,r10,32
469 lvx_u v25,r10,r12
470 li r10,-32
484 lvx_u v30,r10,r12 ; permutation masks
625 li r10,32
628 stvx_4w v2,r10,$A_jagged
629 addi r10,r10,32
632 stvx_4w v4,r10,$A_jagged
633 addi r10,r10,32
636 stvx_4w v6,r10,$A_jagged
637 addi r10,r10,32
640 stvx_4w v8,r10,$A_jagged
641 addi r10,r10,32
644 stvx_4w v10,r10,$A_jagged
645 addi r10,r10,32
647 stvdx_u v12,r10,$A_jagged
650 li r10,`15+6*$SIZE_T`
654 lvx v20,r10,$sp
655 addi r10,r10,32
658 lvx v22,r10,$sp
659 addi r10,r10,32
662 lvx v24,r10,$sp
663 addi r10,r10,32
666 lvx v26,r10,$sp
667 addi r10,r10,32
670 lvx v28,r10,$sp
671 addi r10,r10,32
674 lvx v30,r10,$sp
695 mr r10,$bsz
723 subic. r10,r10,8
750 mr r10,$bsz