Lines Matching refs:code
2 // Use of this source code is governed by a BSD-style license that can be
78 // Description of LiftoffRegister code encoding.
99 // code has to check for kGpRegPair and kFpRegPair before it can treat the code
100 // as a register code.
105 // stuffed side by side in code. Note that this is not the second top bit of
109 // the bottom part of the code. Unlike (2), this is the fp register code itself
112 // Maximum code of a gp cache register.
113 static constexpr int kMaxGpRegCode = kLiftoffAssemblerGpCacheRegs.last().code();
114 // Maximum code of an fp cache register.
115 static constexpr int kMaxFpRegCode = kLiftoffAssemblerFpCacheRegs.last().code();
151 : LiftoffRegister(reg.code()) {
156 : LiftoffRegister(kAfterMaxLiftoffGpRegCode + reg.code()) {
161 static LiftoffRegister from_liftoff_code(int code) {
162 LiftoffRegister reg{static_cast<storage_t>(code)};
163 // Check that the code is correct by round-tripping through the
166 (reg.is_gp() && code == LiftoffRegister{reg.gp()}.liftoff_code()) ||
167 (reg.is_fp() && code == LiftoffRegister{reg.fp()}.liftoff_code()) ||
169 code == ForPair(reg.low_gp(), reg.high_gp()).liftoff_code()) ||
170 (reg.is_fp_pair() && code == ForFpPair(reg.low_fp()).liftoff_code()));
174 static LiftoffRegister from_code(RegClass rc, int code) {
177 return LiftoffRegister(Register::from_code(code));
179 return LiftoffRegister(DoubleRegister::from_code(code));
185 // Shifts the register code depending on the type before converting to a
188 int code) {
192 // registers. The f32 register code must therefore be halved in order
193 // to pass the f64 code to Liftoff.
194 DCHECK_EQ(0, code % 2);
195 return LiftoffRegister::from_code(rc, code >> 1);
198 // Similarly for double registers and SIMD registers, the SIMD code
199 // needs to be doubled to pass the f64 code to Liftoff.
200 return LiftoffRegister::ForFpPair(DoubleRegister::from_code(code << 1));
202 return LiftoffRegister::from_code(rc, code);
208 storage_t combined_code = low.code() | high.code() << kBitsPerGpRegCode |
215 DCHECK_EQ(0, low.code() % 2);
216 storage_t combined_code = low.code() | 2 << (2 * kBitsPerGpRegCode);
311 explicit constexpr LiftoffRegister(storage_t code) : code_(code) {}