Lines Matching defs:dst

648   // Move {src} into {dst}. {src} and {dst} must be different.
649 void Move(LiftoffRegister dst, LiftoffRegister src, ValueKind);
651 // Parallel register move: For a list of tuples <dst, src, kind>, move the
652 // {src} register of kind {kind} into {dst}. If {src} equals {dst}, ignore
655 LiftoffRegister dst;
659 ParallelRegisterMoveTuple(Dst dst, Src src, ValueKind kind)
660 : dst(dst), src(src), kind(kind) {}
699 inline void LoadInstanceFromFrame(Register dst);
700 inline void LoadFromInstance(Register dst, Register instance, int offset,
702 inline void LoadTaggedPointerFromInstance(Register dst, Register instance,
704 inline void LoadExternalPointer(Register dst, Register instance, int offset,
709 inline void LoadTaggedPointer(Register dst, Register src_addr,
712 inline void LoadFullPointer(Register dst, Register src_addr,
722 void LoadFixedArrayLengthAsInt32(LiftoffRegister dst, Register array,
725 LoadSmiAsInt32(dst, array, offset, pinned);
727 void LoadSmiAsInt32(LiftoffRegister dst, Register src_addr, int32_t offset,
734 Load(dst, src_addr, no_reg, offset, LoadType::kI32Load, pinned);
737 Load(dst, src_addr, no_reg, offset, LoadType::kI32Load, pinned);
738 emit_i32_sari(dst.gp(), dst.gp(), kSmiTagSize);
741 inline void IncrementSmi(LiftoffRegister dst, int offset);
742 inline void Load(LiftoffRegister dst, Register src_addr, Register offset_reg,
751 inline void AtomicLoad(LiftoffRegister dst, Register src_addr,
798 inline void Move(Register dst, Register src, ValueKind);
799 inline void Move(DoubleRegister dst, DoubleRegister src, ValueKind);
810 inline void emit_i32_add(Register dst, Register lhs, Register rhs);
811 inline void emit_i32_addi(Register dst, Register lhs, int32_t imm);
812 inline void emit_i32_sub(Register dst, Register lhs, Register rhs);
813 inline void emit_i32_subi(Register dst, Register lhs, int32_t imm);
814 inline void emit_i32_mul(Register dst, Register lhs, Register rhs);
815 inline void emit_i32_divs(Register dst, Register lhs, Register rhs,
818 inline void emit_i32_divu(Register dst, Register lhs, Register rhs,
820 inline void emit_i32_rems(Register dst, Register lhs, Register rhs,
822 inline void emit_i32_remu(Register dst, Register lhs, Register rhs,
824 inline void emit_i32_and(Register dst, Register lhs, Register rhs);
825 inline void emit_i32_andi(Register dst, Register lhs, int32_t imm);
826 inline void emit_i32_or(Register dst, Register lhs, Register rhs);
827 inline void emit_i32_ori(Register dst, Register lhs, int32_t imm);
828 inline void emit_i32_xor(Register dst, Register lhs, Register rhs);
829 inline void emit_i32_xori(Register dst, Register lhs, int32_t imm);
830 inline void emit_i32_shl(Register dst, Register src, Register amount);
831 inline void emit_i32_shli(Register dst, Register src, int32_t amount);
832 inline void emit_i32_sar(Register dst, Register src, Register amount);
833 inline void emit_i32_sari(Register dst, Register src, int32_t amount);
834 inline void emit_i32_shr(Register dst, Register src, Register amount);
835 inline void emit_i32_shri(Register dst, Register src, int32_t amount);
838 inline void emit_i32_clz(Register dst, Register src);
839 inline void emit_i32_ctz(Register dst, Register src);
840 inline bool emit_i32_popcnt(Register dst, Register src);
843 inline void emit_i64_add(LiftoffRegister dst, LiftoffRegister lhs,
845 inline void emit_i64_addi(LiftoffRegister dst, LiftoffRegister lhs,
847 inline void emit_i64_sub(LiftoffRegister dst, LiftoffRegister lhs,
849 inline void emit_i64_mul(LiftoffRegister dst, LiftoffRegister lhs,
851 inline bool emit_i64_divs(LiftoffRegister dst, LiftoffRegister lhs,
854 inline bool emit_i64_divu(LiftoffRegister dst, LiftoffRegister lhs,
856 inline bool emit_i64_rems(LiftoffRegister dst, LiftoffRegister lhs,
858 inline bool emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs,
860 inline void emit_i64_and(LiftoffRegister dst, LiftoffRegister lhs,
862 inline void emit_i64_andi(LiftoffRegister dst, LiftoffRegister lhs,
864 inline void emit_i64_or(LiftoffRegister dst, LiftoffRegister lhs,
866 inline void emit_i64_ori(LiftoffRegister dst, LiftoffRegister lhs,
868 inline void emit_i64_xor(LiftoffRegister dst, LiftoffRegister lhs,
870 inline void emit_i64_xori(LiftoffRegister dst, LiftoffRegister lhs,
872 inline void emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
874 inline void emit_i64_shli(LiftoffRegister dst, LiftoffRegister src,
876 inline void emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
878 inline void emit_i64_sari(LiftoffRegister dst, LiftoffRegister src,
880 inline void emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
882 inline void emit_i64_shri(LiftoffRegister dst, LiftoffRegister src,
886 inline void emit_i64_clz(LiftoffRegister dst, LiftoffRegister src);
887 inline void emit_i64_ctz(LiftoffRegister dst, LiftoffRegister src);
888 inline bool emit_i64_popcnt(LiftoffRegister dst, LiftoffRegister src);
890 inline void emit_u32_to_uintptr(Register dst, Register src);
892 void emit_ptrsize_add(Register dst, Register lhs, Register rhs) {
894 emit_i64_add(LiftoffRegister(dst), LiftoffRegister(lhs),
897 emit_i32_add(dst, lhs, rhs);
900 void emit_ptrsize_sub(Register dst, Register lhs, Register rhs) {
902 emit_i64_sub(LiftoffRegister(dst), LiftoffRegister(lhs),
905 emit_i32_sub(dst, lhs, rhs);
908 void emit_ptrsize_and(Register dst, Register lhs, Register rhs) {
910 emit_i64_and(LiftoffRegister(dst), LiftoffRegister(lhs),
913 emit_i32_and(dst, lhs, rhs);
916 void emit_ptrsize_shri(Register dst, Register src, int amount) {
918 emit_i64_shri(LiftoffRegister(dst), LiftoffRegister(src), amount);
920 emit_i32_shri(dst, src, amount);
924 void emit_ptrsize_addi(Register dst, Register lhs, intptr_t imm) {
926 emit_i64_addi(LiftoffRegister(dst), LiftoffRegister(lhs), imm);
928 emit_i32_addi(dst, lhs, static_cast<int32_t>(imm));
932 void emit_ptrsize_set_cond(LiftoffCondition condition, Register dst,
935 emit_i64_set_cond(condition, dst, lhs, rhs);
937 emit_i32_set_cond(condition, dst, lhs.gp(), rhs.gp());
941 void emit_ptrsize_zeroextend_i32(Register dst, Register src) {
943 emit_type_conversion(kExprI64UConvertI32, LiftoffRegister(dst),
945 } else if (dst != src) {
946 Move(dst, src, kI32);
951 inline void emit_f32_add(DoubleRegister dst, DoubleRegister lhs,
953 inline void emit_f32_sub(DoubleRegister dst, DoubleRegister lhs,
955 inline void emit_f32_mul(DoubleRegister dst, DoubleRegister lhs,
957 inline void emit_f32_div(DoubleRegister dst, DoubleRegister lhs,
959 inline void emit_f32_min(DoubleRegister dst, DoubleRegister lhs,
961 inline void emit_f32_max(DoubleRegister dst, DoubleRegister lhs,
963 inline void emit_f32_copysign(DoubleRegister dst, DoubleRegister lhs,
967 inline void emit_f32_abs(DoubleRegister dst, DoubleRegister src);
968 inline void emit_f32_neg(DoubleRegister dst, DoubleRegister src);
969 inline bool emit_f32_ceil(DoubleRegister dst, DoubleRegister src);
970 inline bool emit_f32_floor(DoubleRegister dst, DoubleRegister src);
971 inline bool emit_f32_trunc(DoubleRegister dst, DoubleRegister src);
972 inline bool emit_f32_nearest_int(DoubleRegister dst, DoubleRegister src);
973 inline void emit_f32_sqrt(DoubleRegister dst, DoubleRegister src);
976 inline void emit_f64_add(DoubleRegister dst, DoubleRegister lhs,
978 inline void emit_f64_sub(DoubleRegister dst, DoubleRegister lhs,
980 inline void emit_f64_mul(DoubleRegister dst, DoubleRegister lhs,
982 inline void emit_f64_div(DoubleRegister dst, DoubleRegister lhs,
984 inline void emit_f64_min(DoubleRegister dst, DoubleRegister lhs,
986 inline void emit_f64_max(DoubleRegister dst, DoubleRegister lhs,
988 inline void emit_f64_copysign(DoubleRegister dst, DoubleRegister lhs,
992 inline void emit_f64_abs(DoubleRegister dst, DoubleRegister src);
993 inline void emit_f64_neg(DoubleRegister dst, DoubleRegister src);
994 inline bool emit_f64_ceil(DoubleRegister dst, DoubleRegister src);
995 inline bool emit_f64_floor(DoubleRegister dst, DoubleRegister src);
996 inline bool emit_f64_trunc(DoubleRegister dst, DoubleRegister src);
997 inline bool emit_f64_nearest_int(DoubleRegister dst, DoubleRegister src);
998 inline void emit_f64_sqrt(DoubleRegister dst, DoubleRegister src);
1000 inline bool emit_type_conversion(WasmOpcode opcode, LiftoffRegister dst,
1003 inline void emit_i32_signextend_i8(Register dst, Register src);
1004 inline void emit_i32_signextend_i16(Register dst, Register src);
1005 inline void emit_i64_signextend_i8(LiftoffRegister dst, LiftoffRegister src);
1006 inline void emit_i64_signextend_i16(LiftoffRegister dst, LiftoffRegister src);
1007 inline void emit_i64_signextend_i32(LiftoffRegister dst, LiftoffRegister src);
1018 // Set {dst} to 1 if condition holds, 0 otherwise.
1019 inline void emit_i32_eqz(Register dst, Register src);
1020 inline void emit_i32_set_cond(LiftoffCondition, Register dst, Register lhs,
1022 inline void emit_i64_eqz(Register dst, LiftoffRegister src);
1023 inline void emit_i64_set_cond(LiftoffCondition condition, Register dst,
1025 inline void emit_f32_set_cond(LiftoffCondition condition, Register dst,
1027 inline void emit_f64_set_cond(LiftoffCondition condition, Register dst,
1032 inline bool emit_select(LiftoffRegister dst, Register condition,
1039 inline void LoadTransform(LiftoffRegister dst, Register src_addr,
1043 inline void LoadLane(LiftoffRegister dst, LiftoffRegister src, Register addr,
1046 inline void StoreLane(Register dst, Register offset, uintptr_t offset_imm,
1049 inline void emit_i8x16_shuffle(LiftoffRegister dst, LiftoffRegister lhs,
1052 inline void emit_i8x16_swizzle(LiftoffRegister dst, LiftoffRegister lhs,
1054 inline void emit_i8x16_popcnt(LiftoffRegister dst, LiftoffRegister src);
1055 inline void emit_i8x16_splat(LiftoffRegister dst, LiftoffRegister src);
1056 inline void emit_i16x8_splat(LiftoffRegister dst, LiftoffRegister src);
1057 inline void emit_i32x4_splat(LiftoffRegister dst, LiftoffRegister src);
1058 inline void emit_i64x2_splat(LiftoffRegister dst, LiftoffRegister src);
1059 inline void emit_f32x4_splat(LiftoffRegister dst, LiftoffRegister src);
1060 inline void emit_f64x2_splat(LiftoffRegister dst, LiftoffRegister src);
1061 inline void emit_i8x16_eq(LiftoffRegister dst, LiftoffRegister lhs,
1063 inline void emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs,
1065 inline void emit_i8x16_gt_s(LiftoffRegister dst, LiftoffRegister lhs,
1067 inline void emit_i8x16_gt_u(LiftoffRegister dst, LiftoffRegister lhs,
1069 inline void emit_i8x16_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
1071 inline void emit_i8x16_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
1073 inline void emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
1075 inline void emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs,
1077 inline void emit_i16x8_gt_s(LiftoffRegister dst, LiftoffRegister lhs,
1079 inline void emit_i16x8_gt_u(LiftoffRegister dst, LiftoffRegister lhs,
1081 inline void emit_i16x8_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
1083 inline void emit_i16x8_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
1085 inline void emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
1087 inline void emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
1089 inline void emit_i32x4_gt_s(LiftoffRegister dst, LiftoffRegister lhs,
1091 inline void emit_i32x4_gt_u(LiftoffRegister dst, LiftoffRegister lhs,
1093 inline void emit_i32x4_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
1095 inline void emit_i32x4_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
1097 inline void emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
1099 inline void emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
1101 inline void emit_i64x2_gt_s(LiftoffRegister dst, LiftoffRegister lhs,
1103 inline void emit_i64x2_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
1105 inline void emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
1107 inline void emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
1109 inline void emit_f32x4_lt(LiftoffRegister dst, LiftoffRegister lhs,
1111 inline void emit_f32x4_le(LiftoffRegister dst, LiftoffRegister lhs,
1113 inline void emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs,
1115 inline void emit_f64x2_ne(LiftoffRegister dst, LiftoffRegister lhs,
1117 inline void emit_f64x2_lt(LiftoffRegister dst, LiftoffRegister lhs,
1119 inline void emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
1121 inline void emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]);
1122 inline void emit_s128_not(LiftoffRegister dst, LiftoffRegister src);
1123 inline void emit_s128_and(LiftoffRegister dst, LiftoffRegister lhs,
1125 inline void emit_s128_or(LiftoffRegister dst, LiftoffRegister lhs,
1127 inline void emit_s128_xor(LiftoffRegister dst, LiftoffRegister lhs,
1129 inline void emit_s128_select(LiftoffRegister dst, LiftoffRegister src1,
1131 inline void emit_i8x16_neg(LiftoffRegister dst, LiftoffRegister src);
1132 inline void emit_v128_anytrue(LiftoffRegister dst, LiftoffRegister src);
1133 inline void emit_i8x16_alltrue(LiftoffRegister dst, LiftoffRegister src);
1134 inline void emit_i8x16_bitmask(LiftoffRegister dst, LiftoffRegister src);
1135 inline void emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs,
1137 inline void emit_i8x16_shli(LiftoffRegister dst, LiftoffRegister lhs,
1139 inline void emit_i8x16_shr_s(LiftoffRegister dst, LiftoffRegister lhs,
1141 inline void emit_i8x16_shri_s(LiftoffRegister dst, LiftoffRegister lhs,
1143 inline void emit_i8x16_shr_u(LiftoffRegister dst, LiftoffRegister lhs,
1145 inline void emit_i8x16_shri_u(LiftoffRegister dst, LiftoffRegister lhs,
1147 inline void emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
1149 inline void emit_i8x16_add_sat_s(LiftoffRegister dst, LiftoffRegister lhs,
1151 inline void emit_i8x16_add_sat_u(LiftoffRegister dst, LiftoffRegister lhs,
1153 inline void emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs,
1155 inline void emit_i8x16_sub_sat_s(LiftoffRegister dst, LiftoffRegister lhs,
1157 inline void emit_i8x16_sub_sat_u(LiftoffRegister dst, LiftoffRegister lhs,
1159 inline void emit_i8x16_min_s(LiftoffRegister dst, LiftoffRegister lhs,
1161 inline void emit_i8x16_min_u(LiftoffRegister dst, LiftoffRegister lhs,
1163 inline void emit_i8x16_max_s(LiftoffRegister dst, LiftoffRegister lhs,
1165 inline void emit_i8x16_max_u(LiftoffRegister dst, LiftoffRegister lhs,
1167 inline void emit_i16x8_neg(LiftoffRegister dst, LiftoffRegister src);
1168 inline void emit_i16x8_alltrue(LiftoffRegister dst, LiftoffRegister src);
1169 inline void emit_i16x8_bitmask(LiftoffRegister dst, LiftoffRegister src);
1170 inline void emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs,
1172 inline void emit_i16x8_shli(LiftoffRegister dst, LiftoffRegister lhs,
1174 inline void emit_i16x8_shr_s(LiftoffRegister dst, LiftoffRegister lhs,
1176 inline void emit_i16x8_shri_s(LiftoffRegister dst, LiftoffRegister lhs,
1178 inline void emit_i16x8_shr_u(LiftoffRegister dst, LiftoffRegister lhs,
1180 inline void emit_i16x8_shri_u(LiftoffRegister dst, LiftoffRegister lhs,
1182 inline void emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
1184 inline void emit_i16x8_add_sat_s(LiftoffRegister dst, LiftoffRegister lhs,
1186 inline void emit_i16x8_add_sat_u(LiftoffRegister dst, LiftoffRegister lhs,
1188 inline void emit_i16x8_sub(LiftoffRegister dst, LiftoffRegister lhs,
1190 inline void emit_i16x8_sub_sat_s(LiftoffRegister dst, LiftoffRegister lhs,
1192 inline void emit_i16x8_sub_sat_u(LiftoffRegister dst, LiftoffRegister lhs,
1194 inline void emit_i16x8_mul(LiftoffRegister dst, LiftoffRegister lhs,
1196 inline void emit_i16x8_min_s(LiftoffRegister dst, LiftoffRegister lhs,
1198 inline void emit_i16x8_min_u(LiftoffRegister dst, LiftoffRegister lhs,
1200 inline void emit_i16x8_max_s(LiftoffRegister dst, LiftoffRegister lhs,
1202 inline void emit_i16x8_max_u(LiftoffRegister dst, LiftoffRegister lhs,
1204 inline void emit_i16x8_extadd_pairwise_i8x16_s(LiftoffRegister dst,
1206 inline void emit_i16x8_extadd_pairwise_i8x16_u(LiftoffRegister dst,
1208 inline void emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst,
1211 inline void emit_i16x8_extmul_low_i8x16_u(LiftoffRegister dst,
1214 inline void emit_i16x8_extmul_high_i8x16_s(LiftoffRegister dst,
1217 inline void emit_i16x8_extmul_high_i8x16_u(LiftoffRegister dst,
1220 inline void emit_i16x8_q15mulr_sat_s(LiftoffRegister dst,
1223 inline void emit_i32x4_neg(LiftoffRegister dst, LiftoffRegister src);
1224 inline void emit_i32x4_alltrue(LiftoffRegister dst, LiftoffRegister src);
1225 inline void emit_i32x4_bitmask(LiftoffRegister dst, LiftoffRegister src);
1226 inline void emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs,
1228 inline void emit_i32x4_shli(LiftoffRegister dst, LiftoffRegister lhs,
1230 inline void emit_i32x4_shr_s(LiftoffRegister dst, LiftoffRegister lhs,
1232 inline void emit_i32x4_shri_s(LiftoffRegister dst, LiftoffRegister lhs,
1234 inline void emit_i32x4_shr_u(LiftoffRegister dst, LiftoffRegister lhs,
1236 inline void emit_i32x4_shri_u(LiftoffRegister dst, LiftoffRegister lhs,
1238 inline void emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
1240 inline void emit_i32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
1242 inline void emit_i32x4_mul(LiftoffRegister dst, LiftoffRegister lhs,
1244 inline void emit_i32x4_min_s(LiftoffRegister dst, LiftoffRegister lhs,
1246 inline void emit_i32x4_min_u(LiftoffRegister dst, LiftoffRegister lhs,
1248 inline void emit_i32x4_max_s(LiftoffRegister dst, LiftoffRegister lhs,
1250 inline void emit_i32x4_max_u(LiftoffRegister dst, LiftoffRegister lhs,
1252 inline void emit_i32x4_dot_i16x8_s(LiftoffRegister dst, LiftoffRegister lhs,
1254 inline void emit_i32x4_extadd_pairwise_i16x8_s(LiftoffRegister dst,
1256 inline void emit_i32x4_extadd_pairwise_i16x8_u(LiftoffRegister dst,
1258 inline void emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst,
1261 inline void emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst,
1264 inline void emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst,
1267 inline void emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst,
1270 inline void emit_i64x2_neg(LiftoffRegister dst, LiftoffRegister src);
1271 inline void emit_i64x2_alltrue(LiftoffRegister dst, LiftoffRegister src);
1272 inline void emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs,
1274 inline void emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs,
1276 inline void emit_i64x2_shr_s(LiftoffRegister dst, LiftoffRegister lhs,
1278 inline void emit_i64x2_shri_s(LiftoffRegister dst, LiftoffRegister lhs,
1280 inline void emit_i64x2_shr_u(LiftoffRegister dst, LiftoffRegister lhs,
1282 inline void emit_i64x2_shri_u(LiftoffRegister dst, LiftoffRegister lhs,
1284 inline void emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
1286 inline void emit_i64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
1288 inline void emit_i64x2_mul(LiftoffRegister dst, LiftoffRegister lhs,
1290 inline void emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst,
1293 inline void emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst,
1296 inline void emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst,
1299 inline void emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst,
1302 inline void emit_i64x2_bitmask(LiftoffRegister dst, LiftoffRegister src);
1303 inline void emit_i64x2_sconvert_i32x4_low(LiftoffRegister dst,
1305 inline void emit_i64x2_sconvert_i32x4_high(LiftoffRegister dst,
1307 inline void emit_i64x2_uconvert_i32x4_low(LiftoffRegister dst,
1309 inline void emit_i64x2_uconvert_i32x4_high(LiftoffRegister dst,
1311 inline void emit_f32x4_abs(LiftoffRegister dst, LiftoffRegister src);
1312 inline void emit_f32x4_neg(LiftoffRegister dst, LiftoffRegister src);
1313 inline void emit_f32x4_sqrt(LiftoffRegister dst, LiftoffRegister src);
1314 inline bool emit_f32x4_ceil(LiftoffRegister dst, LiftoffRegister src);
1315 inline bool emit_f32x4_floor(LiftoffRegister dst, LiftoffRegister src);
1316 inline bool emit_f32x4_trunc(LiftoffRegister dst, LiftoffRegister src);
1317 inline bool emit_f32x4_nearest_int(LiftoffRegister dst, LiftoffRegister src);
1318 inline void emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
1320 inline void emit_f32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
1322 inline void emit_f32x4_mul(LiftoffRegister dst, LiftoffRegister lhs,
1324 inline void emit_f32x4_div(LiftoffRegister dst, LiftoffRegister lhs,
1326 inline void emit_f32x4_min(LiftoffRegister dst, LiftoffRegister lhs,
1328 inline void emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
1330 inline void emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
1332 inline void emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs,
1334 inline void emit_f64x2_abs(LiftoffRegister dst, LiftoffRegister src);
1335 inline void emit_f64x2_neg(LiftoffRegister dst, LiftoffRegister src);
1336 inline void emit_f64x2_sqrt(LiftoffRegister dst, LiftoffRegister src);
1337 inline bool emit_f64x2_ceil(LiftoffRegister dst, LiftoffRegister src);
1338 inline bool emit_f64x2_floor(LiftoffRegister dst, LiftoffRegister src);
1339 inline bool emit_f64x2_trunc(LiftoffRegister dst, LiftoffRegister src);
1340 inline bool emit_f64x2_nearest_int(LiftoffRegister dst, LiftoffRegister src);
1341 inline void emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
1343 inline void emit_f64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
1345 inline void emit_f64x2_mul(LiftoffRegister dst, LiftoffRegister lhs,
1347 inline void emit_f64x2_div(LiftoffRegister dst, LiftoffRegister lhs,
1349 inline void emit_f64x2_min(LiftoffRegister dst, LiftoffRegister lhs,
1351 inline void emit_f64x2_max(LiftoffRegister dst, LiftoffRegister lhs,
1353 inline void emit_f64x2_pmin(LiftoffRegister dst, LiftoffRegister lhs,
1355 inline void emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
1357 inline void emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
1359 inline void emit_f64x2_convert_low_i32x4_u(LiftoffRegister dst,
1361 inline void emit_i32x4_trunc_sat_f64x2_s_zero(LiftoffRegister dst,
1363 inline void emit_i32x4_trunc_sat_f64x2_u_zero(LiftoffRegister dst,
1365 inline void emit_f32x4_demote_f64x2_zero(LiftoffRegister dst,
1367 inline void emit_f64x2_promote_low_f32x4(LiftoffRegister dst,
1369 inline void emit_i32x4_sconvert_f32x4(LiftoffRegister dst,
1371 inline void emit_i32x4_uconvert_f32x4(LiftoffRegister dst,
1373 inline void emit_f32x4_sconvert_i32x4(LiftoffRegister dst,
1375 inline void emit_f32x4_uconvert_i32x4(LiftoffRegister dst,
1377 inline void emit_i8x16_sconvert_i16x8(LiftoffRegister dst,
1380 inline void emit_i8x16_uconvert_i16x8(LiftoffRegister dst,
1383 inline void emit_i16x8_sconvert_i32x4(LiftoffRegister dst,
1386 inline void emit_i16x8_uconvert_i32x4(LiftoffRegister dst,
1389 inline void emit_i16x8_sconvert_i8x16_low(LiftoffRegister dst,
1391 inline void emit_i16x8_sconvert_i8x16_high(LiftoffRegister dst,
1393 inline void emit_i16x8_uconvert_i8x16_low(LiftoffRegister dst,
1395 inline void emit_i16x8_uconvert_i8x16_high(LiftoffRegister dst,
1397 inline void emit_i32x4_sconvert_i16x8_low(LiftoffRegister dst,
1399 inline void emit_i32x4_sconvert_i16x8_high(LiftoffRegister dst,
1401 inline void emit_i32x4_uconvert_i16x8_low(LiftoffRegister dst,
1403 inline void emit_i32x4_uconvert_i16x8_high(LiftoffRegister dst,
1405 inline void emit_s128_and_not(LiftoffRegister dst, LiftoffRegister lhs,
1407 inline void emit_i8x16_rounding_average_u(LiftoffRegister dst,
1410 inline void emit_i16x8_rounding_average_u(LiftoffRegister dst,
1413 inline void emit_i8x16_abs(LiftoffRegister dst, LiftoffRegister src);
1414 inline void emit_i16x8_abs(LiftoffRegister dst, LiftoffRegister src);
1415 inline void emit_i32x4_abs(LiftoffRegister dst, LiftoffRegister src);
1416 inline void emit_i64x2_abs(LiftoffRegister dst, LiftoffRegister src);
1417 inline void emit_i8x16_extract_lane_s(LiftoffRegister dst,
1420 inline void emit_i8x16_extract_lane_u(LiftoffRegister dst,
1423 inline void emit_i16x8_extract_lane_s(LiftoffRegister dst,
1426 inline void emit_i16x8_extract_lane_u(LiftoffRegister dst,
1429 inline void emit_i32x4_extract_lane(LiftoffRegister dst, LiftoffRegister lhs,
1431 inline void emit_i64x2_extract_lane(LiftoffRegister dst, LiftoffRegister lhs,
1433 inline void emit_f32x4_extract_lane(LiftoffRegister dst, LiftoffRegister lhs,
1435 inline void emit_f64x2_extract_lane(LiftoffRegister dst, LiftoffRegister lhs,
1437 inline void emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1440 inline void emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1443 inline void emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1446 inline void emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1449 inline void emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1452 inline void emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1,
1496 // Set the i32 at address dst to a non-zero value if src is a NaN.
1497 inline void emit_set_if_nan(Register dst, DoubleRegister src, ValueKind kind);
1499 // Set the i32 at address dst to a non-zero value if src contains a NaN.
1500 inline void emit_s128_set_if_nan(Register dst, LiftoffRegister src,
1578 LiftoffRegister dst, LiftoffRegister lhs,
1580 // If {dst.low_gp()} does not overlap with {lhs.high_gp()} or {rhs.high_gp()},
1582 if (dst.low() != lhs.high() && dst.low() != rhs.high()) {
1583 (assm->*op)(dst.low_gp(), lhs.low_gp(), rhs.low_gp());
1584 (assm->*op)(dst.high_gp(), lhs.high_gp(), rhs.high_gp());
1587 // If {dst.high_gp()} does not overlap with {lhs.low_gp()} or {rhs.low_gp()},
1589 if (dst.high() != lhs.low() && dst.high() != rhs.low()) {
1590 (assm->*op)(dst.high_gp(), lhs.high_gp(), rhs.high_gp());
1591 (assm->*op)(dst.low_gp(), lhs.low_gp(), rhs.low_gp());
1597 (assm->*op)(dst.high_gp(), lhs.high_gp(), rhs.high_gp());
1598 assm->Move(dst.low_gp(), tmp, kI32);
1603 LiftoffRegister dst,
1607 // If {dst.low_gp()} does not overlap with {lhs.high_gp()},
1609 if (dst.low() != lhs.high()) {
1610 (assm->*op)(dst.low_gp(), lhs.low_gp(), low_word);
1611 (assm->*op)(dst.high_gp(), lhs.high_gp(), high_word);
1614 // If {dst.high_gp()} does not overlap with {lhs.low_gp()},
1616 if (dst.high() != lhs.low()) {
1617 (assm->*op)(dst.high_gp(), lhs.high_gp(), high_word);
1618 (assm->*op)(dst.low_gp(), lhs.low_gp(), low_word);
1624 (assm->*op)(dst.high_gp(), lhs.high_gp(), high_word);
1625 assm->Move(dst.low_gp(), tmp, kI32);
1629 void LiftoffAssembler::emit_i64_and(LiftoffRegister dst, LiftoffRegister lhs,
1632 this, dst, lhs, rhs);
1635 void LiftoffAssembler::emit_i64_andi(LiftoffRegister dst, LiftoffRegister lhs,
1638 this, dst, lhs, imm);
1641 void LiftoffAssembler::emit_i64_or(LiftoffRegister dst, LiftoffRegister lhs,
1644 this, dst, lhs, rhs);
1647 void LiftoffAssembler::emit_i64_ori(LiftoffRegister dst, LiftoffRegister lhs,
1650 this, dst, lhs, imm);
1653 void LiftoffAssembler::emit_i64_xor(LiftoffRegister dst, LiftoffRegister lhs,
1656 this, dst, lhs, rhs);
1659 void LiftoffAssembler::emit_i64_xori(LiftoffRegister dst, LiftoffRegister lhs,
1662 this, dst, lhs, imm);
1665 void LiftoffAssembler::emit_u32_to_uintptr(Register dst, Register src) {