Lines Matching defs:reg
100 LoadIntoRegister(dst.reg(), src, src.offset());
115 asm_->Spill(dst.offset(), src.reg(), src.kind());
132 if (dst != src.reg()) MoveRegister(dst, src.reg(), src.kind());
153 half == kLowWord ? src.reg().low() : src.reg().high();
270 RegisterMove* register_move(LiftoffRegister reg) {
272 reg.liftoff_code();
274 RegisterLoad* register_load(LiftoffRegister reg) {
276 reg.liftoff_code();
278 int* src_reg_use_count(LiftoffRegister reg) {
279 return src_reg_use_count_ + reg.liftoff_code();
416 base::Optional<LiftoffRegister> reg;
419 if (source->is_reg() && state->is_free(source->reg())) {
420 reg = source->reg();
424 if (!reg && reuse_registers) {
425 reg = register_reuse_map.Lookup(source->reg());
429 if (!reg && state->has_unused_register(rc, used_regs)) {
430 reg = state->unused_register(rc, used_regs);
433 if (!reg) {
438 if (reuse_registers) register_reuse_map.Add(source->reg(), *reg);
439 state->inc_used(*reg);
440 *target = VarState(source->kind(), *reg, source->offset());
478 if (src.is_reg()) used_regs.set(src.reg());
489 if (src.is_reg()) used_regs.set(src.reg());
561 spills->set(slot.reg());
588 safepoint.DefineTaggedRegister(slot.reg().gp().code());
627 if (slot.is_reg()) return slot.reg();
628 LiftoffRegister reg = GetUnusedRegister(reg_class_for(slot.kind()), pinned);
630 LoadConstant(reg, slot.constant());
633 Fill(reg, slot.offset(), slot.kind());
635 return reg;
641 return half == kLowWord ? slot.reg().low() : slot.reg().high();
661 return slot.reg();
663 LiftoffRegister reg = LoadToRegister(slot, pinned);
664 cache_state_.inc_used(reg);
665 slot.MakeRegister(reg);
666 return reg;
675 cache_state_.dec_used(slot.reg());
683 cache_state_.dec_used(dropped->reg());
695 if (cache_state_.get_use_count(slot.reg()) > 1) {
699 pinned.set(slot.reg());
701 Move(dst_reg, slot.reg(), slot.kind());
702 cache_state_.dec_used(slot.reg());
708 LiftoffRegister reg = GetUnusedRegister(rc, {});
709 LoadConstant(reg, slot.constant());
710 slot.MakeRegister(reg);
711 cache_state_.inc_used(reg);
726 LiftoffRegister reg = cache_state_.unused_register(rc);
727 LoadConstant(reg, slot.constant());
728 cache_state_.inc_used(reg);
729 slot.MakeRegister(reg);
873 Spill(slot->offset(), slot->reg(), slot->kind());
874 cache_state_.dec_used(slot->reg());
893 Spill(slot.offset(), slot.reg(), slot.kind());
901 Register reg, std::initializer_list<Register*> possible_uses,
903 if (reg == cache_state()->cached_instance) {
911 DCHECK_NE(reg, *use);
914 } else if (reg == cache_state()->cached_mem_start) {
919 } else if (cache_state()->is_used(LiftoffRegister(reg))) {
920 SpillRegister(LiftoffRegister(reg));
924 if (reg != *use) continue;
927 Move(replacement, reg, kPointerKind);
929 // We cannot leave this loop early. There may be multiple uses of {reg}.
966 LiftoffRegister reg =
968 param_regs->set(reg);
970 stack_transfers->LoadI64HalfIntoRegister(reg, slot, stack_offset,
973 stack_transfers->LoadIntoRegister(reg, slot, stack_offset);
1021 Spill(it->offset(), it->reg(), it->kind());
1022 cache_state_.dec_used(it->reg());
1162 // Defaults to a gp reg, will be set below if return kind is not gp.
1203 LiftoffRegister reg = needs_gp_pair
1207 StoreCallerFrameSlot(reg, -loc.AsCallerFrameSlot(), lowered_kind);
1226 LiftoffRegister reg =
1230 stack_transfers.LoadI64HalfIntoRegister(reg, slot, slot.offset(),
1233 stack_transfers.LoadIntoRegister(reg, slot, slot.offset());
1247 LiftoffRegister reg = var.reg();
1248 if ((kNeedI64RegPair || kNeedS128RegPair) && reg.is_pair()) {
1249 ++register_use_count[reg.low().liftoff_code()];
1250 ++register_use_count[reg.high().liftoff_code()];
1252 ++register_use_count[reg.liftoff_code()];
1254 used_regs.set(reg);
1334 void LiftoffAssembler::SpillRegister(LiftoffRegister reg) {
1335 int remaining_uses = cache_state_.get_use_count(reg);
1340 if (!slot->is_reg() || !slot->reg().overlaps(reg)) continue;
1341 if (slot->reg().is_pair()) {
1344 cache_state_.dec_used(slot->reg().low());
1345 cache_state_.dec_used(slot->reg().high());
1346 cache_state_.last_spilled_regs.set(slot->reg().low());
1347 cache_state_.last_spilled_regs.set(slot->reg().high());
1349 Spill(slot->offset(), slot->reg(), slot->kind());
1353 cache_state_.clear_used(reg);
1354 cache_state_.last_spilled_regs.set(reg);
1373 return os << slot.reg();