Lines Matching refs:format

78   int FormatVFPRegister(Instruction* instr, const char* format,
81 int FormatVFPinstruction(Instruction* instr, const char* format);
94 void Format(Instruction* instr, const char* format);
294 int Decoder::FormatRegister(Instruction* instr, const char* format) {
295 DCHECK_EQ(format[0], 'r');
296 if (format[1] == 'n') { // 'rn: Rn register
300 } else if (format[1] == 'd') { // 'rd: Rd register
304 } else if (format[1] == 's') { // 'rs: Rs register
308 } else if (format[1] == 'm') { // 'rm: Rm register
312 } else if (format[1] == 't') { // 'rt: Rt register
316 } else if (format[1] == 'l') {
318 DCHECK(STRING_STARTS_WITH(format, "rlist"));
341 int Decoder::FormatVFPRegister(Instruction* instr, const char* format,
345 if (format[1] == 'n') {
347 } else if (format[1] == 'm') {
349 } else if (format[1] == 'd') {
358 if (format[2] == '+') {
364 if (format[2] == '+') retval = 3;
381 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
382 Print(format);
430 // the current instructions. The format string points to the first
434 int Decoder::FormatOption(Instruction* instr, const char* format) {
435 switch (format[0]) {
451 DCHECK(STRING_STARTS_WITH(format, "cond"));
485 int width = (format[3] - '0') * 10 + (format[4] - '0');
486 int lsb = (format[6] - '0') * 10 + (format[7] - '0');
503 if (format[1] == 'w') {
508 if (format[1] == 'e') { // 'memop: load/store instructions.
509 DCHECK(STRING_STARTS_WITH(format, "memop"));
527 DCHECK(STRING_STARTS_WITH(format, "msg"));
535 if ((format[3] == '1') && (format[4] == '2')) {
537 DCHECK(STRING_STARTS_WITH(format, "off12"));
541 } else if (format[3] == '0') {
543 DCHECK(STRING_STARTS_WITH(format, "off0to3and8to19"));
550 DCHECK(STRING_STARTS_WITH(format, "off8"));
557 DCHECK(STRING_STARTS_WITH(format, "pu"));
562 return FormatRegister(instr, format);
565 if (format[1] == 'h') { // 'shift_op or 'shift_rm or 'shift_sat.
566 if (format[6] == 'o') { // 'shift_op
567 DCHECK(STRING_STARTS_WITH(format, "shift_op"));
575 } else if (format[6] == 's') { // 'shift_sat.
576 DCHECK(STRING_STARTS_WITH(format, "shift_sat"));
580 DCHECK(STRING_STARTS_WITH(format, "shift_rm"));
584 } else if (format[1] == 'v') { // 'svc
585 DCHECK(STRING_STARTS_WITH(format, "svc"));
588 } else if (format[1] == 'i') { // 'sign: signed extra loads and stores
589 if (format[2] == 'g') {
590 DCHECK(STRING_STARTS_WITH(format, "sign"));
597 DCHECK(STRING_STARTS_WITH(format, "size2") ||
598 STRING_STARTS_WITH(format, "size3"));
599 int sz = 8 << (format[4] == '2' ? instr->Bits(19, 18)
605 } else if (format[1] == 'p') {
606 if (format[8] == '_') { // 'spec_reg_fields
607 DCHECK(STRING_STARTS_WITH(format, "spec_reg_fields"));
617 DCHECK(STRING_STARTS_WITH(format, "spec_reg"));
633 DCHECK(STRING_STARTS_WITH(format, "target"));
661 return FormatVFPinstruction(instr, format);
687 return FormatVFPRegister(instr, format, kSinglePrecision);
689 return FormatVFPRegister(instr, format, kDoublePrecision);
691 return FormatVFPRegister(instr, format, kSimd128Precision);
708 void Decoder::Format(Instruction* instr, const char* format) {
709 char cur = *format++;
712 format += FormatOption(instr, format);
716 cur = *format++;
1300 // SMMLA (in V8 notation matching ARM ISA format)
1309 // UDIV (in V8 notation matching ARM ISA format) rn = rm/rs
1312 // SDIV (in V8 notation matching ARM ISA format) rn = rm/rs