Lines Matching refs:vinstr
934 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
936 void vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,
940 void vinstr(byte op, Reg1 dst, Reg2 src1, Op src2, SIMDPrefix pp,
994 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
997 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1003 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1006 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1015 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1018 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1028 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1031 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1135 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
1138 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
1141 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0, \
1145 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0, \
1157 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1160 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1163 vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
1166 vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
1174 vinstr(0x4C, dst, src1, src2, k66, k0F3A, kW0);
1180 vinstr(0x4C, dst, src1, src2, k66, k0F3A, kW0, AVX2);
1187 vinstr(0x4A, dst, src1, src2, k66, k0F3A, kW0);
1193 vinstr(0x4A, dst, src1, src2, k66, k0F3A, kW0, AVX);
1200 vinstr(0x4B, dst, src1, src2, k66, k0F3A, kW0);
1206 vinstr(0x4B, dst, src1, src2, k66, k0F3A, kW0, AVX);
1214 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1217 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1225 vinstr(0x##opcode, src, xmm0, idst, k##prefix, k##escape1##escape2, kW0); \
1229 vinstr(0x##opcode, src, xmm0, dst, k##prefix, k##escape1##escape2, kW0); \
1462 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG); \
1465 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG); \
1476 vinstr(0x##opcode, ext_reg, dst, src, k##prefix, k##escape, kWIG); \
1483 vinstr(0x16, dst, src1, src2, kNoPrefix, k0F, kWIG);
1486 vinstr(0x12, dst, src1, src2, kNoPrefix, k0F, kWIG);
1489 vinstr(0xe6, dst, xmm0, src, kF3, k0F, kWIG);
1492 vinstr(0x5b, dst, xmm0, src, kF3, k0F, kWIG);
1496 vinstr(0x2a, dst, src1, isrc2, kF2, k0F, kW0);
1499 vinstr(0x2a, dst, src1, src2, kF2, k0F, kW0);
1503 vinstr(0x2a, dst, src1, isrc2, kF3, k0F, kW0);
1506 vinstr(0x2a, dst, src1, src2, kF3, k0F, kW0);
1510 vinstr(0x2a, dst, src1, isrc2, kF3, k0F, kW1);
1513 vinstr(0x2a, dst, src1, src2, kF3, k0F, kW1);
1517 vinstr(0x2a, dst, src1, isrc2, kF2, k0F, kW1);
1520 vinstr(0x2a, dst, src1, src2, kF2, k0F, kW1);
1524 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1528 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1532 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1536 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1540 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1544 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1548 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1552 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1556 vinstr(0x2d, idst, xmm0, src, kF2, k0F, kW0);
1560 vinstr(0x0a, dst, src1, src2, k66, k0F3A, kWIG);
1565 vinstr(0x0a, dst, src1, src2, k66, k0F3A, kWIG);
1570 vinstr(0x0b, dst, src1, src2, k66, k0F3A, kWIG);
1575 vinstr(0x0b, dst, src1, src2, k66, k0F3A, kWIG);
1579 vinstr(0x08, dst, xmm0, src, k66, k0F3A, kWIG);
1583 vinstr(0x08, dst, ymm0, src, k66, k0F3A, kWIG, AVX);
1587 vinstr(0x09, dst, xmm0, src, k66, k0F3A, kWIG);
1591 vinstr(0x09, dst, ymm0, src, k66, k0F3A, kWIG, AVX);
1597 vinstr(op, dst, src1, src2, kF2, k0F, kWIG, AVX);
1716 vinstr(0xF0, dst, xmm0, src, kF2, k0F, kWIG);
1720 vinstr(0x21, dst, src1, src2, k66, k0F3A, kWIG);
1724 vinstr(0x21, dst, src1, src2, k66, k0F3A, kWIG);
1729 vinstr(0x16, src, xmm0, idst, k66, k0F3A, kW1);
1734 vinstr(0x20, dst, src1, isrc, k66, k0F3A, kW0);
1738 vinstr(0x20, dst, src1, src2, k66, k0F3A, kW0);
1743 vinstr(0xc4, dst, src1, isrc, k66, k0F, kW0);
1747 vinstr(0xc4, dst, src1, src2, k66, k0F, kW0);
1752 vinstr(0x22, dst, src1, isrc, k66, k0F3A, kW0);
1756 vinstr(0x22, dst, src1, src2, k66, k0F3A, kW0);
1761 vinstr(0x22, dst, src1, isrc, k66, k0F3A, kW1);
1765 vinstr(0x22, dst, src1, src2, k66, k0F3A, kW1);
1770 vinstr(0x70, dst, xmm0, src, k66, k0F, kWIG);
1774 vinstr(0x70, dst, ymm0, src, k66, k0F, kWIG);
1778 vinstr(0x70, dst, xmm0, src, k66, k0F, kWIG);
1782 vinstr(0x70, dst, ymm0, src, k66, k0F, kWIG);
1786 vinstr(0x70, dst, xmm0, src, kF2, k0F, kWIG);
1790 vinstr(0x70, dst, ymm0, src, kF2, k0F, kWIG);
1794 vinstr(0x70, dst, xmm0, src, kF2, k0F, kWIG);
1798 vinstr(0x70, dst, ymm0, src, kF2, k0F, kWIG);
1802 vinstr(0x70, dst, xmm0, src, kF3, k0F, kWIG);
1806 vinstr(0x70, dst, ymm0, src, kF3, k0F, kWIG);
1810 vinstr(0x70, dst, xmm0, src, kF3, k0F, kWIG);
1814 vinstr(0x70, dst, ymm0, src, kF3, k0F, kWIG);
1820 vinstr(0x0E, dst, src1, src2, k66, k0F3A, kWIG);
1825 vinstr(0x0E, dst, src1, src2, k66, k0F3A, kWIG);
1829 vinstr(0x0E, dst, src1, src2, k66, k0F3A, kWIG);
1833 vinstr(0x0E, dst, src1, src2, k66, k0F3A, kWIG);
1839 vinstr(0x0F, dst, src1, src2, k66, k0F3A, kWIG);
1844 vinstr(0x0F, dst, src1, src2, k66, k0F3A, kWIG);
1848 vinstr(0x0F, dst, src1, src2, k66, k0F3A, kWIG);
1852 vinstr(0x0F, dst, src1, src2, k66, k0F3A, kWIG);
1873 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0, \
2552 void Assembler::vinstr(byte op, YMMRegister dst, YMMRegister src1,
2556 void Assembler::vinstr(byte op, YMMRegister dst, XMMRegister src1,
2560 void Assembler::vinstr(byte op, YMMRegister dst, YMMRegister src1,
2564 void Assembler::vinstr(byte op, YMMRegister dst, YMMRegister src1,
2568 void Assembler::vinstr(byte op, YMMRegister dst, XMMRegister src1,