Lines Matching refs:kW0
483 enum VexW { kW0 = 0x0, kW1 = 0x80, kWIG = kW0 };
994 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
997 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1003 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1006 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1015 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1018 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1028 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1031 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1135 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
1138 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
1141 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0, \
1145 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0, \
1157 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1160 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1163 vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
1166 vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
1174 vinstr(0x4C, dst, src1, src2, k66, k0F3A, kW0);
1180 vinstr(0x4C, dst, src1, src2, k66, k0F3A, kW0, AVX2);
1187 vinstr(0x4A, dst, src1, src2, k66, k0F3A, kW0);
1193 vinstr(0x4A, dst, src1, src2, k66, k0F3A, kW0, AVX);
1200 vinstr(0x4B, dst, src1, src2, k66, k0F3A, kW0);
1206 vinstr(0x4B, dst, src1, src2, k66, k0F3A, kW0, AVX);
1214 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1217 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
1225 vinstr(0x##opcode, src, xmm0, idst, k##prefix, k##escape1##escape2, kW0); \
1229 vinstr(0x##opcode, src, xmm0, dst, k##prefix, k##escape1##escape2, kW0); \
1496 vinstr(0x2a, dst, src1, isrc2, kF2, k0F, kW0);
1499 vinstr(0x2a, dst, src1, src2, kF2, k0F, kW0);
1503 vinstr(0x2a, dst, src1, isrc2, kF3, k0F, kW0);
1506 vinstr(0x2a, dst, src1, src2, kF3, k0F, kW0);
1524 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1528 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1532 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1536 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1556 vinstr(0x2d, idst, xmm0, src, kF2, k0F, kW0);
1734 vinstr(0x20, dst, src1, isrc, k66, k0F3A, kW0);
1738 vinstr(0x20, dst, src1, src2, k66, k0F3A, kW0);
1743 vinstr(0xc4, dst, src1, isrc, k66, k0F, kW0);
1747 vinstr(0xc4, dst, src1, src2, k66, k0F, kW0);
1752 vinstr(0x22, dst, src1, isrc, k66, k0F3A, kW0);
1756 vinstr(0x22, dst, src1, src2, k66, k0F3A, kW0);
1873 vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0, \