Lines Matching defs:escape

944   void sse_instr(XMMRegister dst, XMMRegister src, byte escape, byte opcode);
945 void sse_instr(XMMRegister dst, Operand src, byte escape, byte opcode);
946 #define DECLARE_SSE_INSTRUCTION(instruction, escape, opcode) \
948 sse_instr(dst, src, 0x##escape, 0x##opcode); \
951 sse_instr(dst, src, 0x##escape, 0x##opcode); \
959 void sse2_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape,
961 void sse2_instr(XMMRegister dst, Operand src, byte prefix, byte escape,
963 #define DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode) \
965 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \
968 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \
978 void sse2_instr(XMMRegister reg, byte imm8, byte prefix, byte escape,
981 sse2_instr(ext_reg, reg, prefix, escape, opcode);
985 #define DECLARE_SSE2_SHIFT_IMM(instruction, prefix, escape, opcode, extension) \
987 sse2_instr(reg, imm8, 0x##prefix, 0x##escape, 0x##opcode, 0x##extension); \
992 #define DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
994 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
997 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1000 #define DECLARE_SSE2_PD_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1001 DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1003 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1006 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1012 #define DECLARE_SSE2_PI_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1013 DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1015 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1018 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1024 #define DECLARE_SSE2_SHIFT_AVX_INSTRUCTION(instruction, prefix, escape, \
1026 DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1028 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1031 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2); \
1038 #define DECLARE_SSE2_UNOP_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1417 #define AVX_SSE_UNOP(instr, escape, opcode) \
1433 #define AVX_SSE_BINOP(instr, escape, opcode) \
1460 #define AVX_SCALAR(instr, prefix, escape, opcode) \
1462 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG); \
1465 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG); \
1473 #define AVX_SSE2_SHIFT_IMM(instr, prefix, escape, opcode, extension) \
1476 vinstr(0x##opcode, ext_reg, dst, src, k##prefix, k##escape, kWIG); \