Lines Matching defs:code
2 // Use of this source code is governed by a BSD-style license that can be
119 // code above would set AVX to supported, and SSE4_2 to unsupported, then the
218 int code = reg.code();
223 if (base_code == rsp.code()) {
227 // Index code (including REX.X) of 0x04 (rsp) means no index register.
228 if (index_code != rsp.code() && index_code == code) return true;
229 // Add REX.B to get the full base register code.
232 if (base_code == rbp.code() && ((data_.buf[0] & 0xC0) == 0)) return false;
233 return code == base_code;
237 if (base_code == rbp.code() && ((data_.buf[0] & 0xC0) == 0)) return false;
239 return code == base_code;
381 // metadata table builders (safepoint, handler, constant pool, code
396 // Set up code descriptor.
598 void Assembler::emit_operand(int code, Operand adr) {
599 DCHECK(is_uint3(code));
605 *pc_++ = adr.data().buf[0] | code << 3;
1378 // when the full code generator recompiles code for debugging, some places
2349 emit_operand(rax, op); // Operation code 0
3546 XMMRegister isrc = XMMRegister::from_code(src.code());
3563 XMMRegister idst = XMMRegister::from_code(dst.code());
3572 XMMRegister isrc = XMMRegister::from_code(src.code());
3589 XMMRegister idst = XMMRegister::from_code(dst.code());
3849 XMMRegister idst = XMMRegister::from_code(dst.code());
4409 Register ireg = Register::from_code(reg.code());