Lines Matching refs:opnd
2729 void TurboAssembler::MulS64(Register dst, const Operand& opnd) {
2730 msgfi(dst, opnd);
2735 void TurboAssembler::MulS64(Register dst, const MemOperand& opnd) {
2736 msg(dst, opnd);
2754 // Add 32-bit (Register dst = Register dst + Immediate opnd)
2755 void TurboAssembler::AddS32(Register dst, const Operand& opnd) {
2756 if (is_int16(opnd.immediate()))
2757 ahi(dst, opnd);
2759 afi(dst, opnd);
2762 // Add Pointer Size (Register dst = Register dst + Immediate opnd)
2763 void TurboAssembler::AddS64(Register dst, const Operand& opnd) {
2764 if (is_int16(opnd.immediate()))
2765 aghi(dst, opnd);
2767 agfi(dst, opnd);
2770 void TurboAssembler::AddS32(Register dst, Register src, int32_t opnd) {
2771 AddS32(dst, src, Operand(opnd));
2774 // Add 32-bit (Register dst = Register src + Immediate opnd)
2775 void TurboAssembler::AddS32(Register dst, Register src, const Operand& opnd) {
2777 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
2778 ahik(dst, src, opnd);
2783 AddS32(dst, opnd);
2786 void TurboAssembler::AddS64(Register dst, Register src, int32_t opnd) {
2787 AddS64(dst, src, Operand(opnd));
2790 // Add Pointer Size (Register dst = Register src + Immediate opnd)
2791 void TurboAssembler::AddS64(Register dst, Register src, const Operand& opnd) {
2793 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
2794 aghik(dst, src, opnd);
2799 AddS64(dst, opnd);
2843 void TurboAssembler::AddS32(Register dst, const MemOperand& opnd) {
2844 DCHECK(is_int20(opnd.offset()));
2845 if (is_uint12(opnd.offset()))
2846 a(dst, opnd);
2848 ay(dst, opnd);
2852 void TurboAssembler::AddS64(Register dst, const MemOperand& opnd) {
2853 DCHECK(is_int20(opnd.offset()));
2854 ag(dst, opnd);
2858 void TurboAssembler::AddS32(const MemOperand& opnd, const Operand& imm) {
2860 DCHECK(is_int20(opnd.offset()));
2862 asi(opnd, imm);
2866 void TurboAssembler::AddS64(const MemOperand& opnd, const Operand& imm) {
2868 DCHECK(is_int20(opnd.offset()));
2870 agsi(opnd, imm);
2893 // Add Logical 32-bit (Register dst = Register dst + Immediate opnd)
2898 // Add Logical Pointer Size (Register dst = Register dst + Immediate opnd)
2923 void TurboAssembler::AddU32(Register dst, const MemOperand& opnd) {
2924 DCHECK(is_int20(opnd.offset()));
2925 if (is_uint12(opnd.offset()))
2926 al_z(dst, opnd);
2928 aly(dst, opnd);
2932 void TurboAssembler::AddU64(Register dst, const MemOperand& opnd) {
2933 DCHECK(is_int20(opnd.offset()));
2934 alg(dst, opnd);
2958 // Subtract 32-bit (Register dst = Register dst - Immediate opnd)
2963 // Subtract Pointer Size (Register dst = Register dst - Immediate opnd)
2972 // Subtract 32-bit (Register dst = Register src - Immediate opnd)
2981 // Subtract Pointer Sized (Register dst = Register src - Immediate opnd)
3033 void TurboAssembler::SubS32(Register dst, const MemOperand& opnd) {
3034 DCHECK(is_int20(opnd.offset()));
3035 if (is_uint12(opnd.offset()))
3036 s(dst, opnd);
3038 sy(dst, opnd);
3042 void TurboAssembler::SubS64(Register dst, const MemOperand& opnd) {
3044 sg(dst, opnd);
3046 SubS32(dst, opnd);
3062 const MemOperand& opnd) {
3064 laa(dst, dst, opnd);
3068 const MemOperand& opnd) {
3070 laag(dst, dst, opnd);
3078 void TurboAssembler::SubU32(Register dst, const MemOperand& opnd) {
3079 DCHECK(is_int20(opnd.offset()));
3080 if (is_uint12(opnd.offset()))
3081 sl(dst, opnd);
3083 sly(dst, opnd);
3087 void TurboAssembler::SubU64(Register dst, const MemOperand& opnd) {
3088 DCHECK(is_int20(opnd.offset()));
3090 slgf(dst, opnd);
3092 SubU32(dst, opnd);
3141 void TurboAssembler::And(Register dst, const MemOperand& opnd) {
3142 DCHECK(is_int20(opnd.offset()));
3143 if (is_uint12(opnd.offset()))
3144 n(dst, opnd);
3146 ny(dst, opnd);
3150 void TurboAssembler::AndP(Register dst, const MemOperand& opnd) {
3151 DCHECK(is_int20(opnd.offset()));
3153 ng(dst, opnd);
3155 And(dst, opnd);
3160 void TurboAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); }
3163 void TurboAssembler::AndP(Register dst, const Operand& opnd) {
3165 intptr_t value = opnd.immediate();
3172 And(dst, opnd);
3177 void TurboAssembler::And(Register dst, Register src, const Operand& opnd) {
3179 nilf(dst, opnd);
3183 void TurboAssembler::AndP(Register dst, Register src, const Operand& opnd) {
3185 intptr_t value = opnd.immediate();
3220 AndP(dst, opnd);
3264 void TurboAssembler::Or(Register dst, const MemOperand& opnd) {
3265 DCHECK(is_int20(opnd.offset()));
3266 if (is_uint12(opnd.offset()))
3267 o(dst, opnd);
3269 oy(dst, opnd);
3273 void TurboAssembler::OrP(Register dst, const MemOperand& opnd) {
3274 DCHECK(is_int20(opnd.offset()));
3276 og(dst, opnd);
3278 Or(dst, opnd);
3283 void TurboAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); }
3286 void TurboAssembler::OrP(Register dst, const Operand& opnd) {
3288 intptr_t value = opnd.immediate();
3295 Or(dst, opnd);
3300 void TurboAssembler::Or(Register dst, Register src, const Operand& opnd) {
3302 oilf(dst, opnd);
3306 void TurboAssembler::OrP(Register dst, Register src, const Operand& opnd) {
3308 OrP(dst, opnd);
3352 void TurboAssembler::Xor(Register dst, const MemOperand& opnd) {
3353 DCHECK(is_int20(opnd.offset()));
3354 if (is_uint12(opnd.offset()))
3355 x(dst, opnd);
3357 xy(dst, opnd);
3361 void TurboAssembler::XorP(Register dst, const MemOperand& opnd) {
3362 DCHECK(is_int20(opnd.offset()));
3364 xg(dst, opnd);
3366 Xor(dst, opnd);
3371 void TurboAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); }
3374 void TurboAssembler::XorP(Register dst, const Operand& opnd) {
3376 intptr_t value = opnd.immediate();
3380 Xor(dst, opnd);
3385 void TurboAssembler::Xor(Register dst, Register src, const Operand& opnd) {
3387 xilf(dst, opnd);
3391 void TurboAssembler::XorP(Register dst, Register src, const Operand& opnd) {
3393 XorP(dst, opnd);
3440 void TurboAssembler::CmpS32(Register dst, const Operand& opnd) {
3441 if (opnd.rmode() == RelocInfo::NO_INFO) {
3442 intptr_t value = opnd.immediate();
3444 chi(dst, opnd);
3446 cfi(dst, opnd);
3449 RecordRelocInfo(opnd.rmode(), opnd.immediate());
3450 cfi(dst, opnd);
3456 void TurboAssembler::CmpS64(Register dst, const Operand& opnd) {
3457 if (opnd.rmode() == RelocInfo::NO_INFO) {
3458 cgfi(dst, opnd);
3460 mov(r0, opnd); // Need to generate 64-bit relocation
3466 void TurboAssembler::CmpS32(Register dst, const MemOperand& opnd) {
3468 DCHECK(is_int20(opnd.offset()));
3469 if (is_uint12(opnd.offset()))
3470 c(dst, opnd);
3472 cy(dst, opnd);
3476 void TurboAssembler::CmpS64(Register dst, const MemOperand& opnd) {
3478 DCHECK(is_int20(opnd.offset()));
3479 cg(dst, opnd);
3484 const MemOperand& opnd) {
3485 if (is_uint12(opnd.offset())) {
3486 cs(old_val, new_val, opnd);
3488 csy(old_val, new_val, opnd);
3493 const MemOperand& opnd) {
3494 DCHECK(is_int20(opnd.offset()));
3495 csg(old_val, new_val, opnd);
3515 void TurboAssembler::CmpU32(Register dst, const Operand& opnd) {
3516 clfi(dst, opnd);
3520 void TurboAssembler::CmpU64(Register dst, const Operand& opnd) {
3522 DCHECK_EQ(static_cast<uint32_t>(opnd.immediate() >> 32), 0);
3523 clgfi(dst, opnd);
3525 CmpU32(dst, opnd);
3530 void TurboAssembler::CmpU32(Register dst, const MemOperand& opnd) {
3532 DCHECK(is_int20(opnd.offset()));
3533 if (is_uint12(opnd.offset()))
3534 cl(dst, opnd);
3536 cly(dst, opnd);
3540 void TurboAssembler::CmpU64(Register dst, const MemOperand& opnd) {
3542 DCHECK(is_int20(opnd.offset()));
3544 clg(dst, opnd);
3546 CmpU32(dst, opnd);
3550 void TurboAssembler::Branch(Condition c, const Operand& opnd) {
3551 intptr_t value = opnd.immediate();
3553 brc(c, opnd);
3555 brcl(c, opnd);
3626 void TurboAssembler::StoreU64(const MemOperand& mem, const Operand& opnd,
3629 DCHECK_EQ(opnd.rmode(), RelocInfo::NO_INFO);
3633 mem.getIndexRegister() == r0 && is_int16(opnd.immediate())) {
3634 mvghi(mem, opnd);
3636 mov(scratch, opnd);
3835 void TurboAssembler::LoadS32LE(Register dst, const MemOperand& opnd,
3837 lrv(dst, opnd);
3841 void TurboAssembler::LoadU32LE(Register dst, const MemOperand& opnd,
3843 lrv(dst, opnd);
3847 void TurboAssembler::LoadU16LE(Register dst, const MemOperand& opnd) {
3848 lrvh(dst, opnd);
3852 void TurboAssembler::LoadS16LE(Register dst, const MemOperand& opnd) {
3853 lrvh(dst, opnd);
3857 void TurboAssembler::LoadV128LE(DoubleRegister dst, const MemOperand& opnd,
3860 is_uint12(opnd.offset());
3862 vlbr(dst, opnd, Condition(4));
3864 lrvg(scratch0, opnd);
3866 MemOperand(opnd.rx(), opnd.rb(), opnd.offset() + kSystemPointerSize));
3871 void TurboAssembler::LoadF64LE(DoubleRegister dst, const MemOperand& opnd,
3873 lrvg(scratch, opnd);
3877 void TurboAssembler::LoadF32LE(DoubleRegister dst, const MemOperand& opnd,
3879 lrv(scratch, opnd);
3920 void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd,
3922 DCHECK(is_uint12(opnd.offset()));
3924 strvg(scratch, opnd);
3927 void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd,
3929 DCHECK(is_uint12(opnd.offset()));
3932 strv(scratch, opnd);
3956 void TurboAssembler::LoadS32LE(Register dst, const MemOperand& opnd,
3958 LoadS32(dst, opnd, scratch);
3961 void TurboAssembler::LoadU32LE(Register dst, const MemOperand& opnd,
3963 LoadU32(dst, opnd, scratch);
3966 void TurboAssembler::LoadU16LE(Register dst, const MemOperand& opnd) {
3967 LoadU16(dst, opnd);
3970 void TurboAssembler::LoadS16LE(Register dst, const MemOperand& opnd) {
3971 LoadS16(dst, opnd);
3974 void TurboAssembler::LoadV128LE(DoubleRegister dst, const MemOperand& opnd,
3977 LoadV128(dst, opnd, scratch0);
3980 void TurboAssembler::LoadF64LE(DoubleRegister dst, const MemOperand& opnd,
3983 LoadF64(dst, opnd);
3986 void TurboAssembler::LoadF32LE(DoubleRegister dst, const MemOperand& opnd,
3989 LoadF32(dst, opnd);
4007 void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd,
4009 StoreF64(src, opnd);
4012 void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd,
4014 StoreF32(src, opnd);
4230 void TurboAssembler::AddFloat32(DoubleRegister dst, const MemOperand& opnd,
4232 if (is_uint12(opnd.offset())) {
4233 aeb(dst, opnd);
4235 ley(scratch, opnd);
4240 void TurboAssembler::AddFloat64(DoubleRegister dst, const MemOperand& opnd,
4242 if (is_uint12(opnd.offset())) {
4243 adb(dst, opnd);
4245 ldy(scratch, opnd);
4250 void TurboAssembler::SubFloat32(DoubleRegister dst, const MemOperand& opnd,
4252 if (is_uint12(opnd.offset())) {
4253 seb(dst, opnd);
4255 ley(scratch, opnd);
4260 void TurboAssembler::SubFloat64(DoubleRegister dst, const MemOperand& opnd,
4262 if (is_uint12(opnd.offset())) {
4263 sdb(dst, opnd);
4265 ldy(scratch, opnd);
4270 void TurboAssembler::MulFloat32(DoubleRegister dst, const MemOperand& opnd,
4272 if (is_uint12(opnd.offset())) {
4273 meeb(dst, opnd);
4275 ley(scratch, opnd);
4280 void TurboAssembler::MulFloat64(DoubleRegister dst, const MemOperand& opnd,
4282 if (is_uint12(opnd.offset())) {
4283 mdb(dst, opnd);
4285 ldy(scratch, opnd);
4290 void TurboAssembler::DivFloat32(DoubleRegister dst, const MemOperand& opnd,
4292 if (is_uint12(opnd.offset())) {
4293 deb(dst, opnd);
4295 ley(scratch, opnd);
4300 void TurboAssembler::DivFloat64(DoubleRegister dst, const MemOperand& opnd,
4302 if (is_uint12(opnd.offset())) {
4303 ddb(dst, opnd);
4305 ldy(scratch, opnd);
4310 void TurboAssembler::LoadF32AsF64(DoubleRegister dst, const MemOperand& opnd,
4312 if (is_uint12(opnd.offset())) {
4313 ldeb(dst, opnd);
4315 ley(scratch, opnd);