Lines Matching defs:imm
2858 void TurboAssembler::AddS32(const MemOperand& opnd, const Operand& imm) {
2859 DCHECK(is_int8(imm.immediate()));
2862 asi(opnd, imm);
2866 void TurboAssembler::AddS64(const MemOperand& opnd, const Operand& imm) {
2867 DCHECK(is_int8(imm.immediate()));
2870 agsi(opnd, imm);
2894 void TurboAssembler::AddU32(Register dst, const Operand& imm) {
2895 alfi(dst, imm);
2899 void TurboAssembler::AddU64(Register dst, const Operand& imm) {
2900 algfi(dst, imm);
2959 void TurboAssembler::SubS32(Register dst, const Operand& imm) {
2960 AddS32(dst, Operand(-(imm.immediate())));
2964 void TurboAssembler::SubS64(Register dst, const Operand& imm) {
2965 AddS64(dst, Operand(-(imm.immediate())));
2968 void TurboAssembler::SubS32(Register dst, Register src, int32_t imm) {
2969 SubS32(dst, src, Operand(imm));
2973 void TurboAssembler::SubS32(Register dst, Register src, const Operand& imm) {
2974 AddS32(dst, src, Operand(-(imm.immediate())));
2977 void TurboAssembler::SubS64(Register dst, Register src, int32_t imm) {
2978 SubS64(dst, src, Operand(imm));
2982 void TurboAssembler::SubS64(Register dst, Register src, const Operand& imm) {
2983 AddS64(dst, src, Operand(-(imm.immediate())));
3159 // AND 32-bit - dst = dst & imm
3162 // AND Pointer Size - dst = dst & imm
3176 // AND 32-bit - dst = src & imm
3182 // AND Pointer Size - dst = src & imm
3282 // OR 32-bit - dst = dst & imm
3285 // OR Pointer Size - dst = dst & imm
3299 // OR 32-bit - dst = src & imm
3305 // OR Pointer Size - dst = src & imm
3370 // XOR 32-bit - dst = dst & imm
3373 // XOR Pointer Size - dst = dst & imm
3384 // XOR 32-bit - dst = src & imm
3390 // XOR Pointer Size - dst = src & imm