Lines Matching defs:const
285 Register exclusion3) const {
338 const uint32_t offset = FixedArray::kHeaderSize +
407 void TurboAssembler::Jump(const ExternalReference& reference) {
555 void TurboAssembler::Move(Register dst, const MemOperand& src) {
560 void TurboAssembler::MoveChar(const MemOperand& opnd1, const MemOperand& opnd2,
561 const Operand& length) {
566 void TurboAssembler::CompareLogicalChar(const MemOperand& opnd1,
567 const MemOperand& opnd2,
568 const Operand& length) {
573 void TurboAssembler::ExclusiveOrChar(const MemOperand& opnd1,
574 const MemOperand& opnd2,
575 const Operand& length) {
581 const Operand& startBit,
582 const Operand& endBit,
583 const Operand& shiftAmt,
786 void TurboAssembler::LoadTaggedPointerField(const Register& destination,
787 const MemOperand& field_operand,
788 const Register& scratch) {
796 void TurboAssembler::LoadAnyTaggedField(const Register& destination,
797 const MemOperand& field_operand,
798 const Register& scratch) {
806 void TurboAssembler::SmiUntag(Register dst, const MemOperand& src) {
815 void TurboAssembler::SmiUntagField(Register dst, const MemOperand& src) {
819 void TurboAssembler::StoreTaggedField(const Register& value,
820 const MemOperand& dst_field_operand,
821 const Register& scratch) {
1119 void TurboAssembler::CanonicalizeNaN(const DoubleRegister dst,
1120 const DoubleRegister src) {
1172 void TurboAssembler::ConvertFloat32ToInt64(const Register dst,
1173 const DoubleRegister double_input,
1194 void TurboAssembler::ConvertDoubleToInt64(const Register dst,
1195 const DoubleRegister double_input,
1216 void TurboAssembler::ConvertDoubleToInt32(const Register dst,
1217 const DoubleRegister double_input,
1242 void TurboAssembler::ConvertFloat32ToInt32(const Register result,
1243 const DoubleRegister double_input,
1269 const Register result, const DoubleRegister double_input,
1294 const Register result, const DoubleRegister double_input,
1316 const Register dst, const DoubleRegister double_input,
1338 const Register dst, const DoubleRegister double_input,
1531 const int frame_alignment = TurboAssembler::ActivationFrameAlignment();
1566 const int kNumRegs = kNumCallerSavedDoubles;
1601 void TurboAssembler::MovFromFloatResult(const DoubleRegister dst) {
1605 void TurboAssembler::MovFromFloatParameter(const DoubleRegister dst) {
1874 const Register temp = type_reg == no_reg ? r0 : type_reg;
1968 void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
1994 const Runtime::Function* function = Runtime::FunctionForId(fid);
2002 void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin,
2069 const char* msg = GetAbortReason(reason);
2230 static const int kRegisterPassedArguments = 5;
2426 const RegisterConfiguration* config = RegisterConfiguration::Default();
2438 void TurboAssembler::mov(Register dst, const Operand& src) {
2483 void TurboAssembler::MulS32(Register dst, const MemOperand& src1) {
2495 void TurboAssembler::MulS32(Register dst, const Operand& src1) {
2507 const MemOperand& src2) {
2519 const Operand& src2) {
2533 const MemOperand& src2) {
2542 const Operand& src2) {
2559 const MemOperand& src2) {
2575 const Operand& src2) {
2589 const MemOperand& src2) {
2608 const MemOperand& src2) {
2626 const MemOperand& src2) {
2645 const MemOperand& src2) {
2663 const MemOperand& src2) {
2682 const MemOperand& src2) {
2700 const MemOperand& src2) {
2719 const MemOperand& src2) {
2729 void TurboAssembler::MulS64(Register dst, const Operand& opnd) {
2735 void TurboAssembler::MulS64(Register dst, const MemOperand& opnd) {
2742 void TurboAssembler::Sqrt(DoubleRegister result, const MemOperand& input) {
2755 void TurboAssembler::AddS32(Register dst, const Operand& opnd) {
2763 void TurboAssembler::AddS64(Register dst, const Operand& opnd) {
2775 void TurboAssembler::AddS32(Register dst, Register src, const Operand& opnd) {
2791 void TurboAssembler::AddS64(Register dst, Register src, const Operand& opnd) {
2843 void TurboAssembler::AddS32(Register dst, const MemOperand& opnd) {
2852 void TurboAssembler::AddS64(Register dst, const MemOperand& opnd) {
2858 void TurboAssembler::AddS32(const MemOperand& opnd, const Operand& imm) {
2866 void TurboAssembler::AddS64(const MemOperand& opnd, const Operand& imm) {
2894 void TurboAssembler::AddU32(Register dst, const Operand& imm) {
2899 void TurboAssembler::AddU64(Register dst, const Operand& imm) {
2923 void TurboAssembler::AddU32(Register dst, const MemOperand& opnd) {
2932 void TurboAssembler::AddU64(Register dst, const MemOperand& opnd) {
2959 void TurboAssembler::SubS32(Register dst, const Operand& imm) {
2964 void TurboAssembler::SubS64(Register dst, const Operand& imm) {
2973 void TurboAssembler::SubS32(Register dst, Register src, const Operand& imm) {
2982 void TurboAssembler::SubS64(Register dst, Register src, const Operand& imm) {
3033 void TurboAssembler::SubS32(Register dst, const MemOperand& opnd) {
3042 void TurboAssembler::SubS64(Register dst, const MemOperand& opnd) {
3062 const MemOperand& opnd) {
3068 const MemOperand& opnd) {
3078 void TurboAssembler::SubU32(Register dst, const MemOperand& opnd) {
3087 void TurboAssembler::SubU64(Register dst, const MemOperand& opnd) {
3141 void TurboAssembler::And(Register dst, const MemOperand& opnd) {
3150 void TurboAssembler::AndP(Register dst, const MemOperand& opnd) {
3160 void TurboAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); }
3163 void TurboAssembler::AndP(Register dst, const Operand& opnd) {
3177 void TurboAssembler::And(Register dst, Register src, const Operand& opnd) {
3183 void TurboAssembler::AndP(Register dst, Register src, const Operand& opnd) {
3264 void TurboAssembler::Or(Register dst, const MemOperand& opnd) {
3273 void TurboAssembler::OrP(Register dst, const MemOperand& opnd) {
3283 void TurboAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); }
3286 void TurboAssembler::OrP(Register dst, const Operand& opnd) {
3300 void TurboAssembler::Or(Register dst, Register src, const Operand& opnd) {
3306 void TurboAssembler::OrP(Register dst, Register src, const Operand& opnd) {
3352 void TurboAssembler::Xor(Register dst, const MemOperand& opnd) {
3361 void TurboAssembler::XorP(Register dst, const MemOperand& opnd) {
3371 void TurboAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); }
3374 void TurboAssembler::XorP(Register dst, const Operand& opnd) {
3385 void TurboAssembler::Xor(Register dst, Register src, const Operand& opnd) {
3391 void TurboAssembler::XorP(Register dst, Register src, const Operand& opnd) {
3440 void TurboAssembler::CmpS32(Register dst, const Operand& opnd) {
3456 void TurboAssembler::CmpS64(Register dst, const Operand& opnd) {
3466 void TurboAssembler::CmpS32(Register dst, const MemOperand& opnd) {
3476 void TurboAssembler::CmpS64(Register dst, const MemOperand& opnd) {
3484 const MemOperand& opnd) {
3493 const MemOperand& opnd) {
3515 void TurboAssembler::CmpU32(Register dst, const Operand& opnd) {
3520 void TurboAssembler::CmpU64(Register dst, const Operand& opnd) {
3530 void TurboAssembler::CmpU32(Register dst, const MemOperand& opnd) {
3540 void TurboAssembler::CmpU64(Register dst, const MemOperand& opnd) {
3550 void TurboAssembler::Branch(Condition c, const Operand& opnd) {
3598 void TurboAssembler::LoadU64(Register dst, const MemOperand& mem,
3613 void TurboAssembler::StoreU64(Register src, const MemOperand& mem,
3626 void TurboAssembler::StoreU64(const MemOperand& mem, const Operand& opnd,
3642 const MemOperand& mem) {
3657 const MemOperand& mem) {
3672 const MemOperand& mem) {
3682 const MemOperand& mem) {
3701 void TurboAssembler::LoadS32(Register dst, const MemOperand& mem,
3737 void TurboAssembler::LoadU32(Register dst, const MemOperand& mem,
3778 void TurboAssembler::LoadU16(Register dst, const MemOperand& mem) {
3795 void TurboAssembler::LoadS8(Register dst, const MemOperand& mem) {
3812 void TurboAssembler::LoadU8(Register dst, const MemOperand& mem) {
3830 void TurboAssembler::LoadU64LE(Register dst, const MemOperand& mem,
3835 void TurboAssembler::LoadS32LE(Register dst, const MemOperand& opnd,
3841 void TurboAssembler::LoadU32LE(Register dst, const MemOperand& opnd,
3847 void TurboAssembler::LoadU16LE(Register dst, const MemOperand& opnd) {
3852 void TurboAssembler::LoadS16LE(Register dst, const MemOperand& opnd) {
3857 void TurboAssembler::LoadV128LE(DoubleRegister dst, const MemOperand& opnd,
3871 void TurboAssembler::LoadF64LE(DoubleRegister dst, const MemOperand& opnd,
3877 void TurboAssembler::LoadF32LE(DoubleRegister dst, const MemOperand& opnd,
3884 void TurboAssembler::StoreU64LE(Register src, const MemOperand& mem,
3896 void TurboAssembler::StoreU32LE(Register src, const MemOperand& mem,
3908 void TurboAssembler::StoreU16LE(Register src, const MemOperand& mem,
3920 void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd,
3927 void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd,
3935 void TurboAssembler::StoreV128LE(Simd128Register src, const MemOperand& mem,
3951 void TurboAssembler::LoadU64LE(Register dst, const MemOperand& mem,
3956 void TurboAssembler::LoadS32LE(Register dst, const MemOperand& opnd,
3961 void TurboAssembler::LoadU32LE(Register dst, const MemOperand& opnd,
3966 void TurboAssembler::LoadU16LE(Register dst, const MemOperand& opnd) {
3970 void TurboAssembler::LoadS16LE(Register dst, const MemOperand& opnd) {
3974 void TurboAssembler::LoadV128LE(DoubleRegister dst, const MemOperand& opnd,
3980 void TurboAssembler::LoadF64LE(DoubleRegister dst, const MemOperand& opnd,
3986 void TurboAssembler::LoadF32LE(DoubleRegister dst, const MemOperand& opnd,
3992 void TurboAssembler::StoreU64LE(Register src, const MemOperand& mem,
3997 void TurboAssembler::StoreU32LE(Register src, const MemOperand& mem,
4002 void TurboAssembler::StoreU16LE(Register src, const MemOperand& mem,
4007 void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd,
4012 void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd,
4017 void TurboAssembler::StoreV128LE(Simd128Register src, const MemOperand& mem,
4039 void TurboAssembler::LoadAndTest32(Register dst, const MemOperand& mem) {
4044 void TurboAssembler::LoadAndTestP(Register dst, const MemOperand& mem) {
4063 void TurboAssembler::LoadF64(DoubleRegister dst, const MemOperand& mem) {
4073 void TurboAssembler::LoadF32(DoubleRegister dst, const MemOperand& mem) {
4082 void TurboAssembler::LoadV128(Simd128Register dst, const MemOperand& mem,
4095 void TurboAssembler::StoreF64(DoubleRegister dst, const MemOperand& mem) {
4104 void TurboAssembler::StoreF32(DoubleRegister src, const MemOperand& mem) {
4112 void TurboAssembler::StoreV128(Simd128Register src, const MemOperand& mem,
4230 void TurboAssembler::AddFloat32(DoubleRegister dst, const MemOperand& opnd,
4240 void TurboAssembler::AddFloat64(DoubleRegister dst, const MemOperand& opnd,
4250 void TurboAssembler::SubFloat32(DoubleRegister dst, const MemOperand& opnd,
4260 void TurboAssembler::SubFloat64(DoubleRegister dst, const MemOperand& opnd,
4270 void TurboAssembler::MulFloat32(DoubleRegister dst, const MemOperand& opnd,
4280 void TurboAssembler::MulFloat64(DoubleRegister dst, const MemOperand& opnd,
4290 void TurboAssembler::DivFloat32(DoubleRegister dst, const MemOperand& opnd,
4300 void TurboAssembler::DivFloat64(DoubleRegister dst, const MemOperand& opnd,
4310 void TurboAssembler::LoadF32AsF64(DoubleRegister dst, const MemOperand& opnd,
4322 void TurboAssembler::StoreU32(Register src, const MemOperand& mem,
4363 void TurboAssembler::LoadS16(Register dst, const MemOperand& mem,
4391 void TurboAssembler::StoreU16(Register src, const MemOperand& mem,
4409 void TurboAssembler::StoreU8(Register src, const MemOperand& mem,
4427 const Operand& val) {
4433 const Operand& val2) {
4447 const Operand& val) {
4453 const Operand& val2) {
4459 const Operand& val) {
4465 const Operand& val2) {
4478 const Operand& val2) {
4484 const Operand& val) {
4490 const Operand& val) {
4496 const Operand& val2) {
4510 const Operand& val) {
4516 const Operand& val2) {
4522 const Operand& val) {
5404 const Operand& src2, Register scratch1, \
6021 Simd128Register dst, const MemOperand& mem, Register scratch) { \
6044 Simd128Register dst, const MemOperand& mem, Register scratch) { \
6057 void TurboAssembler::LoadV32ZeroLE(Simd128Register dst, const MemOperand& mem,
6068 void TurboAssembler::LoadV64ZeroLE(Simd128Register dst, const MemOperand& mem,
6087 const MemOperand& mem, int lane, \
6108 const MemOperand& mem, int lane, \