Lines Matching defs:src
9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h"
11 #include "src/codegen/assembler-inl.h"
12 #include "src/codegen/callable.h"
13 #include "src/codegen/code-factory.h"
14 #include "src/codegen/external-reference-table.h"
15 #include "src/codegen/interface-descriptors-inl.h"
16 #include "src/codegen/macro-assembler.h"
17 #include "src/codegen/register-configuration.h"
18 #include "src/debug/debug.h"
19 #include "src/deoptimizer/deoptimizer.h"
20 #include "src/execution/frames-inl.h"
21 #include "src/heap/memory-chunk.h"
22 #include "src/init/bootstrapper.h"
23 #include "src/logging/counters.h"
24 #include "src/objects/heap-number.h"
25 #include "src/runtime/runtime.h"
26 #include "src/snapshot/snapshot.h"
27 #include "src/wasm/wasm-code-manager.h"
32 #include "src/codegen/riscv64/macro-assembler-riscv64.h"
1459 void TurboAssembler::LoadFloat(FPURegister fd, const MemOperand& src) {
1463 AlignedLoadHelper(fd, src, fn);
1466 void TurboAssembler::StoreFloat(FPURegister fs, const MemOperand& src) {
1470 AlignedStoreHelper(fs, src, fn);
1473 void TurboAssembler::LoadDouble(FPURegister fd, const MemOperand& src) {
1486 AlignedLoadHelper(fd, src, fn);
1489 void TurboAssembler::StoreDouble(FPURegister fs, const MemOperand& src) {
1502 AlignedStoreHelper(fs, src, fn);
1886 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1887 tasm->fcvt_wu_d(dst, src, RTZ);
1893 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1894 tasm->fcvt_w_d(dst, src, RTZ);
1900 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1901 tasm->fcvt_wu_s(dst, src, RTZ);
1907 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1908 tasm->fcvt_w_s(dst, src, RTZ);
1914 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1915 tasm->fcvt_lu_d(dst, src, RTZ);
1921 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1922 tasm->fcvt_l_d(dst, src, RTZ);
1928 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1929 tasm->fcvt_lu_s(dst, src, RTZ);
1935 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1936 tasm->fcvt_l_s(dst, src, RTZ);
1942 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1943 tasm->fcvt_w_s(dst, src, RNE);
1949 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1950 tasm->fcvt_w_d(dst, src, RNE);
1956 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1957 tasm->fcvt_w_s(dst, src, RUP);
1963 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1964 tasm->fcvt_w_d(dst, src, RUP);
1970 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1971 tasm->fcvt_w_s(dst, src, RDN);
1977 rd, fs, result, [](TurboAssembler* tasm, Register dst, FPURegister src) {
1978 tasm->fcvt_w_d(dst, src, RDN);
1988 void TurboAssembler::RoundHelper(FPURegister dst, FPURegister src,
1995 // Need at least two FPRs, so check against dst == src == fpu_scratch
1996 DCHECK(!(dst == src && dst == fpu_scratch));
2011 fmv_x_d(scratch, src);
2013 fmv_x_w(scratch, src);
2018 // if src is NaN/+-Infinity/+-Zero or if the exponent is larger than # of bits
2019 // in mantissa, the result is the same as src, so move src to dest (to avoid
2021 if (dst != src) {
2023 fmv_d(dst, src);
2025 fmv_s(dst, src);
2036 // payload is 1. In RISC-V, feq_d will set scratch to 0 if src is a NaN. If
2037 // src is not a NaN, branch to the label and do nothing, but if it is,
2040 feq_d(scratch, src, src);
2042 fmin_d(dst, src, src);
2044 feq_s(scratch, src, src);
2046 fmin_s(dst, src, src);
2063 // old_src holds the original input, needed for the case of src == dst
2064 FPURegister old_src = src;
2065 if (src == dst) {
2067 Move(fpu_scratch, src);
2079 fcvt_l_d(scratch, src, frm);
2082 fcvt_w_s(scratch, src, frm);
2108 void TurboAssembler::RoundHelper(VRegister dst, VRegister src, Register scratch,
2111 // if src is NaN/+-Infinity/+-Zero or if the exponent is larger than # of bits
2112 // in mantissa, the result is the same as src, so move src to dest (to avoid
2137 vsll_vx(v_scratch, src, scratch);
2144 vmv_vv(dst, src);
2145 if (dst == src) {
2146 vmv_vv(v_scratch, src);
2148 vfcvt_x_f_v(dst, src, MaskType::Mask);
2155 if (dst == src) {
2158 vfsngj_vv(dst, dst, src);
2202 void TurboAssembler::Floor_d_d(FPURegister dst, FPURegister src,
2204 RoundHelper<double>(dst, src, fpu_scratch, RDN);
2207 void TurboAssembler::Ceil_d_d(FPURegister dst, FPURegister src,
2209 RoundHelper<double>(dst, src, fpu_scratch, RUP);
2212 void TurboAssembler::Trunc_d_d(FPURegister dst, FPURegister src,
2214 RoundHelper<double>(dst, src, fpu_scratch, RTZ);
2217 void TurboAssembler::Round_d_d(FPURegister dst, FPURegister src,
2219 RoundHelper<double>(dst, src, fpu_scratch, RNE);
2222 void TurboAssembler::Floor_s_s(FPURegister dst, FPURegister src,
2224 RoundHelper<float>(dst, src, fpu_scratch, RDN);
2227 void TurboAssembler::Ceil_s_s(FPURegister dst, FPURegister src,
2229 RoundHelper<float>(dst, src, fpu_scratch, RUP);
2232 void TurboAssembler::Trunc_s_s(FPURegister dst, FPURegister src,
2234 RoundHelper<float>(dst, src, fpu_scratch, RTZ);
2237 void TurboAssembler::Round_s_s(FPURegister dst, FPURegister src,
2239 RoundHelper<float>(dst, src, fpu_scratch, RNE);
2416 void TurboAssembler::LoadFPRImmediate(FPURegister dst, uint32_t src) {
2418 if (src == bit_cast<uint32_t>(0.0f) && has_single_zero_reg_set_) {
2420 } else if (src == bit_cast<uint32_t>(-0.0f) && has_single_zero_reg_set_) {
2424 DCHECK(src == bit_cast<uint32_t>(0.0f));
2431 li(scratch, Operand(static_cast<int32_t>(src)));
2437 void TurboAssembler::LoadFPRImmediate(FPURegister dst, uint64_t src) {
2439 if (src == bit_cast<uint64_t>(0.0) && has_double_zero_reg_set_) {
2441 } else if (src == bit_cast<uint64_t>(-0.0) && has_double_zero_reg_set_) {
2445 DCHECK(src == bit_cast<uint64_t>(0.0));
2452 li(scratch, Operand(src));
3631 const DoubleRegister src) {
3635 fsub_d(dst, src, kDoubleRegZero);
3646 void TurboAssembler::MovToFloatParameter(DoubleRegister src) { Move(fa0, src); }
3648 void TurboAssembler::MovToFloatResult(DoubleRegister src) { Move(fa0, src); }
3738 Register src = a6, dest = a7;
3739 Move(src, sp);
3746 Ld(t1, MemOperand(src, 0));
3749 Add64(src, src, Operand(kSystemPointerSize));
3991 MemOperand src) {
3993 Lbu(kScratchReg2, src);
4000 Lhu(kScratchReg2, src);
4006 Lwu(kScratchReg2, src);
4012 Ld(kScratchReg2, src);
4022 void TurboAssembler::StoreLane(int sz, VRegister src, uint8_t laneidx,
4026 vslidedown_vi(kSimd128ScratchReg, src, laneidx);
4031 vslidedown_vi(kSimd128ScratchReg, src, laneidx);
4036 vslidedown_vi(kSimd128ScratchReg, src, laneidx);
4042 vslidedown_vi(kSimd128ScratchReg, src, laneidx);
4534 void TurboAssembler::SmiUntag(Register dst, const MemOperand& src) {
4537 Lw(dst, MemOperand(src.rm(), SmiWordOffset(src.offset())));
4541 Lw(dst, src);
4543 Ld(dst, src);
5082 void TurboAssembler::SmiUntagField(Register dst, const MemOperand& src) {
5083 SmiUntag(dst, src);