Lines Matching refs:vs1
714 void vmv_vv(VRegister vd, VRegister vs1);
719 void vmerge_vv(VRegister vd, VRegister vs1, VRegister vs2);
723 void vredmaxu_vs(VRegister vd, VRegister vs2, VRegister vs1,
725 void vredmax_vs(VRegister vd, VRegister vs2, VRegister vs1,
727 void vredmin_vs(VRegister vd, VRegister vs2, VRegister vs1,
729 void vredminu_vs(VRegister vd, VRegister vs2, VRegister vs1,
732 void vadc_vv(VRegister vd, VRegister vs1, VRegister vs2);
736 void vmadc_vv(VRegister vd, VRegister vs1, VRegister vs2);
749 void name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
761 void name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
769 void name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
773 void name##_wv(VRegister vd, VRegister vs2, VRegister vs1, \
777 void name##_vs(VRegister vd, VRegister vs2, VRegister vs1, \
789 void name##_vv(VRegister vd, VRegister vs1, VRegister vs2, \
1002 #define DEFINE_VFUNARY(name, funct6, vs1) \
1004 GenInstrV(funct6, OP_FVV, vd, vs1, vs2, mask); \
1654 void GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, VRegister vs1,
1656 void GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, int8_t vs1,
1661 void GenInstrV(uint8_t funct6, Opcode opcode, Register rd, VRegister vs1,
1664 void GenInstrV(uint8_t funct6, Opcode opcode, FPURegister fd, VRegister vs1,
1693 void GenInstrV(uint8_t funct6, Opcode opcode, Register rd, uint8_t vs1,