Lines Matching refs:rd
385 void lui(Register rd, int32_t imm20);
386 void auipc(Register rd, int32_t imm20);
389 void jal(Register rd, int32_t imm20);
390 void jalr(Register rd, Register rs1, int16_t imm12);
419 void lb(Register rd, Register rs1, int16_t imm12);
420 void lh(Register rd, Register rs1, int16_t imm12);
421 void lw(Register rd, Register rs1, int16_t imm12);
422 void lbu(Register rd, Register rs1, int16_t imm12);
423 void lhu(Register rd, Register rs1, int16_t imm12);
431 void addi(Register rd, Register rs1, int16_t imm12);
432 void slti(Register rd, Register rs1, int16_t imm12);
433 void sltiu(Register rd, Register rs1, int16_t imm12);
434 void xori(Register rd, Register rs1, int16_t imm12);
435 void ori(Register rd, Register rs1, int16_t imm12);
436 void andi(Register rd, Register rs1, int16_t imm12);
437 void slli(Register rd, Register rs1, uint8_t shamt);
438 void srli(Register rd, Register rs1, uint8_t shamt);
439 void srai(Register rd, Register rs1, uint8_t shamt);
442 void add(Register rd, Register rs1, Register rs2);
443 void sub(Register rd, Register rs1, Register rs2);
444 void sll(Register rd, Register rs1, Register rs2);
445 void slt(Register rd, Register rs1, Register rs2);
446 void sltu(Register rd, Register rs1, Register rs2);
447 void xor_(Register rd, Register rs1, Register rs2);
448 void srl(Register rd, Register rs1, Register rs2);
449 void sra(Register rd, Register rs1, Register rs2);
450 void or_(Register rd, Register rs1, Register rs2);
451 void and_(Register rd, Register rs1, Register rs2);
467 void csrrw(Register rd, ControlStatusReg csr, Register rs1);
468 void csrrs(Register rd, ControlStatusReg csr, Register rs1);
469 void csrrc(Register rd, ControlStatusReg csr, Register rs1);
470 void csrrwi(Register rd, ControlStatusReg csr, uint8_t imm5);
471 void csrrsi(Register rd, ControlStatusReg csr, uint8_t imm5);
472 void csrrci(Register rd, ControlStatusReg csr, uint8_t imm5);
475 void lwu(Register rd, Register rs1, int16_t imm12);
476 void ld(Register rd, Register rs1, int16_t imm12);
478 void addiw(Register rd, Register rs1, int16_t imm12);
479 void slliw(Register rd, Register rs1, uint8_t shamt);
480 void srliw(Register rd, Register rs1, uint8_t shamt);
481 void sraiw(Register rd, Register rs1, uint8_t shamt);
482 void addw(Register rd, Register rs1, Register rs2);
483 void subw(Register rd, Register rs1, Register rs2);
484 void sllw(Register rd, Register rs1, Register rs2);
485 void srlw(Register rd, Register rs1, Register rs2);
486 void sraw(Register rd, Register rs1, Register rs2);
489 void mul(Register rd, Register rs1, Register rs2);
490 void mulh(Register rd, Register rs1, Register rs2);
491 void mulhsu(Register rd, Register rs1, Register rs2);
492 void mulhu(Register rd, Register rs1, Register rs2);
493 void div(Register rd, Register rs1, Register rs2);
494 void divu(Register rd, Register rs1, Register rs2);
495 void rem(Register rd, Register rs1, Register rs2);
496 void remu(Register rd, Register rs1, Register rs2);
499 void mulw(Register rd, Register rs1, Register rs2);
500 void divw(Register rd, Register rs1, Register rs2);
501 void divuw(Register rd, Register rs1, Register rs2);
502 void remw(Register rd, Register rs1, Register rs2);
503 void remuw(Register rd, Register rs1, Register rs2);
506 void lr_w(bool aq, bool rl, Register rd, Register rs1);
507 void sc_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
508 void amoswap_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
509 void amoadd_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
510 void amoxor_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
511 void amoand_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
512 void amoor_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
513 void amomin_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
514 void amomax_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
515 void amominu_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
516 void amomaxu_w(bool aq, bool rl, Register rd, Register rs1, Register rs2);
519 void lr_d(bool aq, bool rl, Register rd, Register rs1);
520 void sc_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
521 void amoswap_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
522 void amoadd_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
523 void amoxor_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
524 void amoand_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
525 void amoor_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
526 void amomin_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
527 void amomax_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
528 void amominu_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
529 void amomaxu_d(bool aq, bool rl, Register rd, Register rs1, Register rs2);
532 void flw(FPURegister rd, Register rs1, int16_t imm12);
534 void fmadd_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
536 void fmsub_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
538 void fnmsub_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
540 void fnmadd_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
542 void fadd_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
544 void fsub_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
546 void fmul_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
548 void fdiv_s(FPURegister rd, FPURegister rs1, FPURegister rs2,
550 void fsqrt_s(FPURegister rd, FPURegister rs1, RoundingMode frm = RNE);
551 void fsgnj_s(FPURegister rd, FPURegister rs1, FPURegister rs2);
552 void fsgnjn_s(FPURegister rd, FPURegister rs1, FPURegister rs2);
553 void fsgnjx_s(FPURegister rd, FPURegister rs1, FPURegister rs2);
554 void fmin_s(FPURegister rd, FPURegister rs1, FPURegister rs2);
555 void fmax_s(FPURegister rd, FPURegister rs1, FPURegister rs2);
556 void fcvt_w_s(Register rd, FPURegister rs1, RoundingMode frm = RNE);
557 void fcvt_wu_s(Register rd, FPURegister rs1, RoundingMode frm = RNE);
558 void fmv_x_w(Register rd, FPURegister rs1);
559 void feq_s(Register rd, FPURegister rs1, FPURegister rs2);
560 void flt_s(Register rd, FPURegister rs1, FPURegister rs2);
561 void fle_s(Register rd, FPURegister rs1, FPURegister rs2);
562 void fclass_s(Register rd, FPURegister rs1);
563 void fcvt_s_w(FPURegister rd, Register rs1, RoundingMode frm = RNE);
564 void fcvt_s_wu(FPURegister rd, Register rs1, RoundingMode frm = RNE);
565 void fmv_w_x(FPURegister rd, Register rs1);
568 void fcvt_l_s(Register rd, FPURegister rs1, RoundingMode frm = RNE);
569 void fcvt_lu_s(Register rd, FPURegister rs1, RoundingMode frm = RNE);
570 void fcvt_s_l(FPURegister rd, Register rs1, RoundingMode frm = RNE);
571 void fcvt_s_lu(FPURegister rd, Register rs1, RoundingMode frm = RNE);
574 void fld(FPURegister rd, Register rs1, int16_t imm12);
576 void fmadd_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
578 void fmsub_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
580 void fnmsub_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
582 void fnmadd_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
584 void fadd_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
586 void fsub_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
588 void fmul_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
590 void fdiv_d(FPURegister rd, FPURegister rs1, FPURegister rs2,
592 void fsqrt_d(FPURegister rd, FPURegister rs1, RoundingMode frm = RNE);
593 void fsgnj_d(FPURegister rd, FPURegister rs1, FPURegister rs2);
594 void fsgnjn_d(FPURegister rd, FPURegister rs1, FPURegister rs2);
595 void fsgnjx_d(FPURegister rd, FPURegister rs1, FPURegister rs2);
596 void fmin_d(FPURegister rd, FPURegister rs1, FPURegister rs2);
597 void fmax_d(FPURegister rd, FPURegister rs1, FPURegister rs2);
598 void fcvt_s_d(FPURegister rd, FPURegister rs1, RoundingMode frm = RNE);
599 void fcvt_d_s(FPURegister rd, FPURegister rs1, RoundingMode frm = RNE);
600 void feq_d(Register rd, FPURegister rs1, FPURegister rs2);
601 void flt_d(Register rd, FPURegister rs1, FPURegister rs2);
602 void fle_d(Register rd, FPURegister rs1, FPURegister rs2);
603 void fclass_d(Register rd, FPURegister rs1);
604 void fcvt_w_d(Register rd, FPURegister rs1, RoundingMode frm = RNE);
605 void fcvt_wu_d(Register rd, FPURegister rs1, RoundingMode frm = RNE);
606 void fcvt_d_w(FPURegister rd, Register rs1, RoundingMode frm = RNE);
607 void fcvt_d_wu(FPURegister rd, Register rs1, RoundingMode frm = RNE);
610 void fcvt_l_d(Register rd, FPURegister rs1, RoundingMode frm = RNE);
611 void fcvt_lu_d(Register rd, FPURegister rs1, RoundingMode frm = RNE);
612 void fmv_x_d(Register rd, FPURegister rs1);
613 void fcvt_d_l(FPURegister rd, Register rs1, RoundingMode frm = RNE);
614 void fcvt_d_lu(FPURegister rd, Register rs1, RoundingMode frm = RNE);
615 void fmv_d_x(FPURegister rd, Register rs1);
619 void c_addi(Register rd, int8_t imm6);
620 void c_addiw(Register rd, int8_t imm6);
622 void c_addi4spn(Register rd, int16_t uimm10);
623 void c_li(Register rd, int8_t imm6);
624 void c_lui(Register rd, int8_t imm6);
625 void c_slli(Register rd, uint8_t shamt6);
626 void c_fldsp(FPURegister rd, uint16_t uimm9);
627 void c_lwsp(Register rd, uint16_t uimm8);
628 void c_ldsp(Register rd, uint16_t uimm9);
630 void c_mv(Register rd, Register rs2);
635 void c_add(Register rd, Register rs2);
636 void c_sub(Register rd, Register rs2);
637 void c_and(Register rd, Register rs2);
638 void c_xor(Register rd, Register rs2);
639 void c_or(Register rd, Register rs2);
640 void c_subw(Register rd, Register rs2);
641 void c_addw(Register rd, Register rs2);
645 void c_lw(Register rd, Register rs1, uint16_t uimm7);
646 void c_ld(Register rd, Register rs1, uint16_t uimm8);
647 void c_fld(FPURegister rd, Register rs1, uint16_t uimm8);
717 void vmv_xs(Register rd, VRegister vs2);
1041 void vfirst_m(Register rd, VRegister vs2, MaskType mask = NoMask);
1043 void vcpop_m(Register rd, VRegister vs2, MaskType mask = NoMask);
1054 void RV_li(Register rd, int64_t imm);
1059 void li_constant(Register rd, int64_t imm);
1060 void li_ptr(Register rd, int64_t imm);
1062 void mv(Register rd, Register rs) { addi(rd, rs, 0); }
1063 void not_(Register rd, Register rs) { xori(rd, rs, -1); }
1064 void neg(Register rd, Register rs) { sub(rd, zero_reg, rs); }
1065 void negw(Register rd, Register rs) { subw(rd, zero_reg, rs); }
1066 void sext_w(Register rd, Register rs) { addiw(rd, rs, 0); }
1067 void seqz(Register rd, Register rs) { sltiu(rd, rs, 1); }
1068 void snez(Register rd, Register rs) { sltu(rd, zero_reg, rs); }
1069 void sltz(Register rd, Register rs) { slt(rd, rs, zero_reg); }
1070 void sgtz(Register rd, Register rs) { slt(rd, zero_reg, rs); }
1072 void fmv_s(FPURegister rd, FPURegister rs) { fsgnj_s(rd, rs, rs); }
1073 void fabs_s(FPURegister rd, FPURegister rs) { fsgnjx_s(rd, rs, rs); }
1074 void fneg_s(FPURegister rd, FPURegister rs) { fsgnjn_s(rd, rs, rs); }
1075 void fmv_d(FPURegister rd, FPURegister rs) { fsgnj_d(rd, rs, rs); }
1076 void fabs_d(FPURegister rd, FPURegister rs) { fsgnjx_d(rd, rs, rs); }
1077 void fneg_d(FPURegister rd, FPURegister rs) { fsgnjn_d(rd, rs, rs); }
1129 void rdinstret(Register rd) { csrrs(rd, csr_instret, zero_reg); }
1130 void rdinstreth(Register rd) { csrrs(rd, csr_instreth, zero_reg); }
1131 void rdcycle(Register rd) { csrrs(rd, csr_cycle, zero_reg); }
1132 void rdcycleh(Register rd) { csrrs(rd, csr_cycleh, zero_reg); }
1133 void rdtime(Register rd) { csrrs(rd, csr_time, zero_reg); }
1134 void rdtimeh(Register rd) { csrrs(rd, csr_timeh, zero_reg); }
1136 void csrr(Register rd, ControlStatusReg csr) { csrrs(rd, csr, zero_reg); }
1145 void frcsr(Register rd) { csrrs(rd, csr_fcsr, zero_reg); }
1146 void fscsr(Register rd, Register rs) { csrrw(rd, csr_fcsr, rs); }
1149 void frrm(Register rd) { csrrs(rd, csr_frm, zero_reg); }
1150 void fsrm(Register rd, Register rs) { csrrw(rd, csr_frm, rs); }
1153 void frflags(Register rd) { csrrs(rd, csr_fflags, zero_reg); }
1154 void fsflags(Register rd, Register rs) { csrrw(rd, csr_fflags, rs); }
1158 void nor(Register rd, Register rs, Register rt) {
1159 or_(rd, rs, rt);
1160 not_(rd, rd);
1336 void set(Register rd, VSew sew, Vlmul lmul) {
1341 assm_->vsetvlmax(rd, sew_, lmul_);
1345 void set(Register rd, int8_t sew, int8_t lmul) {
1350 set(rd, VSew(sew), Vlmul(lmul));
1360 void set(Register rd, Register rs1, VSew sew, Vlmul lmul) {
1365 assm_->vsetvli(rd, rs1, sew_, lmul_);
1474 void vsetvli(Register rd, Register rs1, VSew vsew, Vlmul vlmul,
1477 void vsetivli(Register rd, uint8_t uimm, VSew vsew, Vlmul vlmul,
1480 inline void vsetvlmax(Register rd, VSew vsew, Vlmul vlmul,
1483 vsetvli(rd, zero_reg, vsew, vlmul, tu, mu);
1491 void vsetvl(Register rd, Register rs1, Register rs2);
1551 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, Register rd,
1553 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, FPURegister rd,
1555 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, Register rd,
1557 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, FPURegister rd,
1559 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, FPURegister rd,
1561 void GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, Register rd,
1563 void GenInstrR4(uint8_t funct2, Opcode opcode, Register rd, Register rs1,
1565 void GenInstrR4(uint8_t funct2, Opcode opcode, FPURegister rd,
1569 Register rd, Register rs1, Register rs2);
1570 void GenInstrRFrm(uint8_t funct7, Opcode opcode, Register rd, Register rs1,
1572 void GenInstrI(uint8_t funct3, Opcode opcode, Register rd, Register rs1,
1574 void GenInstrI(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1,
1577 Register rd, Register rs1, uint8_t shamt);
1579 Register rd, Register rs1, uint8_t shamt);
1586 void GenInstrU(Opcode opcode, Register rd, int32_t imm20);
1587 void GenInstrJ(Opcode opcode, Register rd, int32_t imm20);
1588 void GenInstrCR(uint8_t funct4, Opcode opcode, Register rd, Register rs2);
1589 void GenInstrCA(uint8_t funct6, Opcode opcode, Register rd, uint8_t funct,
1591 void GenInstrCI(uint8_t funct3, Opcode opcode, Register rd, int8_t imm6);
1592 void GenInstrCIU(uint8_t funct3, Opcode opcode, Register rd, uint8_t uimm6);
1593 void GenInstrCIU(uint8_t funct3, Opcode opcode, FPURegister rd,
1595 void GenInstrCIW(uint8_t funct3, Opcode opcode, Register rd, uint8_t uimm8);
1599 void GenInstrCL(uint8_t funct3, Opcode opcode, Register rd, Register rs1,
1601 void GenInstrCL(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1,
1615 void GenInstrLoad_ri(uint8_t funct3, Register rd, Register rs1,
1619 void GenInstrALU_ri(uint8_t funct3, Register rd, Register rs1, int16_t imm12);
1620 void GenInstrShift_ri(bool arithshift, uint8_t funct3, Register rd,
1622 void GenInstrALU_rr(uint8_t funct7, uint8_t funct3, Register rd, Register rs1,
1624 void GenInstrCSR_ir(uint8_t funct3, Register rd, ControlStatusReg csr,
1626 void GenInstrCSR_ii(uint8_t funct3, Register rd, ControlStatusReg csr,
1628 void GenInstrShiftW_ri(bool arithshift, uint8_t funct3, Register rd,
1630 void GenInstrALUW_rr(uint8_t funct7, uint8_t funct3, Register rd,
1633 void GenInstrLoadFP_ri(uint8_t funct3, FPURegister rd, Register rs1,
1637 void GenInstrALUFP_rr(uint8_t funct7, uint8_t funct3, FPURegister rd,
1639 void GenInstrALUFP_rr(uint8_t funct7, uint8_t funct3, FPURegister rd,
1641 void GenInstrALUFP_rr(uint8_t funct7, uint8_t funct3, FPURegister rd,
1643 void GenInstrALUFP_rr(uint8_t funct7, uint8_t funct3, Register rd,
1645 void GenInstrALUFP_rr(uint8_t funct7, uint8_t funct3, Register rd,
1650 void GenInstrV(Register rd, Register rs1, Register rs2);
1652 void GenInstrV(Register rd, Register rs1, uint32_t zimm);
1661 void GenInstrV(uint8_t funct6, Opcode opcode, Register rd, VRegister vs1,
1674 void GenInstrV(uint8_t funct6, Register rd, Register rs1, VRegister vs2,
1693 void GenInstrV(uint8_t funct6, Opcode opcode, Register rd, uint8_t vs1,