Lines Matching refs:imm5
1219 void Assembler::GenInstrV(uint8_t funct6, VRegister vd, int8_t imm5,
1221 DCHECK(is_uint5(imm5) || is_int5(imm5));
1224 (((uint32_t)imm5 << kRvvImm5Shift) & kRvvImm5Mask) |
1322 ControlStatusReg csr, uint8_t imm5) {
1323 GenInstrI(funct3, SYSTEM, rd, ToRegister(imm5), csr);
1719 void Assembler::csrrwi(Register rd, ControlStatusReg csr, uint8_t imm5) {
1720 GenInstrCSR_ii(0b101, rd, csr, imm5);
1723 void Assembler::csrrsi(Register rd, ControlStatusReg csr, uint8_t imm5) {
1724 GenInstrCSR_ii(0b110, rd, csr, imm5);
1727 void Assembler::csrrci(Register rd, ControlStatusReg csr, uint8_t imm5) {
1728 GenInstrCSR_ii(0b111, rd, csr, imm5);
2524 void Assembler::vmerge_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2525 GenInstrV(VMV_FUNCT6, vd, imm5, vs2, Mask);
2536 void Assembler::vadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2537 GenInstrV(VADC_FUNCT6, vd, imm5, vs2, Mask);
2548 void Assembler::vmadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2549 GenInstrV(VMADC_FUNCT6, vd, imm5, vs2, Mask);
2559 void Assembler::vrgather_vi(VRegister vd, VRegister vs2, int8_t imm5,
2562 GenInstrV(VRGATHER_FUNCT6, vd, imm5, vs2, mask);
2611 void Assembler::name##_vi(VRegister vd, VRegister vs2, int8_t imm5, \
2613 GenInstrV(funct6, vd, imm5, vs2, mask); \