Lines Matching refs:value

143   void LoadDoubleLiteral(DoubleRegister result, base::Double value,
147   // load a literal signed int value <value> to GPR <dst>
148   void LoadIntLiteral(Register dst, int value);
149   // load an SMI value <value> to GPR <dst>
186   void AddS64(Register dst, Register src, const Operand& value,
188   void AddS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
190   void SubS64(Register dst, Register src, const Operand& value,
192   void SubS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
194   void AddS32(Register dst, Register src, const Operand& value,
196   void AddS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
197   void SubS32(Register dst, Register src, const Operand& value,
199   void SubS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
200   void MulS64(Register dst, Register src, const Operand& value,
202   void MulS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
204   void MulS32(Register dst, Register src, const Operand& value,
206   void MulS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
208   void DivS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
210   void DivU64(Register dst, Register src, Register value, OEBit s = LeaveOE,
212   void DivS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
214   void DivU32(Register dst, Register src, Register value, OEBit s = LeaveOE,
216   void ModS64(Register dst, Register src, Register value);
217   void ModU64(Register dst, Register src, Register value);
218   void ModS32(Register dst, Register src, Register value);
219   void ModU32(Register dst, Register src, Register value);
221   void AndU64(Register dst, Register src, const Operand& value,
223   void AndU64(Register dst, Register src, Register value, RCBit r = SetRC);
224   void OrU64(Register dst, Register src, const Operand& value,
226   void OrU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
227   void XorU64(Register dst, Register src, const Operand& value,
229   void XorU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
230   void AndU32(Register dst, Register src, const Operand& value,
232   void AndU32(Register dst, Register src, Register value, RCBit r = SetRC);
233   void OrU32(Register dst, Register src, const Operand& value,
235   void OrU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
236   void XorU32(Register dst, Register src, const Operand& value,
238   void XorU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
240   void ShiftLeftU64(Register dst, Register src, const Operand& value,
242   void ShiftRightU64(Register dst, Register src, const Operand& value,
244   void ShiftRightS64(Register dst, Register src, const Operand& value,
246   void ShiftLeftU32(Register dst, Register src, const Operand& value,
248   void ShiftRightU32(Register dst, Register src, const Operand& value,
250   void ShiftRightS32(Register dst, Register src, const Operand& value,
252   void ShiftLeftU64(Register dst, Register src, Register value,
254   void ShiftRightU64(Register dst, Register src, Register value,
256   void ShiftRightS64(Register dst, Register src, Register value,
258   void ShiftLeftU32(Register dst, Register src, Register value,
260   void ShiftRightU32(Register dst, Register src, Register value,
262   void ShiftRightS32(Register dst, Register src, Register value,
301   void SignedExtend(Register dst, Register value) {
304         extsb(dst, value);
307         extsh(dst, value);
310         extsw(dst, value);
313         if (dst != value) mr(dst, value);
321   void ZeroExtend(Register dst, Register value) {
324         ZeroExtByte(dst, value);
327         ZeroExtHalfWord(dst, value);
330         ZeroExtWord32(dst, value);
333         if (dst != value) mr(dst, value);
340   void ExtendValue(Register dst, Register value) {
341     if (std::is_signed<_type>::value) {
342       SignedExtend<_type>(dst, value);
344       ZeroExtend<_type>(dst, value);
366     if (std::is_signed<_type>::value) {
372   void StoreConditional(Register value, MemOperand dst) {
375         stbcx(value, dst);
378         sthcx(value, dst);
381         stwcx(value, dst);
384         stdcx(value, dst);
424   void AtomicOps(MemOperand dst, Register value, Register output,
445     op(result, output, value);
735   // If the value is a NaN, canonicalize the value else, do nothing.
737   void CanonicalizeNaN(const DoubleRegister value) {
738     CanonicalizeNaN(value, value);
769   void Move(Register dst, Handle<HeapObject> value,
867   // Test single bit in value.
868   inline void TestBit(Register value, int bitNumber, Register scratch = r0) {
869     ExtractBitRange(scratch, value, bitNumber, bitNumber, SetRC, true);
872   // Test consecutive bit range in value.  Range is defined by mask.
873   inline void TestBitMask(Register value, uintptr_t mask,
875     ExtractBitMask(scratch, value, mask, SetRC, true);
877   // Test consecutive bit range in value.  Range is defined by
879   inline void TestBitRange(Register value, int rangeStart, int rangeEnd,
881     ExtractBitRange(scratch, value, rangeStart, rangeEnd, SetRC, true);
884   inline void TestIfSmi(Register value, Register scratch) {
885     TestBitRange(value, kSmiTagSize - 1, 0, scratch);
888   inline void JumpIfSmi(Register value, Label* smi_label) {
889     TestIfSmi(value, r0);
898   inline void TestIfInt32(Register value, Register scratch,
901     extsw(scratch, value);
902     CmpS64(scratch, value, cr);
988   // Loads a field containing any tagged value and decompresses it if necessary.
993   // Compresses and stores tagged value to given on-heap location.
994   void StoreTaggedField(const Register& value,
1096   // |object| is the object being stored into, |value| is the object being
1097   // stored.  value and scratch registers are clobbered by the operation.
1101       Register object, int offset, Register value, Register slot_address,
1107   // has been written.  |value| is the object being stored. The value and
1110       Register object, Register slot_address, Register value,
1121   // Leave the current exit frame. Expects the return value in r0.
1138   // load a literal double value <value> to FPR <result>
1212   // Compare the object in a register to a value from the root list.
1220   // Compare the object in a register to a value and jump if they are equal.
1226   // Compare the object in a register to a value and jump if they are not equal.
1232   // Checks if value is in range [lower_limit, higher_limit] using a single
1234   void CompareRange(Register value, unsigned lower_limit,
1236   void JumpIfIsInRange(Register value, unsigned lower_limit,
1285   void IncrementCounter(StatsCounter* counter, int value, Register scratch1,
1288     EmitIncrementCounter(counter, value, scratch1, scratch2);
1290   void EmitIncrementCounter(StatsCounter* counter, int value, Register scratch1,
1292   void DecrementCounter(StatsCounter* counter, int value, Register scratch1,
1295     EmitDecrementCounter(counter, value, scratch1, scratch2);
1297   void EmitDecrementCounter(StatsCounter* counter, int value, Register scratch1,
1311   inline void JumpIfNotSmi(Register value, Label* not_smi_label) {
1312     TestIfSmi(value, r0);
1317   // Ensure it is permissible to read/write int value directly from