Lines Matching refs:src

12 #include "src/base/numbers/double.h"
13 #include "src/codegen/bailout-reason.h"
14 #include "src/codegen/ppc/assembler-ppc.h"
15 #include "src/common/globals.h"
16 #include "src/objects/contexts.h"
54   void Popcnt32(Register dst, Register src);
55   void Popcnt64(Register dst, Register src);
56   // Converts the integer (untagged smi) in |src| to a double, storing
58   void ConvertIntToDouble(Register src, DoubleRegister dst);
60   // Converts the unsigned integer (untagged smi) in |src| to
62   void ConvertUnsignedIntToDouble(Register src, DoubleRegister dst);
64   // Converts the integer (untagged smi) in |src| to
66   void ConvertIntToFloat(Register src, DoubleRegister dst);
68   // Converts the unsigned integer (untagged smi) in |src| to
70   void ConvertUnsignedIntToFloat(Register src, DoubleRegister dst);
73   void ConvertInt64ToFloat(Register src, DoubleRegister double_dst);
74   void ConvertInt64ToDouble(Register src, DoubleRegister double_dst);
75   void ConvertUnsignedInt64ToFloat(Register src, DoubleRegister double_dst);
76   void ConvertUnsignedInt64ToDouble(Register src, DoubleRegister double_dst);
186   void AddS64(Register dst, Register src, const Operand& value,
188   void AddS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
190   void SubS64(Register dst, Register src, const Operand& value,
192   void SubS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
194   void AddS32(Register dst, Register src, const Operand& value,
196   void AddS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
197   void SubS32(Register dst, Register src, const Operand& value,
199   void SubS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
200   void MulS64(Register dst, Register src, const Operand& value,
202   void MulS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
204   void MulS32(Register dst, Register src, const Operand& value,
206   void MulS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
208   void DivS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
210   void DivU64(Register dst, Register src, Register value, OEBit s = LeaveOE,
212   void DivS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
214   void DivU32(Register dst, Register src, Register value, OEBit s = LeaveOE,
216   void ModS64(Register dst, Register src, Register value);
217   void ModU64(Register dst, Register src, Register value);
218   void ModS32(Register dst, Register src, Register value);
219   void ModU32(Register dst, Register src, Register value);
221   void AndU64(Register dst, Register src, const Operand& value,
223   void AndU64(Register dst, Register src, Register value, RCBit r = SetRC);
224   void OrU64(Register dst, Register src, const Operand& value,
226   void OrU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
227   void XorU64(Register dst, Register src, const Operand& value,
229   void XorU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
230   void AndU32(Register dst, Register src, const Operand& value,
232   void AndU32(Register dst, Register src, Register value, RCBit r = SetRC);
233   void OrU32(Register dst, Register src, const Operand& value,
235   void OrU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
236   void XorU32(Register dst, Register src, const Operand& value,
238   void XorU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
240   void ShiftLeftU64(Register dst, Register src, const Operand& value,
242   void ShiftRightU64(Register dst, Register src, const Operand& value,
244   void ShiftRightS64(Register dst, Register src, const Operand& value,
246   void ShiftLeftU32(Register dst, Register src, const Operand& value,
248   void ShiftRightU32(Register dst, Register src, const Operand& value,
250   void ShiftRightS32(Register dst, Register src, const Operand& value,
252   void ShiftLeftU64(Register dst, Register src, Register value,
254   void ShiftRightU64(Register dst, Register src, Register value,
256   void ShiftRightS64(Register dst, Register src, Register value,
258   void ShiftLeftU32(Register dst, Register src, Register value,
260   void ShiftRightU32(Register dst, Register src, Register value,
262   void ShiftRightS32(Register dst, Register src, Register value,
265   void CountLeadingZerosU32(Register dst, Register src, RCBit r = LeaveRC);
266   void CountLeadingZerosU64(Register dst, Register src, RCBit r = LeaveRC);
267   void CountTrailingZerosU32(Register dst, Register src, Register scratch1 = ip,
269   void CountTrailingZerosU64(Register dst, Register src, Register scratch1 = ip,
273   void ReverseBitsU64(Register dst, Register src, Register scratch1,
275   void ReverseBitsU32(Register dst, Register src, Register scratch1,
277   void ReverseBitsInSingleByteU64(Register dst, Register src,
466   void Push(Register src) { push(src); }
596   void SwapP(Register src, Register dst, Register scratch);
597   void SwapP(Register src, MemOperand dst, Register scratch);
598   void SwapP(MemOperand src, MemOperand dst, Register scratch_0,
600   void SwapFloat32(DoubleRegister src, DoubleRegister dst,
602   void SwapFloat32(DoubleRegister src, MemOperand dst, DoubleRegister scratch);
603   void SwapFloat32(MemOperand src, MemOperand dst, DoubleRegister scratch_0,
605   void SwapDouble(DoubleRegister src, DoubleRegister dst,
607   void SwapDouble(DoubleRegister src, MemOperand dst, DoubleRegister scratch);
608   void SwapDouble(MemOperand src, MemOperand dst, DoubleRegister scratch_0,
610   void SwapSimd128(Simd128Register src, Simd128Register dst,
612   void SwapSimd128(Simd128Register src, MemOperand dst,
614   void SwapSimd128(MemOperand src, MemOperand dst, Simd128Register scratch);
638   void MovToFloatParameter(DoubleRegister src);
640   void MovToFloatResult(DoubleRegister src);
736   void CanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src);
744   void MovIntToDouble(DoubleRegister dst, Register src, Register scratch);
745   void MovUnsignedIntToDouble(DoubleRegister dst, Register src,
751                         Register src);
756   void InsertDoubleLow(DoubleRegister dst, Register src, Register scratch);
757   void InsertDoubleHigh(DoubleRegister dst, Register src, Register scratch);
758   void MovDoubleLowToInt(Register dst, DoubleRegister src);
759   void MovDoubleHighToInt(Register dst, DoubleRegister src);
764       Register dst, DoubleRegister src);
765   void MovIntToFloat(DoubleRegister dst, Register src, Register scratch);
766   void MovFloatToInt(Register dst, DoubleRegister src, DoubleRegister scratch);
772   void Move(Register dst, Register src, Condition cond = al);
773   void Move(DoubleRegister dst, DoubleRegister src);
774   void Move(Register dst, const MemOperand& src) { LoadU64(dst, src); }
776   void SmiUntag(Register dst, const MemOperand& src, RCBit rc = LeaveRC,
780   void SmiUntag(Register dst, Register src, RCBit rc = LeaveRC) {
782       srawi(dst, src, kSmiShift, rc);
784       ShiftRightS64(dst, src, Operand(kSmiShift), rc);
797   void SmiTag(Register dst, Register src, RCBit rc = LeaveRC) {
798     ShiftLeftU64(dst, src, Operand(kSmiShift), rc);
805   void ZeroExtByte(Register dst, Register src);
806   void ZeroExtHalfWord(Register dst, Register src);
807   void ZeroExtWord32(Register dst, Register src);
815   // Extract consecutive bits (defined by rangeStart - rangeEnd) from src
817   inline void ExtractBitRange(Register dst, Register src, int rangeStart,
825       andi(dst, src, Operand(((1 << width) - 1) << rangeEnd));
828       rldicl(dst, src, rotate, kBitsPerSystemPointer - width, rc);
830       rlwinm(dst, src, rotate, kBitsPerSystemPointer - width,
836   inline void ExtractBit(Register dst, Register src, uint32_t bitNumber,
838     ExtractBitRange(dst, src, bitNumber, bitNumber, rc, test);
841   // Extract consecutive bits (defined by mask) from src and place them
843   inline void ExtractBitMask(Register dst, Register src, uintptr_t mask,
864     ExtractBitRange(dst, src, start, end, rc, test);
970   void SmiToPtrArrayOffset(Register dst, Register src) {
973     ShiftLeftU64(dst, src, Operand(kSystemPointerSizeLog2 - kSmiShift));
976     ShiftRightS64(dst, src, Operand(kSmiShift - kSystemPointerSizeLog2));
999   void DecompressTaggedSigned(Register destination, Register src);
1010   void StoreF32(DoubleRegister src, const MemOperand& mem,
1012   void StoreF64(DoubleRegister src, const MemOperand& mem,
1020   void StoreF32WithUpdate(DoubleRegister src, const MemOperand& mem,
1022   void StoreF64WithUpdate(DoubleRegister src, const MemOperand& mem,
1025   void StoreSimd128(Simd128Register src, const MemOperand& mem);
1035   void StoreU64(Register src, const MemOperand& mem, Register scratch = no_reg);
1036   void StoreU32(Register src, const MemOperand& mem, Register scratch);
1037   void StoreU16(Register src, const MemOperand& mem, Register scratch);
1038   void StoreU8(Register src, const MemOperand& mem, Register scratch);
1042   void StoreU64WithUpdate(Register src, const MemOperand& mem,
1048   void StoreU64LE(Register src, const MemOperand& mem, Register scratch);
1049   void StoreU32LE(Register src, const MemOperand& mem, Register scratch);
1050   void StoreU16LE(Register src, const MemOperand& mem, Register scratch);
1060   void StoreF32LE(DoubleRegister src, const MemOperand& mem, Register scratch,
1062   void StoreF64LE(DoubleRegister src, const MemOperand& mem, Register scratch,
1140   void AddSmiLiteral(Register dst, Register src, Smi smi, Register scratch);
1141   void SubSmiLiteral(Register dst, Register src, Smi smi, Register scratch);
1146   void AndSmiLiteral(Register dst, Register src, Smi smi, Register scratch,
1354   void DecodeField(Register dst, Register src, RCBit rc = LeaveRC) {
1355     ExtractBitRange(dst, src, Field::kShift + Field::kSize - 1, Field::kShift,