Lines Matching refs:dst

54   void Popcnt32(Register dst, Register src);
55   void Popcnt64(Register dst, Register src);
57   // the result to |dst|
58   void ConvertIntToDouble(Register src, DoubleRegister dst);
61   // a double, storing the result to |dst|
62   void ConvertUnsignedIntToDouble(Register src, DoubleRegister dst);
65   // a float, storing the result in |dst|
66   void ConvertIntToFloat(Register src, DoubleRegister dst);
69   // a float, storing the result in |dst|
70   void ConvertUnsignedIntToFloat(Register src, DoubleRegister dst);
85                             const Register dst, const DoubleRegister double_dst,
92       const DoubleRegister double_input, const Register dst,
145   void LoadSimd128(Simd128Register dst, const MemOperand& mem);
147   // load a literal signed int value <value> to GPR <dst>
148   void LoadIntLiteral(Register dst, int value);
149   // load an SMI value <value> to GPR <dst>
150   void LoadSmiLiteral(Register dst, Smi smi);
152   void LoadPC(Register dst);
153   void ComputeCodeStartAddress(Register dst);
175   void MinF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
177   void MaxF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
186   void AddS64(Register dst, Register src, const Operand& value,
188   void AddS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
190   void SubS64(Register dst, Register src, const Operand& value,
192   void SubS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
194   void AddS32(Register dst, Register src, const Operand& value,
196   void AddS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
197   void SubS32(Register dst, Register src, const Operand& value,
199   void SubS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
200   void MulS64(Register dst, Register src, const Operand& value,
202   void MulS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
204   void MulS32(Register dst, Register src, const Operand& value,
206   void MulS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
208   void DivS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
210   void DivU64(Register dst, Register src, Register value, OEBit s = LeaveOE,
212   void DivS32(Register dst, Register src, Register value, OEBit s = LeaveOE,
214   void DivU32(Register dst, Register src, Register value, OEBit s = LeaveOE,
216   void ModS64(Register dst, Register src, Register value);
217   void ModU64(Register dst, Register src, Register value);
218   void ModS32(Register dst, Register src, Register value);
219   void ModU32(Register dst, Register src, Register value);
221   void AndU64(Register dst, Register src, const Operand& value,
223   void AndU64(Register dst, Register src, Register value, RCBit r = SetRC);
224   void OrU64(Register dst, Register src, const Operand& value,
226   void OrU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
227   void XorU64(Register dst, Register src, const Operand& value,
229   void XorU64(Register dst, Register src, Register value, RCBit r = LeaveRC);
230   void AndU32(Register dst, Register src, const Operand& value,
232   void AndU32(Register dst, Register src, Register value, RCBit r = SetRC);
233   void OrU32(Register dst, Register src, const Operand& value,
235   void OrU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
236   void XorU32(Register dst, Register src, const Operand& value,
238   void XorU32(Register dst, Register src, Register value, RCBit r = LeaveRC);
240   void ShiftLeftU64(Register dst, Register src, const Operand& value,
242   void ShiftRightU64(Register dst, Register src, const Operand& value,
244   void ShiftRightS64(Register dst, Register src, const Operand& value,
246   void ShiftLeftU32(Register dst, Register src, const Operand& value,
248   void ShiftRightU32(Register dst, Register src, const Operand& value,
250   void ShiftRightS32(Register dst, Register src, const Operand& value,
252   void ShiftLeftU64(Register dst, Register src, Register value,
254   void ShiftRightU64(Register dst, Register src, Register value,
256   void ShiftRightS64(Register dst, Register src, Register value,
258   void ShiftLeftU32(Register dst, Register src, Register value,
260   void ShiftRightU32(Register dst, Register src, Register value,
262   void ShiftRightS32(Register dst, Register src, Register value,
265   void CountLeadingZerosU32(Register dst, Register src, RCBit r = LeaveRC);
266   void CountLeadingZerosU64(Register dst, Register src, RCBit r = LeaveRC);
267   void CountTrailingZerosU32(Register dst, Register src, Register scratch1 = ip,
269   void CountTrailingZerosU64(Register dst, Register src, Register scratch1 = ip,
272   void ClearByteU64(Register dst, int byte_idx);
273   void ReverseBitsU64(Register dst, Register src, Register scratch1,
275   void ReverseBitsU32(Register dst, Register src, Register scratch1,
277   void ReverseBitsInSingleByteU64(Register dst, Register src,
281   void AddF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
283   void SubF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
285   void MulF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
287   void DivF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
289   void AddF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
291   void SubF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
293   void MulF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
295   void DivF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
297   void CopySignF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
301   void SignedExtend(Register dst, Register value) {
304         extsb(dst, value);
307         extsh(dst, value);
310         extsw(dst, value);
313         if (dst != value) mr(dst, value);
321   void ZeroExtend(Register dst, Register value) {
324         ZeroExtByte(dst, value);
327         ZeroExtHalfWord(dst, value);
330         ZeroExtWord32(dst, value);
333         if (dst != value) mr(dst, value);
340   void ExtendValue(Register dst, Register value) {
342       SignedExtend<_type>(dst, value);
344       ZeroExtend<_type>(dst, value);
349   void LoadReserve(Register output, MemOperand dst) {
352         lbarx(output, dst);
355         lharx(output, dst);
358         lwarx(output, dst);
361         ldarx(output, dst);
372   void StoreConditional(Register value, MemOperand dst) {
375         stbcx(value, dst);
378         sthcx(value, dst);
381         stwcx(value, dst);
384         stdcx(value, dst);
392   void AtomicCompareExchange(MemOperand dst, Register old_value,
403     LoadReserve<_type>(output, dst);
406     StoreConditional<_type>(new_value, dst);
413   void AtomicExchange(MemOperand dst, Register new_value, Register output) {
417     LoadReserve<_type>(output, dst);
418     StoreConditional<_type>(new_value, dst);
424   void AtomicOps(MemOperand dst, Register value, Register output,
431         lbarx(output, dst);
434         lharx(output, dst);
437         lwarx(output, dst);
440         ldarx(output, dst);
448         stbcx(result, dst);
451         sthcx(result, dst);
454         stwcx(result, dst);
457         stdcx(result, dst);
506   void Pop(Register dst) { pop(dst); }
596   void SwapP(Register src, Register dst, Register scratch);
597   void SwapP(Register src, MemOperand dst, Register scratch);
598   void SwapP(MemOperand src, MemOperand dst, Register scratch_0,
600   void SwapFloat32(DoubleRegister src, DoubleRegister dst,
602   void SwapFloat32(DoubleRegister src, MemOperand dst, DoubleRegister scratch);
603   void SwapFloat32(MemOperand src, MemOperand dst, DoubleRegister scratch_0,
605   void SwapDouble(DoubleRegister src, DoubleRegister dst,
607   void SwapDouble(DoubleRegister src, MemOperand dst, DoubleRegister scratch);
608   void SwapDouble(MemOperand src, MemOperand dst, DoubleRegister scratch_0,
610   void SwapSimd128(Simd128Register src, Simd128Register dst,
612   void SwapSimd128(Simd128Register src, MemOperand dst,
614   void SwapSimd128(MemOperand src, MemOperand dst, Simd128Register scratch);
616   void ByteReverseU16(Register dst, Register val, Register scratch);
617   void ByteReverseU32(Register dst, Register val, Register scratch);
618   void ByteReverseU64(Register dst, Register val, Register = r0);
658   void MovFromFloatParameter(DoubleRegister dst);
659   void MovFromFloatResult(DoubleRegister dst);
736   void CanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src);
744   void MovIntToDouble(DoubleRegister dst, Register src, Register scratch);
745   void MovUnsignedIntToDouble(DoubleRegister dst, Register src,
747   void MovInt64ToDouble(DoubleRegister dst,
753   void MovInt64ComponentsToDouble(DoubleRegister dst, Register src_hi,
756   void InsertDoubleLow(DoubleRegister dst, Register src, Register scratch);
757   void InsertDoubleHigh(DoubleRegister dst, Register src, Register scratch);
758   void MovDoubleLowToInt(Register dst, DoubleRegister src);
759   void MovDoubleHighToInt(Register dst, DoubleRegister src);
764       Register dst, DoubleRegister src);
765   void MovIntToFloat(DoubleRegister dst, Register src, Register scratch);
766   void MovFloatToInt(Register dst, DoubleRegister src, DoubleRegister scratch);
768   void Move(Register dst, Smi smi) { LoadSmiLiteral(dst, smi); }
769   void Move(Register dst, Handle<HeapObject> value,
771   void Move(Register dst, ExternalReference reference);
772   void Move(Register dst, Register src, Condition cond = al);
773   void Move(DoubleRegister dst, DoubleRegister src);
774   void Move(Register dst, const MemOperand& src) { LoadU64(dst, src); }
776   void SmiUntag(Register dst, const MemOperand& src, RCBit rc = LeaveRC,
780   void SmiUntag(Register dst, Register src, RCBit rc = LeaveRC) {
782       srawi(dst, src, kSmiShift, rc);
784       ShiftRightS64(dst, src, Operand(kSmiShift), rc);
797   void SmiTag(Register dst, Register src, RCBit rc = LeaveRC) {
798     ShiftLeftU64(dst, src, Operand(kSmiShift), rc);
805   void ZeroExtByte(Register dst, Register src);
806   void ZeroExtHalfWord(Register dst, Register src);
807   void ZeroExtWord32(Register dst, Register src);
816   // and, if !test, shift them into the least significant bits of dst.
817   inline void ExtractBitRange(Register dst, Register src, int rangeStart,
825       andi(dst, src, Operand(((1 << width) - 1) << rangeEnd));
828       rldicl(dst, src, rotate, kBitsPerSystemPointer - width, rc);
830       rlwinm(dst, src, rotate, kBitsPerSystemPointer - width,
836   inline void ExtractBit(Register dst, Register src, uint32_t bitNumber,
838     ExtractBitRange(dst, src, bitNumber, bitNumber, rc, test);
842   // into the least significant bits of dst.
843   inline void ExtractBitMask(Register dst, Register src, uintptr_t mask,
864     ExtractBitRange(dst, src, start, end, rc, test);
917   // Compute dst = left + right, setting condition codes. dst may be same as
920   void AddAndCheckForOverflow(Register dst, Register left, Register right,
922   void AddAndCheckForOverflow(Register dst, Register left, intptr_t right,
925   // Compute dst = left - right, setting condition codes. dst may be same as
928   void SubAndCheckForOverflow(Register dst, Register left, Register right,
970   void SmiToPtrArrayOffset(Register dst, Register src) {
973     ShiftLeftU64(dst, src, Operand(kSystemPointerSizeLog2 - kSmiShift));
976     ShiftRightS64(dst, src, Operand(kSmiShift - kSystemPointerSizeLog2));
1005   void LoadF64(DoubleRegister dst, const MemOperand& mem,
1007   void LoadF32(DoubleRegister dst, const MemOperand& mem,
1015   void LoadF32WithUpdate(DoubleRegister dst, const MemOperand& mem,
1017   void LoadF64WithUpdate(DoubleRegister dst, const MemOperand& mem,
1027   void LoadU64(Register dst, const MemOperand& mem, Register scratch = no_reg);
1028   void LoadU32(Register dst, const MemOperand& mem, Register scratch = no_reg);
1029   void LoadS32(Register dst, const MemOperand& mem, Register scratch = no_reg);
1030   void LoadU16(Register dst, const MemOperand& mem, Register scratch = no_reg);
1031   void LoadS16(Register dst, const MemOperand& mem, Register scratch = no_reg);
1032   void LoadU8(Register dst, const MemOperand& mem, Register scratch = no_reg);
1033   void LoadS8(Register dst, const MemOperand& mem, Register scratch = no_reg);
1040   void LoadU64WithUpdate(Register dst, const MemOperand& mem,
1045   void LoadU64LE(Register dst, const MemOperand& mem, Register scratch);
1046   void LoadU32LE(Register dst, const MemOperand& mem, Register scratch);
1047   void LoadU16LE(Register dst, const MemOperand& mem, Register scratch);
1052   void LoadS32LE(Register dst, const MemOperand& mem, Register scratch);
1053   void LoadS16LE(Register dst, const MemOperand& mem, Register scratch);
1055   void LoadF64LE(DoubleRegister dst, const MemOperand& mem, Register scratch,
1057   void LoadF32LE(DoubleRegister dst, const MemOperand& mem, Register scratch,
1128   void LoadGlobalProxy(Register dst) {
1129     LoadNativeContextSlot(dst, Context::GLOBAL_PROXY_INDEX);
1132   void LoadNativeContextSlot(Register dst, int index);
1140   void AddSmiLiteral(Register dst, Register src, Smi smi, Register scratch);
1141   void SubSmiLiteral(Register dst, Register src, Smi smi, Register scratch);
1146   void AndSmiLiteral(Register dst, Register src, Smi smi, Register scratch,
1354   void DecodeField(Register dst, Register src, RCBit rc = LeaveRC) {
1355     ExtractBitRange(dst, src, Field::kShift + Field::kSize - 1, Field::kShift,