Lines Matching refs:dst
344 void TurboAssembler::Move(Register dst, Handle<HeapObject> value,
350 IndirectLoadConstant(dst, value);
355 mov(dst, Operand(static_cast<int>(index), rmode));
358 mov(dst, Operand(value.address(), rmode));
362 void TurboAssembler::Move(Register dst, ExternalReference reference) {
367 IndirectLoadExternalReference(dst, reference);
370 mov(dst, Operand(reference));
373 void TurboAssembler::Move(Register dst, Register src, Condition cond) {
375 if (dst != src) {
376 mr(dst, src);
380 void TurboAssembler::Move(DoubleRegister dst, DoubleRegister src) {
381 if (dst != src) {
382 fmr(dst, src);
561 void TurboAssembler::SmiUntag(Register dst, const MemOperand& src, RCBit rc,
564 LoadU32(dst, src, scratch);
566 LoadU64(dst, src, scratch);
569 SmiUntag(dst, rc);
890 void TurboAssembler::CanonicalizeNaN(const DoubleRegister dst,
893 fsub(dst, src, kDoubleRegZero);
896 void TurboAssembler::ConvertIntToDouble(Register src, DoubleRegister dst) {
897 MovIntToDouble(dst, src, r0);
898 fcfid(dst, dst);
902 DoubleRegister dst) {
903 MovUnsignedIntToDouble(dst, src, r0);
904 fcfid(dst, dst);
907 void TurboAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) {
908 MovIntToDouble(dst, src, r0);
909 fcfids(dst, dst);
913 DoubleRegister dst) {
914 MovUnsignedIntToDouble(dst, src, r0);
915 fcfids(dst, dst);
948 const Register dst,
963 dst, double_dst);
968 const DoubleRegister double_input, const Register dst,
978 MovDoubleToInt64(dst, double_dst);
1138 void TurboAssembler::LoadPC(Register dst) {
1140 mflr(dst);
1143 void TurboAssembler::ComputeCodeStartAddress(Register dst) {
1145 LoadPC(dst);
1146 subi(dst, dst, Operand(pc_offset() - kInstrSize));
1405 void TurboAssembler::MovFromFloatResult(const DoubleRegister dst) {
1406 Move(dst, d1);
1409 void TurboAssembler::MovFromFloatParameter(const DoubleRegister dst) {
1410 Move(dst, d1);
1720 void TurboAssembler::AddAndCheckForOverflow(Register dst, Register left,
1724 DCHECK(dst != overflow_dst);
1725 DCHECK(dst != scratch);
1734 if (dst == left) {
1736 add(dst, left, right); // Left is overwritten.
1737 xor_(overflow_dst, dst, scratch, xorRC); // Original left.
1738 if (!left_is_right) xor_(scratch, dst, right);
1739 } else if (dst == right) {
1741 add(dst, left, right); // Right is overwritten.
1742 xor_(overflow_dst, dst, left, xorRC);
1743 if (!left_is_right) xor_(scratch, dst, scratch); // Original right.
1745 add(dst, left, right);
1746 xor_(overflow_dst, dst, left, xorRC);
1747 if (!left_is_right) xor_(scratch, dst, right);
1752 void TurboAssembler::AddAndCheckForOverflow(Register dst, Register left,
1757 DCHECK(dst != overflow_dst);
1758 DCHECK(dst != scratch);
1763 if (dst == left) {
1768 AddS64(dst, left, Operand(right), scratch);
1769 xor_(overflow_dst, dst, original_left);
1771 and_(overflow_dst, overflow_dst, dst, SetRC);
1773 andc(overflow_dst, overflow_dst, dst, SetRC);
1777 void TurboAssembler::SubAndCheckForOverflow(Register dst, Register left,
1781 DCHECK(dst != overflow_dst);
1782 DCHECK(dst != scratch);
1788 if (dst == left) {
1790 sub(dst, left, right); // Left is overwritten.
1791 xor_(overflow_dst, dst, scratch);
1794 } else if (dst == right) {
1796 sub(dst, left, right); // Right is overwritten.
1797 xor_(overflow_dst, dst, left);
1801 sub(dst, left, right);
1802 xor_(overflow_dst, dst, left);
1808 void TurboAssembler::MinF64(DoubleRegister dst, DoubleRegister lhs,
1814 xsmindp(dst, lhs, rhs);
1831 fadd(dst, scratch, rhs);
1833 fsub(dst, scratch, rhs);
1835 fneg(dst, dst);
1840 fadd(dst, lhs, rhs);
1844 if (rhs != dst) {
1845 fmr(dst, rhs);
1850 if (lhs != dst) {
1851 fmr(dst, lhs);
1856 void TurboAssembler::MaxF64(DoubleRegister dst, DoubleRegister lhs,
1862 xsmaxdp(dst, lhs, rhs);
1874 fadd(dst, lhs, rhs);
1879 fadd(dst, lhs, rhs);
1883 if (rhs != dst) {
1884 fmr(dst, rhs);
1889 if (lhs != dst) {
1890 fmr(dst, lhs);
2098 void MacroAssembler::LoadNativeContextSlot(Register dst, int index) {
2099 LoadMap(dst, cp);
2101 dst,
2102 FieldMemOperand(dst, Map::kConstructorOrBackPointerOrNativeContextOffset),
2104 LoadTaggedPointerField(dst, MemOperand(dst, Context::SlotOffset(index)), r0);
2427 void TurboAssembler::LoadIntLiteral(Register dst, int value) {
2428 mov(dst, Operand(value));
2431 void TurboAssembler::LoadSmiLiteral(Register dst, Smi smi) {
2432 mov(dst, Operand(smi));
2484 void TurboAssembler::MovIntToDouble(DoubleRegister dst, Register src,
2489 mtfprwa(dst, src);
2505 lfd(dst, MemOperand(sp, 0));
2509 void TurboAssembler::MovUnsignedIntToDouble(DoubleRegister dst, Register src,
2514 mtfprwz(dst, src);
2530 lfd(dst, MemOperand(sp, 0));
2534 void TurboAssembler::MovInt64ToDouble(DoubleRegister dst,
2541 mtfprd(dst, src);
2554 lfd(dst, MemOperand(sp, 0));
2559 void TurboAssembler::MovInt64ComponentsToDouble(DoubleRegister dst,
2566 mtfprd(dst, scratch);
2574 lfd(dst, MemOperand(sp));
2579 void TurboAssembler::InsertDoubleLow(DoubleRegister dst, Register src,
2583 mffprd(scratch, dst);
2585 mtfprd(dst, scratch);
2591 stfd(dst, MemOperand(sp));
2594 lfd(dst, MemOperand(sp));
2598 void TurboAssembler::InsertDoubleHigh(DoubleRegister dst, Register src,
2602 mffprd(scratch, dst);
2604 mtfprd(dst, scratch);
2610 stfd(dst, MemOperand(sp));
2613 lfd(dst, MemOperand(sp));
2617 void TurboAssembler::MovDoubleLowToInt(Register dst, DoubleRegister src) {
2620 mffprwz(dst, src);
2628 lwz(dst, MemOperand(sp, Register::kMantissaOffset));
2632 void TurboAssembler::MovDoubleHighToInt(Register dst, DoubleRegister src) {
2635 mffprd(dst, src);
2636 srdi(dst, dst, Operand(32));
2644 lwz(dst, MemOperand(sp, Register::kExponentOffset));
2652 Register dst, DoubleRegister src) {
2655 mffprd(dst, src);
2664 ld(dst, MemOperand(sp, 0));
2667 lwz(dst, MemOperand(sp, Register::kMantissaOffset));
2672 void TurboAssembler::MovIntToFloat(DoubleRegister dst, Register src,
2676 mtfprd(dst, scratch);
2677 xscvspdpn(dst, dst);
2683 lfs(dst, MemOperand(sp, 0));
2687 void TurboAssembler::MovFloatToInt(Register dst, DoubleRegister src,
2691 mffprwz(dst, scratch);
2697 lwz(dst, MemOperand(sp, 0));
2701 void TurboAssembler::AddS64(Register dst, Register src, Register value, OEBit s,
2703 add(dst, src, value, s, r);
2706 void TurboAssembler::AddS64(Register dst, Register src, const Operand& value,
2709 addi(dst, src, value);
2712 add(dst, src, scratch, s, r);
2716 void TurboAssembler::SubS64(Register dst, Register src, Register value, OEBit s,
2718 sub(dst, src, value, s, r);
2721 void TurboAssembler::SubS64(Register dst, Register src, const Operand& value,
2724 subi(dst, src, value);
2727 sub(dst, src, scratch, s, r);
2731 void TurboAssembler::AddS32(Register dst, Register src, Register value,
2733 AddS64(dst, src, value, LeaveOE, r);
2734 extsw(dst, dst, r);
2737 void TurboAssembler::AddS32(Register dst, Register src, const Operand& value,
2739 AddS64(dst, src, value, scratch, LeaveOE, r);
2740 extsw(dst, dst, r);
2743 void TurboAssembler::SubS32(Register dst, Register src, Register value,
2745 SubS64(dst, src, value, LeaveOE, r);
2746 extsw(dst, dst, r);
2749 void TurboAssembler::SubS32(Register dst, Register src, const Operand& value,
2751 SubS64(dst, src, value, scratch, LeaveOE, r);
2752 extsw(dst, dst, r);
2755 void TurboAssembler::MulS64(Register dst, Register src, const Operand& value,
2758 mulli(dst, src, value);
2761 mulld(dst, src, scratch, s, r);
2765 void TurboAssembler::MulS64(Register dst, Register src, Register value, OEBit s,
2767 mulld(dst, src, value, s, r);
2770 void TurboAssembler::MulS32(Register dst, Register src, const Operand& value,
2772 MulS64(dst, src, value, scratch, s, r);
2773 extsw(dst, dst, r);
2776 void TurboAssembler::MulS32(Register dst, Register src, Register value, OEBit s,
2778 MulS64(dst, src, value, s, r);
2779 extsw(dst, dst, r);
2782 void TurboAssembler::DivS64(Register dst, Register src, Register value, OEBit s,
2784 divd(dst, src, value, s, r);
2787 void TurboAssembler::DivU64(Register dst, Register src, Register value, OEBit s,
2789 divdu(dst, src, value, s, r);
2792 void TurboAssembler::DivS32(Register dst, Register src, Register value, OEBit s,
2794 divw(dst, src, value, s, r);
2795 extsw(dst, dst);
2797 void TurboAssembler::DivU32(Register dst, Register src, Register value, OEBit s,
2799 divwu(dst, src, value, s, r);
2800 ZeroExtWord32(dst, dst);
2803 void TurboAssembler::ModS64(Register dst, Register src, Register value) {
2805 modsd(dst, src, value);
2807 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2811 sub(dst, src, scratch);
2816 void TurboAssembler::ModU64(Register dst, Register src, Register value) {
2818 modud(dst, src, value);
2820 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2824 sub(dst, src, scratch);
2829 void TurboAssembler::ModS32(Register dst, Register src, Register value) {
2831 modsw(dst, src, value);
2833 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2837 sub(dst, src, scratch);
2840 extsw(dst, dst);
2842 void TurboAssembler::ModU32(Register dst, Register src, Register value) {
2844 moduw(dst, src, value);
2846 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2850 sub(dst, src, scratch);
2853 ZeroExtWord32(dst, dst);
2856 void TurboAssembler::AndU64(Register dst, Register src, const Operand& value,
2859 andi(dst, src, value);
2862 and_(dst, src, scratch, r);
2866 void TurboAssembler::AndU64(Register dst, Register src, Register value,
2868 and_(dst, src, value, r);
2871 void TurboAssembler::OrU64(Register dst, Register src, const Operand& value,
2874 ori(dst, src, value);
2877 orx(dst, src, scratch, r);
2881 void TurboAssembler::OrU64(Register dst, Register src, Register value,
2883 orx(dst, src, value, r);
2886 void TurboAssembler::XorU64(Register dst, Register src, const Operand& value,
2889 xori(dst, src, value);
2892 xor_(dst, src, scratch, r);
2896 void TurboAssembler::XorU64(Register dst, Register src, Register value,
2898 xor_(dst, src, value, r);
2901 void TurboAssembler::AndU32(Register dst, Register src, const Operand& value,
2903 AndU64(dst, src, value, scratch, r);
2904 extsw(dst, dst, r);
2907 void TurboAssembler::AndU32(Register dst, Register src, Register value,
2909 AndU64(dst, src, value, r);
2910 extsw(dst, dst, r);
2913 void TurboAssembler::OrU32(Register dst, Register src, const Operand& value,
2915 OrU64(dst, src, value, scratch, r);
2916 extsw(dst, dst, r);
2919 void TurboAssembler::OrU32(Register dst, Register src, Register value,
2921 OrU64(dst, src, value, r);
2922 extsw(dst, dst, r);
2925 void TurboAssembler::XorU32(Register dst, Register src, const Operand& value,
2927 XorU64(dst, src, value, scratch, r);
2928 extsw(dst, dst, r);
2931 void TurboAssembler::XorU32(Register dst, Register src, Register value,
2933 XorU64(dst, src, value, r);
2934 extsw(dst, dst, r);
2937 void TurboAssembler::ShiftLeftU64(Register dst, Register src,
2939 sldi(dst, src, value, r);
2942 void TurboAssembler::ShiftRightU64(Register dst, Register src,
2944 srdi(dst, src, value, r);
2947 void TurboAssembler::ShiftRightS64(Register dst, Register src,
2949 sradi(dst, src, value.immediate(), r);
2952 void TurboAssembler::ShiftLeftU32(Register dst, Register src,
2954 slwi(dst, src, value, r);
2957 void TurboAssembler::ShiftRightU32(Register dst, Register src,
2959 srwi(dst, src, value, r);
2962 void TurboAssembler::ShiftRightS32(Register dst, Register src,
2964 srawi(dst, src, value.immediate(), r);
2967 void TurboAssembler::ShiftLeftU64(Register dst, Register src, Register value,
2969 sld(dst, src, value, r);
2972 void TurboAssembler::ShiftRightU64(Register dst, Register src, Register value,
2974 srd(dst, src, value, r);
2977 void TurboAssembler::ShiftRightS64(Register dst, Register src, Register value,
2979 srad(dst, src, value, r);
2982 void TurboAssembler::ShiftLeftU32(Register dst, Register src, Register value,
2984 slw(dst, src, value, r);
2987 void TurboAssembler::ShiftRightU32(Register dst, Register src, Register value,
2989 srw(dst, src, value, r);
2992 void TurboAssembler::ShiftRightS32(Register dst, Register src, Register value,
2994 sraw(dst, src, value, r);
3057 void TurboAssembler::AddF64(DoubleRegister dst, DoubleRegister lhs,
3059 fadd(dst, lhs, rhs, r);
3062 void TurboAssembler::SubF64(DoubleRegister dst, DoubleRegister lhs,
3064 fsub(dst, lhs, rhs, r);
3067 void TurboAssembler::MulF64(DoubleRegister dst, DoubleRegister lhs,
3069 fmul(dst, lhs, rhs, r);
3072 void TurboAssembler::DivF64(DoubleRegister dst, DoubleRegister lhs,
3074 fdiv(dst, lhs, rhs, r);
3077 void TurboAssembler::AddF32(DoubleRegister dst, DoubleRegister lhs,
3079 fadd(dst, lhs, rhs, r);
3080 frsp(dst, dst, r);
3083 void TurboAssembler::SubF32(DoubleRegister dst, DoubleRegister lhs,
3085 fsub(dst, lhs, rhs, r);
3086 frsp(dst, dst, r);
3089 void TurboAssembler::MulF32(DoubleRegister dst, DoubleRegister lhs,
3091 fmul(dst, lhs, rhs, r);
3092 frsp(dst, dst, r);
3095 void TurboAssembler::DivF32(DoubleRegister dst, DoubleRegister lhs,
3097 fdiv(dst, lhs, rhs, r);
3098 frsp(dst, dst, r);
3101 void TurboAssembler::CopySignF64(DoubleRegister dst, DoubleRegister lhs,
3103 fcpsgn(dst, rhs, lhs, r);
3126 void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi smi,
3129 AddS64(dst, src, Operand(smi.ptr()), scratch);
3132 add(dst, src, scratch);
3136 void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi smi,
3139 AddS64(dst, src, Operand(-(static_cast<intptr_t>(smi.ptr()))), scratch);
3142 sub(dst, src, scratch);
3146 void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi smi,
3149 AndU64(dst, src, Operand(smi), scratch, rc);
3152 and_(dst, src, scratch, rc);
3257 void TurboAssembler::LoadS8(Register dst, const MemOperand& mem,
3259 LoadU8(dst, mem, scratch);
3260 extsb(dst, dst);
3319 void TurboAssembler::LoadS32LE(Register dst, const MemOperand& mem,
3322 LoadU32LE(dst, mem, scratch);
3323 extsw(dst, dst);
3325 LoadS32(dst, mem, scratch);
3329 void TurboAssembler::LoadS16LE(Register dst, const MemOperand& mem,
3332 LoadU16LE(dst, mem, scratch);
3333 extsh(dst, dst);
3335 LoadS16(dst, mem, scratch);
3339 void TurboAssembler::LoadF64LE(DoubleRegister dst, const MemOperand& mem,
3344 LoadF64(dst, MemOperand(sp), scratch2);
3347 LoadF64(dst, mem, scratch);
3351 void TurboAssembler::LoadF32LE(DoubleRegister dst, const MemOperand& mem,
3356 LoadF32(dst, MemOperand(sp, 4), scratch2);
3359 LoadF32(dst, mem, scratch);
3363 void TurboAssembler::StoreF64LE(DoubleRegister dst, const MemOperand& mem,
3366 StoreF64(dst, mem, scratch2);
3370 StoreF64(dst, mem, scratch);
3374 void TurboAssembler::StoreF32LE(DoubleRegister dst, const MemOperand& mem,
3377 StoreF32(dst, mem, scratch2);
3381 StoreF32(dst, mem, scratch);
3400 void TurboAssembler::SwapP(Register src, Register dst, Register scratch) {
3401 if (src == dst) return;
3402 DCHECK(!AreAliased(src, dst, scratch));
3404 mr(src, dst);
3405 mr(dst, scratch);
3408 void TurboAssembler::SwapP(Register src, MemOperand dst, Register scratch) {
3409 if (dst.ra() != r0 && dst.ra().is_valid())
3410 DCHECK(!AreAliased(src, dst.ra(), scratch));
3411 if (dst.rb() != r0 && dst.rb().is_valid())
3412 DCHECK(!AreAliased(src, dst.rb(), scratch));
3415 LoadU64(src, dst, r0);
3416 StoreU64(scratch, dst, r0);
3419 void TurboAssembler::SwapP(MemOperand src, MemOperand dst, Register scratch_0,
3425 if (dst.ra() != r0 && dst.ra().is_valid())
3426 DCHECK(!AreAliased(dst.ra(), scratch_0, scratch_1));
3427 if (dst.rb() != r0 && dst.rb().is_valid())
3428 DCHECK(!AreAliased(dst.rb(), scratch_0, scratch_1));
3430 if (is_int16(src.offset()) || is_int16(dst.offset())) {
3434 src = dst;
3435 dst = temp;
3437 LoadU64(scratch_1, dst, scratch_0);
3440 StoreU64(scratch_0, dst, scratch_1);
3442 LoadU64(scratch_1, dst, scratch_0);
3445 StoreU64(scratch_0, dst, scratch_1);
3451 void TurboAssembler::SwapFloat32(DoubleRegister src, DoubleRegister dst,
3453 if (src == dst) return;
3454 DCHECK(!AreAliased(src, dst, scratch));
3456 fmr(src, dst);
3457 fmr(dst, scratch);
3460 void TurboAssembler::SwapFloat32(DoubleRegister src, MemOperand dst,
3464 LoadF32(src, dst, r0);
3465 StoreF32(scratch, dst, r0);
3468 void TurboAssembler::SwapFloat32(MemOperand src, MemOperand dst,
3473 LoadF32(scratch_1, dst, r0);
3474 StoreF32(scratch_0, dst, r0);
3478 void TurboAssembler::SwapDouble(DoubleRegister src, DoubleRegister dst,
3480 if (src == dst) return;
3481 DCHECK(!AreAliased(src, dst, scratch));
3483 fmr(src, dst);
3484 fmr(dst, scratch);
3487 void TurboAssembler::SwapDouble(DoubleRegister src, MemOperand dst,
3491 LoadF64(src, dst, r0);
3492 StoreF64(scratch, dst, r0);
3495 void TurboAssembler::SwapDouble(MemOperand src, MemOperand dst,
3500 LoadF64(scratch_1, dst, r0);
3501 StoreF64(scratch_0, dst, r0);
3505 void TurboAssembler::SwapSimd128(Simd128Register src, Simd128Register dst,
3507 if (src == dst) return;
3509 vor(src, dst, dst);
3510 vor(dst, scratch, scratch);
3513 void TurboAssembler::SwapSimd128(Simd128Register src, MemOperand dst,
3519 mov(ip, Operand(dst.offset()));
3520 LoadSimd128(v0, MemOperand(dst.ra(), ip));
3521 StoreSimd128(src, MemOperand(dst.ra(), ip));
3528 void TurboAssembler::SwapSimd128(MemOperand src, MemOperand dst,
3538 mov(ip, Operand(dst.offset()));
3539 LoadSimd128(v1, MemOperand(dst.ra(), ip));
3541 StoreSimd128(v0, MemOperand(dst.ra(), ip));
3552 void TurboAssembler::ByteReverseU16(Register dst, Register val,
3555 brh(dst, val);
3556 ZeroExtHalfWord(dst, dst);
3560 rlwinm(dst, val, 24, 24, 31);
3561 orx(dst, scratch, dst);
3562 ZeroExtHalfWord(dst, dst);
3565 void TurboAssembler::ByteReverseU32(Register dst, Register val,
3568 brw(dst, val);
3569 ZeroExtWord32(dst, dst);
3575 ZeroExtWord32(dst, scratch);
3578 void TurboAssembler::ByteReverseU64(Register dst, Register val, Register) {
3580 brd(dst, val);
3585 ldbrx(dst, MemOperand(r0, sp));
3744 void TurboAssembler::ZeroExtByte(Register dst, Register src) {
3745 clrldi(dst, src, Operand(56));
3748 void TurboAssembler::ZeroExtHalfWord(Register dst, Register src) {
3749 clrldi(dst, src, Operand(48));
3752 void TurboAssembler::ZeroExtWord32(Register dst, Register src) {
3753 clrldi(dst, src, Operand(32));
3759 void TurboAssembler::Popcnt32(Register dst, Register src) { popcntw(dst, src); }
3761 void TurboAssembler::Popcnt64(Register dst, Register src) { popcntd(dst, src); }
3763 void TurboAssembler::CountLeadingZerosU32(Register dst, Register src, RCBit r) {
3764 cntlzw(dst, src, r);
3767 void TurboAssembler::CountLeadingZerosU64(Register dst, Register src, RCBit r) {
3768 cntlzd(dst, src, r);
3776 li(dst, Operand::Zero()); \
3781 addi(dst, dst, Operand(1)); /* dst++ */ \
3784 void TurboAssembler::CountTrailingZerosU32(Register dst, Register src,
3788 cnttzw(dst, src, r);
3794 void TurboAssembler::CountTrailingZerosU64(Register dst, Register src,
3798 cnttzd(dst, src, r);
3805 void TurboAssembler::ClearByteU64(Register dst, int byte_idx) {
3808 rldicl(dst, dst, shift, 8);
3809 rldicl(dst, dst, 64-shift, 0);
3812 void TurboAssembler::ReverseBitsU64(Register dst, Register src,
3814 ByteReverseU64(dst, src);
3816 ReverseBitsInSingleByteU64(dst, dst, scratch1, scratch2, i);
3820 void TurboAssembler::ReverseBitsU32(Register dst, Register src,
3822 ByteReverseU32(dst, src, scratch1);
3824 ReverseBitsInSingleByteU64(dst, dst, scratch1, scratch2, i);
3829 void TurboAssembler::ReverseBitsInSingleByteU64(Register dst, Register src,
3850 // clear jth byte of dst and insert jth byte of scratch2
3851 ClearByteU64(dst, j);
3852 orx(dst, dst, scratch2);