Lines Matching defs:src
10 #include "src/base/bits.h"
11 #include "src/base/division-by-constant.h"
12 #include "src/codegen/callable.h"
13 #include "src/codegen/code-factory.h"
14 #include "src/codegen/external-reference-table.h"
15 #include "src/codegen/interface-descriptors-inl.h"
16 #include "src/codegen/macro-assembler.h"
17 #include "src/codegen/register-configuration.h"
18 #include "src/debug/debug.h"
19 #include "src/deoptimizer/deoptimizer.h"
20 #include "src/execution/frames-inl.h"
21 #include "src/heap/memory-chunk.h"
22 #include "src/init/bootstrapper.h"
23 #include "src/logging/counters.h"
24 #include "src/runtime/runtime.h"
25 #include "src/snapshot/snapshot.h"
28 #include "src/wasm/wasm-code-manager.h"
34 #include "src/codegen/ppc/macro-assembler-ppc.h"
373 void TurboAssembler::Move(Register dst, Register src, Condition cond) {
375 if (dst != src) {
376 mr(dst, src);
380 void TurboAssembler::Move(DoubleRegister dst, DoubleRegister src) {
381 if (dst != src) {
382 fmr(dst, src);
561 void TurboAssembler::SmiUntag(Register dst, const MemOperand& src, RCBit rc,
564 LoadU32(dst, src, scratch);
566 LoadU64(dst, src, scratch);
585 Register src) {
587 ZeroExtWord32(destination, src);
891 const DoubleRegister src) {
893 fsub(dst, src, kDoubleRegZero);
896 void TurboAssembler::ConvertIntToDouble(Register src, DoubleRegister dst) {
897 MovIntToDouble(dst, src, r0);
901 void TurboAssembler::ConvertUnsignedIntToDouble(Register src,
903 MovUnsignedIntToDouble(dst, src, r0);
907 void TurboAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) {
908 MovIntToDouble(dst, src, r0);
912 void TurboAssembler::ConvertUnsignedIntToFloat(Register src,
914 MovUnsignedIntToDouble(dst, src, r0);
919 void TurboAssembler::ConvertInt64ToDouble(Register src,
921 MovInt64ToDouble(double_dst, src);
925 void TurboAssembler::ConvertUnsignedInt64ToFloat(Register src,
927 MovInt64ToDouble(double_dst, src);
931 void TurboAssembler::ConvertUnsignedInt64ToDouble(Register src,
933 MovInt64ToDouble(double_dst, src);
937 void TurboAssembler::ConvertInt64ToFloat(Register src,
939 MovInt64ToDouble(double_dst, src);
1477 Register src = r9, dest = r8;
1478 addi(src, sp, Operand(-kSystemPointerSize));
1489 LoadU64WithUpdate(r0, MemOperand(src, kSystemPointerSize));
2270 void TurboAssembler::MovToFloatParameter(DoubleRegister src) { Move(d1, src); }
2272 void TurboAssembler::MovToFloatResult(DoubleRegister src) { Move(d1, src); }
2484 void TurboAssembler::MovIntToDouble(DoubleRegister dst, Register src,
2486 // sign-extend src to 64-bit
2489 mtfprwa(dst, src);
2494 DCHECK(src != scratch);
2497 extsw(scratch, src);
2500 srawi(scratch, src, 31);
2502 stw(src, MemOperand(sp, Register::kMantissaOffset));
2509 void TurboAssembler::MovUnsignedIntToDouble(DoubleRegister dst, Register src,
2511 // zero-extend src to 64-bit
2514 mtfprwz(dst, src);
2519 DCHECK(src != scratch);
2522 clrldi(scratch, src, Operand(32));
2527 stw(src, MemOperand(sp, Register::kMantissaOffset));
2538 Register src) {
2541 mtfprd(dst, src);
2548 std(src, MemOperand(sp, 0));
2551 stw(src, MemOperand(sp, Register::kMantissaOffset));
2579 void TurboAssembler::InsertDoubleLow(DoubleRegister dst, Register src,
2584 rldimi(scratch, src, 0, 32);
2592 stw(src, MemOperand(sp, Register::kMantissaOffset));
2598 void TurboAssembler::InsertDoubleHigh(DoubleRegister dst, Register src,
2603 rldimi(scratch, src, 32, 0);
2611 stw(src, MemOperand(sp, Register::kExponentOffset));
2617 void TurboAssembler::MovDoubleLowToInt(Register dst, DoubleRegister src) {
2620 mffprwz(dst, src);
2626 stfd(src, MemOperand(sp));
2632 void TurboAssembler::MovDoubleHighToInt(Register dst, DoubleRegister src) {
2635 mffprd(dst, src);
2642 stfd(src, MemOperand(sp));
2652 Register dst, DoubleRegister src) {
2655 mffprd(dst, src);
2661 stfd(src, MemOperand(sp));
2672 void TurboAssembler::MovIntToFloat(DoubleRegister dst, Register src,
2675 ShiftLeftU64(scratch, src, Operand(32));
2681 stw(src, MemOperand(sp, 0));
2687 void TurboAssembler::MovFloatToInt(Register dst, DoubleRegister src,
2690 xscvdpspn(scratch, src);
2695 stfs(src, MemOperand(sp, 0));
2701 void TurboAssembler::AddS64(Register dst, Register src, Register value, OEBit s,
2703 add(dst, src, value, s, r);
2706 void TurboAssembler::AddS64(Register dst, Register src, const Operand& value,
2709 addi(dst, src, value);
2712 add(dst, src, scratch, s, r);
2716 void TurboAssembler::SubS64(Register dst, Register src, Register value, OEBit s,
2718 sub(dst, src, value, s, r);
2721 void TurboAssembler::SubS64(Register dst, Register src, const Operand& value,
2724 subi(dst, src, value);
2727 sub(dst, src, scratch, s, r);
2731 void TurboAssembler::AddS32(Register dst, Register src, Register value,
2733 AddS64(dst, src, value, LeaveOE, r);
2737 void TurboAssembler::AddS32(Register dst, Register src, const Operand& value,
2739 AddS64(dst, src, value, scratch, LeaveOE, r);
2743 void TurboAssembler::SubS32(Register dst, Register src, Register value,
2745 SubS64(dst, src, value, LeaveOE, r);
2749 void TurboAssembler::SubS32(Register dst, Register src, const Operand& value,
2751 SubS64(dst, src, value, scratch, LeaveOE, r);
2755 void TurboAssembler::MulS64(Register dst, Register src, const Operand& value,
2758 mulli(dst, src, value);
2761 mulld(dst, src, scratch, s, r);
2765 void TurboAssembler::MulS64(Register dst, Register src, Register value, OEBit s,
2767 mulld(dst, src, value, s, r);
2770 void TurboAssembler::MulS32(Register dst, Register src, const Operand& value,
2772 MulS64(dst, src, value, scratch, s, r);
2776 void TurboAssembler::MulS32(Register dst, Register src, Register value, OEBit s,
2778 MulS64(dst, src, value, s, r);
2782 void TurboAssembler::DivS64(Register dst, Register src, Register value, OEBit s,
2784 divd(dst, src, value, s, r);
2787 void TurboAssembler::DivU64(Register dst, Register src, Register value, OEBit s,
2789 divdu(dst, src, value, s, r);
2792 void TurboAssembler::DivS32(Register dst, Register src, Register value, OEBit s,
2794 divw(dst, src, value, s, r);
2797 void TurboAssembler::DivU32(Register dst, Register src, Register value, OEBit s,
2799 divwu(dst, src, value, s, r);
2803 void TurboAssembler::ModS64(Register dst, Register src, Register value) {
2805 modsd(dst, src, value);
2807 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2809 divd(scratch, src, value);
2811 sub(dst, src, scratch);
2816 void TurboAssembler::ModU64(Register dst, Register src, Register value) {
2818 modud(dst, src, value);
2820 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2822 divdu(scratch, src, value);
2824 sub(dst, src, scratch);
2829 void TurboAssembler::ModS32(Register dst, Register src, Register value) {
2831 modsw(dst, src, value);
2833 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2835 divw(scratch, src, value);
2837 sub(dst, src, scratch);
2842 void TurboAssembler::ModU32(Register dst, Register src, Register value) {
2844 moduw(dst, src, value);
2846 Register scratch = GetRegisterThatIsNotOneOf(dst, src, value);
2848 divwu(scratch, src, value);
2850 sub(dst, src, scratch);
2856 void TurboAssembler::AndU64(Register dst, Register src, const Operand& value,
2859 andi(dst, src, value);
2862 and_(dst, src, scratch, r);
2866 void TurboAssembler::AndU64(Register dst, Register src, Register value,
2868 and_(dst, src, value, r);
2871 void TurboAssembler::OrU64(Register dst, Register src, const Operand& value,
2874 ori(dst, src, value);
2877 orx(dst, src, scratch, r);
2881 void TurboAssembler::OrU64(Register dst, Register src, Register value,
2883 orx(dst, src, value, r);
2886 void TurboAssembler::XorU64(Register dst, Register src, const Operand& value,
2889 xori(dst, src, value);
2892 xor_(dst, src, scratch, r);
2896 void TurboAssembler::XorU64(Register dst, Register src, Register value,
2898 xor_(dst, src, value, r);
2901 void TurboAssembler::AndU32(Register dst, Register src, const Operand& value,
2903 AndU64(dst, src, value, scratch, r);
2907 void TurboAssembler::AndU32(Register dst, Register src, Register value,
2909 AndU64(dst, src, value, r);
2913 void TurboAssembler::OrU32(Register dst, Register src, const Operand& value,
2915 OrU64(dst, src, value, scratch, r);
2919 void TurboAssembler::OrU32(Register dst, Register src, Register value,
2921 OrU64(dst, src, value, r);
2925 void TurboAssembler::XorU32(Register dst, Register src, const Operand& value,
2927 XorU64(dst, src, value, scratch, r);
2931 void TurboAssembler::XorU32(Register dst, Register src, Register value,
2933 XorU64(dst, src, value, r);
2937 void TurboAssembler::ShiftLeftU64(Register dst, Register src,
2939 sldi(dst, src, value, r);
2942 void TurboAssembler::ShiftRightU64(Register dst, Register src,
2944 srdi(dst, src, value, r);
2947 void TurboAssembler::ShiftRightS64(Register dst, Register src,
2949 sradi(dst, src, value.immediate(), r);
2952 void TurboAssembler::ShiftLeftU32(Register dst, Register src,
2954 slwi(dst, src, value, r);
2957 void TurboAssembler::ShiftRightU32(Register dst, Register src,
2959 srwi(dst, src, value, r);
2962 void TurboAssembler::ShiftRightS32(Register dst, Register src,
2964 srawi(dst, src, value.immediate(), r);
2967 void TurboAssembler::ShiftLeftU64(Register dst, Register src, Register value,
2969 sld(dst, src, value, r);
2972 void TurboAssembler::ShiftRightU64(Register dst, Register src, Register value,
2974 srd(dst, src, value, r);
2977 void TurboAssembler::ShiftRightS64(Register dst, Register src, Register value,
2979 srad(dst, src, value, r);
2982 void TurboAssembler::ShiftLeftU32(Register dst, Register src, Register value,
2984 slw(dst, src, value, r);
2987 void TurboAssembler::ShiftRightU32(Register dst, Register src, Register value,
2989 srw(dst, src, value, r);
2992 void TurboAssembler::ShiftRightS32(Register dst, Register src, Register value,
2994 sraw(dst, src, value, r);
3126 void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi smi,
3129 AddS64(dst, src, Operand(smi.ptr()), scratch);
3132 add(dst, src, scratch);
3136 void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi smi,
3139 AddS64(dst, src, Operand(-(static_cast<intptr_t>(smi.ptr()))), scratch);
3142 sub(dst, src, scratch);
3146 void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi smi,
3149 AndU64(dst, src, Operand(smi), scratch, rc);
3152 and_(dst, src, scratch, rc);
3263 void TurboAssembler::LoadSimd128(Simd128Register src, const MemOperand& mem) {
3265 lxvx(src, mem);
3268 void TurboAssembler::StoreSimd128(Simd128Register src, const MemOperand& mem) {
3270 stxvx(src, mem);
3400 void TurboAssembler::SwapP(Register src, Register dst, Register scratch) {
3401 if (src == dst) return;
3402 DCHECK(!AreAliased(src, dst, scratch));
3403 mr(scratch, src);
3404 mr(src, dst);
3408 void TurboAssembler::SwapP(Register src, MemOperand dst, Register scratch) {
3410 DCHECK(!AreAliased(src, dst.ra(), scratch));
3412 DCHECK(!AreAliased(src, dst.rb(), scratch));
3413 DCHECK(!AreAliased(src, scratch));
3414 mr(scratch, src);
3415 LoadU64(src, dst, r0);
3419 void TurboAssembler::SwapP(MemOperand src, MemOperand dst, Register scratch_0,
3421 if (src.ra() != r0 && src.ra().is_valid())
3422 DCHECK(!AreAliased(src.ra(), scratch_0, scratch_1));
3423 if (src.rb() != r0 && src.rb().is_valid())
3424 DCHECK(!AreAliased(src.rb(), scratch_0, scratch_1));
3430 if (is_int16(src.offset()) || is_int16(dst.offset())) {
3431 if (!is_int16(src.offset())) {
3433 MemOperand temp = src;
3434 src = dst;
3438 LoadU64(scratch_0, src);
3439 StoreU64(scratch_1, src);
3444 LoadU64(scratch_0, src, scratch_1);
3447 StoreU64(scratch_1, src, scratch_0);
3451 void TurboAssembler::SwapFloat32(DoubleRegister src, DoubleRegister dst,
3453 if (src == dst) return;
3454 DCHECK(!AreAliased(src, dst, scratch));
3455 fmr(scratch, src);
3456 fmr(src, dst);
3460 void TurboAssembler::SwapFloat32(DoubleRegister src, MemOperand dst,
3462 DCHECK(!AreAliased(src, scratch));
3463 fmr(scratch, src);
3464 LoadF32(src, dst, r0);
3468 void TurboAssembler::SwapFloat32(MemOperand src, MemOperand dst,
3472 LoadF32(scratch_0, src, r0);
3475 StoreF32(scratch_1, src, r0);
3478 void TurboAssembler::SwapDouble(DoubleRegister src, DoubleRegister dst,
3480 if (src == dst) return;
3481 DCHECK(!AreAliased(src, dst, scratch));
3482 fmr(scratch, src);
3483 fmr(src, dst);
3487 void TurboAssembler::SwapDouble(DoubleRegister src, MemOperand dst,
3489 DCHECK(!AreAliased(src, scratch));
3490 fmr(scratch, src);
3491 LoadF64(src, dst, r0);
3495 void TurboAssembler::SwapDouble(MemOperand src, MemOperand dst,
3499 LoadF64(scratch_0, src, r0);
3502 StoreF64(scratch_1, src, r0);
3505 void TurboAssembler::SwapSimd128(Simd128Register src, Simd128Register dst,
3507 if (src == dst) return;
3508 vor(scratch, src, src);
3509 vor(src, dst, dst);
3513 void TurboAssembler::SwapSimd128(Simd128Register src, MemOperand dst,
3515 DCHECK(src != scratch);
3521 StoreSimd128(src, MemOperand(dst.ra(), ip));
3522 vor(src, v0, v0);
3528 void TurboAssembler::SwapSimd128(MemOperand src, MemOperand dst,
3536 mov(ip, Operand(src.offset()));
3537 LoadSimd128(v0, MemOperand(src.ra(), ip));
3542 mov(ip, Operand(src.offset()));
3543 StoreSimd128(v1, MemOperand(src.ra(), ip));
3744 void TurboAssembler::ZeroExtByte(Register dst, Register src) {
3745 clrldi(dst, src, Operand(56));
3748 void TurboAssembler::ZeroExtHalfWord(Register dst, Register src) {
3749 clrldi(dst, src, Operand(48));
3752 void TurboAssembler::ZeroExtWord32(Register dst, Register src) {
3753 clrldi(dst, src, Operand(32));
3759 void TurboAssembler::Popcnt32(Register dst, Register src) { popcntw(dst, src); }
3761 void TurboAssembler::Popcnt64(Register dst, Register src) { popcntd(dst, src); }
3763 void TurboAssembler::CountLeadingZerosU32(Register dst, Register src, RCBit r) {
3764 cntlzw(dst, src, r);
3767 void TurboAssembler::CountLeadingZerosU64(Register dst, Register src, RCBit r) {
3768 cntlzd(dst, src, r);
3775 mr(scratch1, src); \
3777 bind(&loop); /* while ((src & 1) == 0) */ \
3780 srdi(scratch1, scratch1, Operand(1)); /* src >>= 1;*/ \
3784 void TurboAssembler::CountTrailingZerosU32(Register dst, Register src,
3788 cnttzw(dst, src, r);
3794 void TurboAssembler::CountTrailingZerosU64(Register dst, Register src,
3798 cnttzd(dst, src, r);
3812 void TurboAssembler::ReverseBitsU64(Register dst, Register src,
3814 ByteReverseU64(dst, src);
3820 void TurboAssembler::ReverseBitsU32(Register dst, Register src,
3822 ByteReverseU32(dst, src, scratch1);
3829 void TurboAssembler::ReverseBitsInSingleByteU64(Register dst, Register src,
3840 // move bit (j+1)*8-i-1 of src to bit j*8+i of scratch1, erase bits
3844 rldicr(scratch1, src, shift, j*8+i);