Lines Matching refs:ra
199 MemOperand::MemOperand(Register ra, Register rb)
200 : ra_(ra), offset_(0), rb_(rb) {}
202 MemOperand::MemOperand(Register ra, Register rb, int64_t offset)
203 : ra_(ra), offset_(offset), rb_(rb) {}
619 void Assembler::d_form(Instr instr, Register rt, Register ra,
634 emit(instr | rt.code() * B21 | ra.code() * B16 | (kImm16Mask & val));
637 void Assembler::xo_form(Instr instr, Register rt, Register ra, Register rb,
639 emit(instr | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 | o | r);
642 void Assembler::md_form(Instr instr, Register ra, Register rs, int shift,
649 emit(instr | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 | m0_4 * B6 |
653 void Assembler::mds_form(Instr instr, Register ra, Register rs, Register rb,
658 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | m0_4 * B6 |
730 void Assembler::xoris(Register ra, Register rs, const Operand& imm) {
731 d_form(XORIS, rs, ra, imm.immediate(), false);
734 void Assembler::rlwinm(Register ra, Register rs, int sh, int mb, int me,
739 emit(RLWINMX | rs.code() * B21 | ra.code() * B16 | sh * B11 | mb * B6 |
743 void Assembler::rlwnm(Register ra, Register rs, Register rb, int mb, int me,
747 emit(RLWNMX | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | mb * B6 |
751 void Assembler::rlwimi(Register ra, Register rs, int sh, int mb, int me,
756 emit(RLWIMIX | rs.code() * B21 | ra.code() * B16 | sh * B11 | mb * B6 |
782 void Assembler::rotlw(Register ra, Register rs, Register rb, RCBit r) {
783 rlwnm(ra, rs, rb, 0, 31, r);
786 void Assembler::rotlwi(Register ra, Register rs, int sh, RCBit r) {
787 rlwinm(ra, rs, sh, 0, 31, r);
790 void Assembler::rotrwi(Register ra, Register rs, int sh, RCBit r) {
791 rlwinm(ra, rs, 32 - sh, 0, 31, r);
883 void Assembler::andi(Register ra, Register rs, const Operand& imm) {
884 d_form(ANDIx, rs, ra, imm.immediate(), false);
887 void Assembler::andis(Register ra, Register rs, const Operand& imm) {
888 d_form(ANDISx, rs, ra, imm.immediate(), false);
891 void Assembler::ori(Register ra, Register rs, const Operand& imm) {
892 d_form(ORI, rs, ra, imm.immediate(), false);
951 void Assembler::isel(Register rt, Register ra, Register rb, int cb) {
952 emit(EXT2 | ISEL | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 |
973 d_form(LBZ, dst, src.ra(), src.offset(), true);
978 d_form(LHZ, dst, src.ra(), src.offset(), true);
983 d_form(LWZ, dst, src.ra(), src.offset(), true);
988 d_form(LWZU, dst, src.ra(), src.offset(), true);
993 d_form(LHA, dst, src.ra(), src.offset(), true);
1002 emit(LD | dst.code() * B21 | src.ra().code() * B16 | offset | 2);
1010 d_form(STB, dst, src.ra(), src.offset(), true);
1015 d_form(STH, dst, src.ra(), src.offset(), true);
1020 d_form(STW, dst, src.ra(), src.offset(), true);
1025 d_form(STWU, dst, src.ra(), src.offset(), true);
1028 void Assembler::neg(Register rt, Register ra, OEBit o, RCBit r) {
1029 emit(EXT2 | NEGX | rt.code() * B21 | ra.code() * B16 | o | r);
1039 emit(LD | rd.code() * B21 | src.ra().code() * B16 | offset);
1047 emit(LD | rd.code() * B21 | src.ra().code() * B16 | offset | 1);
1055 emit(STD | rs.code() * B21 | src.ra().code() * B16 | offset);
1063 emit(STD | rs.code() * B21 | src.ra().code() * B16 | offset | 1);
1066 void Assembler::rldic(Register ra, Register rs, int sh, int mb, RCBit r) {
1067 md_form(EXT5 | RLDIC, ra, rs, sh, mb, r);
1070 void Assembler::rldicl(Register ra, Register rs, int sh, int mb, RCBit r) {
1071 md_form(EXT5 | RLDICL, ra, rs, sh, mb, r);
1074 void Assembler::rldcl(Register ra, Register rs, Register rb, int mb, RCBit r) {
1075 mds_form(EXT5 | RLDCL, ra, rs, rb, mb, r);
1078 void Assembler::rldicr(Register ra, Register rs, int sh, int me, RCBit r) {
1079 md_form(EXT5 | RLDICR, ra, rs, sh, me, r);
1104 void Assembler::rldimi(Register ra, Register rs, int sh, int mb, RCBit r) {
1105 md_form(EXT5 | RLDIMI, ra, rs, sh, mb, r);
1108 void Assembler::sradi(Register ra, Register rs, int sh, RCBit r) {
1112 emit(EXT2 | SRADIX | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 |
1116 void Assembler::rotld(Register ra, Register rs, Register rb, RCBit r) {
1117 rldcl(ra, rs, rb, 0, r);
1120 void Assembler::rotldi(Register ra, Register rs, int sh, RCBit r) {
1121 rldicl(ra, rs, sh, 0, r);
1124 void Assembler::rotrdi(Register ra, Register rs, int sh, RCBit r) {
1125 rldicl(ra, rs, 64 - sh, 0, r);
1181 lbz(dst, MemOperand(src.ra(), lo));
1190 lhz(dst, MemOperand(src.ra(), lo));
1199 lha(dst, MemOperand(src.ra(), lo));
1208 lwz(dst, MemOperand(src.ra(), lo));
1217 emit(PPLWA | dst.code() * B21 | src.ra().code() * B16 | (lo & kImm16Mask));
1226 emit(PPLD | dst.code() * B21 | src.ra().code() * B16 | (lo & kImm16Mask));
1235 lfs(dst, MemOperand(src.ra(), lo));
1244 lfd(dst, MemOperand(src.ra(), lo));
1636 void Assembler::dcbf(Register ra, Register rb) {
1637 emit(EXT2 | DCBF | ra.code() * B16 | rb.code() * B11);
1644 void Assembler::icbi(Register ra, Register rb) {
1645 emit(EXT2 | ICBI | ra.code() * B16 | rb.code() * B11);
1654 Register ra = src.ra();
1655 DCHECK(ra != r0);
1659 emit(LFD | frt.code() * B21 | ra.code() * B16 | imm16);
1664 Register ra = src.ra();
1665 DCHECK(ra != r0);
1669 emit(LFDU | frt.code() * B21 | ra.code() * B16 | imm16);
1674 Register ra = src.ra();
1676 DCHECK(ra != r0);
1679 emit(LFS | frt.code() * B21 | ra.code() * B16 | imm16);
1684 Register ra = src.ra();
1686 DCHECK(ra != r0);
1689 emit(LFSU | frt.code() * B21 | ra.code() * B16 | imm16);
1694 Register ra = src.ra();
1696 DCHECK(ra != r0);
1699 emit(STFD | frs.code() * B21 | ra.code() * B16 | imm16);
1704 Register ra = src.ra();
1706 DCHECK(ra != r0);
1709 emit(STFDU | frs.code() * B21 | ra.code() * B16 | imm16);
1714 Register ra = src.ra();
1716 DCHECK(ra != r0);
1719 emit(STFS | frs.code() * B21 | ra.code() * B16 | imm16);
1724 Register ra = src.ra();
1726 DCHECK(ra != r0);
1729 emit(STFSU | frs.code() * B21 | ra.code() * B16 | imm16);
1909 void Assembler::mfvsrd(const Register ra, const Simd128Register rs) {
1911 emit(MFVSRD | rs.code() * B21 | ra.code() * B16 | SX);
1914 void Assembler::mfvsrwz(const Register ra, const Simd128Register rs) {
1916 emit(MFVSRWZ | rs.code() * B21 | ra.code() * B16 | SX);
1919 void Assembler::mtvsrd(const Simd128Register rt, const Register ra) {
1921 emit(MTVSRD | rt.code() * B21 | ra.code() * B16 | TX);
1924 void Assembler::mtvsrdd(const Simd128Register rt, const Register ra,
1927 emit(MTVSRDD | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 | TX);
1933 emit(LXVD | rt.code() * B21 | src.ra().code() * B16 | src.rb().code() * B11 |
1940 emit(LXVX | rt.code() * B21 | src.ra().code() * B16 | src.rb().code() * B11 |
1947 emit(LXSDX | rt.code() * B21 | src.ra().code() * B16 | src.rb().code() * B11 |
1954 emit(LXSIBZX | rt.code() * B21 | src.ra().code() * B16 |
1961 emit(LXSIHZX | rt.code() * B21 | src.ra().code() * B16 |
1968 emit(LXSIWZX | rt.code() * B21 | src.ra().code() * B16 |
1975 emit(STXSDX | rs.code() * B21 | dst.ra().code() * B16 |
1982 emit(STXSIBX | rs.code() * B21 | dst.ra().code() * B16 |
1989 emit(STXSIHX | rs.code() * B21 | dst.ra().code() * B16 |
1996 emit(STXSIWX | rs.code() * B21 | dst.ra().code() * B16 |
2003 emit(STXVD | rt.code() * B21 | dst.ra().code() * B16 | dst.rb().code() * B11 |
2010 emit(STXVX | rt.code() * B21 | dst.ra().code() * B16 | dst.rb().code() * B11 |