Lines Matching refs:EXT2
361 return (((instr & kOpcodeMask) == EXT2) &&
362 ((EXT2 | (instr & kExt2OpcodeMask)) == CMP));
800 xo_form(EXT2 | ADDCX, dst, src1, src2, o, r);
805 xo_form(EXT2 | ADDEX, dst, src1, src2, o, r);
810 emit(EXT2 | ADDZEX | dst.code() * B21 | src1.code() * B16 | o | r);
815 xo_form(EXT2 | SUBFX, dst, src2, src1, o, r);
820 xo_form(EXT2 | SUBFCX, dst, src2, src1, o, r);
825 xo_form(EXT2 | SUBFEX, dst, src2, src1, o, r);
834 xo_form(EXT2 | ADDX, dst, src1, src2, o, r);
840 xo_form(EXT2 | MULLW, dst, src1, src2, o, r);
849 xo_form(EXT2 | MULHWX, dst, src1, src2, LeaveOE, r);
854 xo_form(EXT2 | MULHWUX, dst, src1, src2, LeaveOE, r);
860 xo_form(EXT2 | DIVW, dst, src1, src2, o, r);
866 xo_form(EXT2 | DIVWU, dst, src1, src2, o, r);
952 emit(EXT2 | ISEL | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 |
1029 emit(EXT2 | NEGX | rt.code() * B21 | ra.code() * B16 | o | r);
1112 emit(EXT2 | SRADIX | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 |
1130 xo_form(EXT2 | MULLD, dst, src1, src2, o, r);
1135 xo_form(EXT2 | DIVD, dst, src1, src2, o, r);
1140 xo_form(EXT2 | DIVDU, dst, src1, src2, o, r);
1571 emit(EXT2 | MFSPR | dst.code() * B21 | 256 << 11); // Ignore RC bit
1575 emit(EXT2 | MTSPR | src.code() * B21 | 256 << 11); // Ignore RC bit
1579 emit(EXT2 | MTSPR | src.code() * B21 | 288 << 11); // Ignore RC bit
1583 emit(EXT2 | MTSPR | src.code() * B21 | 32 << 11);
1593 void Assembler::mfcr(Register dst) { emit(EXT2 | MFCR | dst.code() * B21); }
1600 emit(EXT2 | MFVSRD | src.code() * B21 | dst.code() * B16);
1604 emit(EXT2 | MFVSRWZ | src.code() * B21 | dst.code() * B16);
1608 emit(EXT2 | MTVSRD | dst.code() * B21 | src.code() * B16);
1612 emit(EXT2 | MTVSRWZ | dst.code() * B21 | src.code() * B16);
1616 emit(EXT2 | MTVSRWA | dst.code() * B21 | src.code() * B16);
1637 emit(EXT2 | DCBF | ra.code() * B16 | rb.code() * B11);
1640 void Assembler::sync() { emit(EXT2 | SYNC); }
1642 void Assembler::lwsync() { emit(EXT2 | SYNC | 1 * B21); }
1645 emit(EXT2 | ICBI | ra.code() * B16 | rb.code() * B11);