Lines Matching defs:dst
488 Register dst = Register::from_code(instr_at(pos + kInstrSize));
492 patcher.bitwise_mov32(dst, offset);
497 // dst = base + position + immediate
499 Register dst = Register::from_code((operands >> 27) & 0x1F);
508 patcher.bitwise_add32(dst, base, offset);
514 Register dst = Register::from_code(instr_at(pos + kInstrSize));
519 patcher.bitwise_mov(dst, target_pos);
726 void Assembler::xori(Register dst, Register src, const Operand& imm) {
727 d_form(XORI, src, dst, imm.immediate(), false);
760 void Assembler::slwi(Register dst, Register src, const Operand& val, RCBit rc) {
762 rlwinm(dst, src, val.immediate(), 0, 31 - val.immediate(), rc);
765 void Assembler::srwi(Register dst, Register src, const Operand& val, RCBit rc) {
767 rlwinm(dst, src, 32 - val.immediate(), val.immediate(), 31, rc);
770 void Assembler::clrrwi(Register dst, Register src, const Operand& val,
773 rlwinm(dst, src, 0, 0, 31 - val.immediate(), rc);
776 void Assembler::clrlwi(Register dst, Register src, const Operand& val,
779 rlwinm(dst, src, 0, val.immediate(), 31, rc);
794 void Assembler::subi(Register dst, Register src, const Operand& imm) {
795 addi(dst, src, Operand(-(imm.immediate())));
798 void Assembler::addc(Register dst, Register src1, Register src2, OEBit o,
800 xo_form(EXT2 | ADDCX, dst, src1, src2, o, r);
803 void Assembler::adde(Register dst, Register src1, Register src2, OEBit o,
805 xo_form(EXT2 | ADDEX, dst, src1, src2, o, r);
808 void Assembler::addze(Register dst, Register src1, OEBit o, RCBit r) {
810 emit(EXT2 | ADDZEX | dst.code() * B21 | src1.code() * B16 | o | r);
813 void Assembler::sub(Register dst, Register src1, Register src2, OEBit o,
815 xo_form(EXT2 | SUBFX, dst, src2, src1, o, r);
818 void Assembler::subc(Register dst, Register src1, Register src2, OEBit o,
820 xo_form(EXT2 | SUBFCX, dst, src2, src1, o, r);
823 void Assembler::sube(Register dst, Register src1, Register src2, OEBit o,
825 xo_form(EXT2 | SUBFEX, dst, src2, src1, o, r);
828 void Assembler::subfic(Register dst, Register src, const Operand& imm) {
829 d_form(SUBFIC, dst, src, imm.immediate(), true);
832 void Assembler::add(Register dst, Register src1, Register src2, OEBit o,
834 xo_form(EXT2 | ADDX, dst, src1, src2, o, r);
838 void Assembler::mullw(Register dst, Register src1, Register src2, OEBit o,
840 xo_form(EXT2 | MULLW, dst, src1, src2, o, r);
843 void Assembler::mulli(Register dst, Register src, const Operand& imm) {
844 d_form(MULLI, dst, src, imm.immediate(), true);
848 void Assembler::mulhw(Register dst, Register src1, Register src2, RCBit r) {
849 xo_form(EXT2 | MULHWX, dst, src1, src2, LeaveOE, r);
853 void Assembler::mulhwu(Register dst, Register src1, Register src2, RCBit r) {
854 xo_form(EXT2 | MULHWUX, dst, src1, src2, LeaveOE, r);
858 void Assembler::divw(Register dst, Register src1, Register src2, OEBit o,
860 xo_form(EXT2 | DIVW, dst, src1, src2, o, r);
864 void Assembler::divwu(Register dst, Register src1, Register src2, OEBit o,
866 xo_form(EXT2 | DIVWU, dst, src1, src2, o, r);
869 void Assembler::addi(Register dst, Register src, const Operand& imm) {
871 d_form(ADDI, dst, src, imm.immediate(), true);
874 void Assembler::addis(Register dst, Register src, const Operand& imm) {
876 d_form(ADDIS, dst, src, imm.immediate(), true);
879 void Assembler::addic(Register dst, Register src, const Operand& imm) {
880 d_form(ADDIC, dst, src, imm.immediate(), true);
895 void Assembler::oris(Register dst, Register src, const Operand& imm) {
896 d_form(ORIS, src, dst, imm.immediate(), false);
957 void Assembler::li(Register dst, const Operand& imm) {
958 d_form(ADDI, dst, r0, imm.immediate(), true);
961 void Assembler::lis(Register dst, const Operand& imm) {
962 d_form(ADDIS, dst, r0, imm.immediate(), true);
966 void Assembler::mr(Register dst, Register src) {
967 // actually or(dst, src, src)
968 orx(dst, src, src);
971 void Assembler::lbz(Register dst, const MemOperand& src) {
973 d_form(LBZ, dst, src.ra(), src.offset(), true);
976 void Assembler::lhz(Register dst, const MemOperand& src) {
978 d_form(LHZ, dst, src.ra(), src.offset(), true);
981 void Assembler::lwz(Register dst, const MemOperand& src) {
983 d_form(LWZ, dst, src.ra(), src.offset(), true);
986 void Assembler::lwzu(Register dst, const MemOperand& src) {
988 d_form(LWZU, dst, src.ra(), src.offset(), true);
991 void Assembler::lha(Register dst, const MemOperand& src) {
993 d_form(LHA, dst, src.ra(), src.offset(), true);
996 void Assembler::lwa(Register dst, const MemOperand& src) {
1002 emit(LD | dst.code() * B21 | src.ra().code() * B16 | offset | 2);
1004 lwz(dst, src);
1008 void Assembler::stb(Register dst, const MemOperand& src) {
1010 d_form(STB, dst, src.ra(), src.offset(), true);
1013 void Assembler::sth(Register dst, const MemOperand& src) {
1015 d_form(STH, dst, src.ra(), src.offset(), true);
1018 void Assembler::stw(Register dst, const MemOperand& src) {
1020 d_form(STW, dst, src.ra(), src.offset(), true);
1023 void Assembler::stwu(Register dst, const MemOperand& src) {
1025 d_form(STWU, dst, src.ra(), src.offset(), true);
1082 void Assembler::sldi(Register dst, Register src, const Operand& val, RCBit rc) {
1084 rldicr(dst, src, val.immediate(), 63 - val.immediate(), rc);
1087 void Assembler::srdi(Register dst, Register src, const Operand& val, RCBit rc) {
1089 rldicl(dst, src, 64 - val.immediate(), val.immediate(), rc);
1092 void Assembler::clrrdi(Register dst, Register src, const Operand& val,
1095 rldicr(dst, src, 0, 63 - val.immediate(), rc);
1098 void Assembler::clrldi(Register dst, Register src, const Operand& val,
1101 rldicl(dst, src, 0, val.immediate(), rc);
1128 void Assembler::mulld(Register dst, Register src1, Register src2, OEBit o,
1130 xo_form(EXT2 | MULLD, dst, src1, src2, o, r);
1133 void Assembler::divd(Register dst, Register src1, Register src2, OEBit o,
1135 xo_form(EXT2 | DIVD, dst, src1, src2, o, r);
1138 void Assembler::divdu(Register dst, Register src1, Register src2, OEBit o,
1140 xo_form(EXT2 | DIVDU, dst, src1, src2, o, r);
1152 void Assembler::paddi(Register dst, Register src, const Operand& imm) {
1159 addi(dst, src, Operand(lo));
1162 void Assembler::pli(Register dst, const Operand& imm) {
1168 li(dst, Operand(lo));
1171 void Assembler::psubi(Register dst, Register src, const Operand& imm) {
1172 paddi(dst, src, Operand(-(imm.immediate())));
1175 void Assembler::plbz(Register dst, const MemOperand& src) {
1181 lbz(dst, MemOperand(src.ra(), lo));
1184 void Assembler::plhz(Register dst, const MemOperand& src) {
1190 lhz(dst, MemOperand(src.ra(), lo));
1193 void Assembler::plha(Register dst, const MemOperand& src) {
1199 lha(dst, MemOperand(src.ra(), lo));
1202 void Assembler::plwz(Register dst, const MemOperand& src) {
1208 lwz(dst, MemOperand(src.ra(), lo));
1211 void Assembler::plwa(Register dst, const MemOperand& src) {
1217 emit(PPLWA | dst.code() * B21 | src.ra().code() * B16 | (lo & kImm16Mask));
1220 void Assembler::pld(Register dst, const MemOperand& src) {
1226 emit(PPLD | dst.code() * B21 | src.ra().code() * B16 | (lo & kImm16Mask));
1229 void Assembler::plfs(DoubleRegister dst, const MemOperand& src) {
1235 lfs(dst, MemOperand(src.ra(), lo));
1238 void Assembler::plfd(DoubleRegister dst, const MemOperand& src) {
1244 lfd(dst, MemOperand(src.ra(), lo));
1248 int Assembler::instructions_required_for_mov(Register dst,
1252 if (use_constant_pool_for_mov(dst, src, canOptimize)) {
1262 bool Assembler::use_constant_pool_for_mov(Register dst, const Operand& src,
1271 bool allowOverflow = !((canOptimize && is_int32(value)) || dst == r0);
1273 bool allowOverflow = !(canOptimize || dst == r0);
1312 void Assembler::mov(Register dst, const Operand& src) {
1330 use_constant_pool_for_mov(dst, src, canOptimize)) {
1338 addis(dst, kConstantPoolRegister, Operand::Zero());
1339 ld(dst, MemOperand(dst, 0));
1341 ld(dst, MemOperand(kConstantPoolRegister, 0));
1345 addis(dst, kConstantPoolRegister, Operand::Zero());
1346 lwz(dst, MemOperand(dst, 0));
1348 lwz(dst, MemOperand(kConstantPoolRegister, 0));
1356 li(dst, Operand(value));
1358 pli(dst, Operand(value));
1364 lis(dst, Operand(value >> 16));
1368 li(dst, Operand(value >> 32));
1370 lis(dst, Operand(value >> 48));
1373 ori(dst, dst, Operand(u16));
1376 sldi(dst, dst, Operand(32));
1379 oris(dst, dst, Operand(u16));
1385 ori(dst, dst, Operand(u16));
1395 bitwise_mov(dst, value);
1398 void Assembler::bitwise_mov(Register dst, intptr_t value) {
1405 lis(dst, Operand(SIGN_EXT_IMM16(hi_word)));
1406 ori(dst, dst, Operand(lo_word));
1407 sldi(dst, dst, Operand(32));
1410 oris(dst, dst, Operand(hi_word));
1411 ori(dst, dst, Operand(lo_word));
1415 lis(dst, Operand(SIGN_EXT_IMM16(hi_word)));
1416 ori(dst, dst, Operand(lo_word));
1420 void Assembler::bitwise_mov32(Register dst, int32_t value) {
1424 lis(dst, Operand(SIGN_EXT_IMM16(hi_word)));
1425 ori(dst, dst, Operand(lo_word));
1428 void Assembler::bitwise_add32(Register dst, Register src, int32_t value) {
1431 addi(dst, src, Operand(value));
1437 addis(dst, src, Operand(SIGN_EXT_IMM16(hi_word)));
1438 addic(dst, dst, Operand(SIGN_EXT_IMM16(lo_word)));
1442 void Assembler::patch_wasm_cpi_return_address(Register dst, int pc_offset,
1448 patching_assembler.addi(dst, dst, Operand(return_address_offset));
1451 void Assembler::mov_label_offset(Register dst, Label* label) {
1455 mov(dst, Operand(position + Code::kHeaderSize - kHeapObjectTag));
1473 emit(dst.code());
1477 void Assembler::add_label_offset(Register dst, Register base, Label* label,
1481 // dst = base + position + delta
1483 bitwise_add32(dst, base, position);
1497 emit(dst.code() * B27 | base.code() * B22 | (delta & kImm22Mask));
1505 void Assembler::mov_label_addr(Register dst, Label* label) {
1511 bitwise_mov(dst, position);
1528 emit(dst.code());
1570 void Assembler::mflr(Register dst) {
1571 emit(EXT2 | MFSPR | dst.code() * B21 | 256 << 11); // Ignore RC bit
1593 void Assembler::mfcr(Register dst) { emit(EXT2 | MFCR | dst.code() * B21); }
1599 void Assembler::mffprd(Register dst, DoubleRegister src) {
1600 emit(EXT2 | MFVSRD | src.code() * B21 | dst.code() * B16);
1603 void Assembler::mffprwz(Register dst, DoubleRegister src) {
1604 emit(EXT2 | MFVSRWZ | src.code() * B21 | dst.code() * B16);
1607 void Assembler::mtfprd(DoubleRegister dst, Register src) {
1608 emit(EXT2 | MTVSRD | dst.code() * B21 | src.code() * B16);
1611 void Assembler::mtfprwz(DoubleRegister dst, Register src) {
1612 emit(EXT2 | MTVSRWZ | dst.code() * B21 | src.code() * B16);
1615 void Assembler::mtfprwa(DoubleRegister dst, Register src) {
1616 emit(EXT2 | MTVSRWA | dst.code() * B21 | src.code() * B16);
1972 void Assembler::stxsdx(const Simd128Register rs, const MemOperand& dst) {
1973 CHECK(dst.rb().is_valid());
1975 emit(STXSDX | rs.code() * B21 | dst.ra().code() * B16 |
1976 dst.rb().code() * B11 | SX);
1979 void Assembler::stxsibx(const Simd128Register rs, const MemOperand& dst) {
1980 CHECK(dst.rb().is_valid());
1982 emit(STXSIBX | rs.code() * B21 | dst.ra().code() * B16 |
1983 dst.rb().code() * B11 | SX);
1986 void Assembler::stxsihx(const Simd128Register rs, const MemOperand& dst) {
1987 CHECK(dst.rb().is_valid());
1989 emit(STXSIHX | rs.code() * B21 | dst.ra().code() * B16 |
1990 dst.rb().code() * B11 | SX);
1993 void Assembler::stxsiwx(const Simd128Register rs, const MemOperand& dst) {
1994 CHECK(dst.rb().is_valid());
1996 emit(STXSIWX | rs.code() * B21 | dst.ra().code() * B16 |
1997 dst.rb().code() * B11 | SX);
2000 void Assembler::stxvd(const Simd128Register rt, const MemOperand& dst) {
2001 CHECK(dst.rb().is_valid());
2003 emit(STXVD | rt.code() * B21 | dst.ra().code() * B16 | dst.rb().code() * B11 |
2007 void Assembler::stxvx(const Simd128Register rt, const MemOperand& dst) {
2008 CHECK(dst.rb().is_valid());
2010 emit(STXVX | rt.code() * B21 | dst.ra().code() * B16 | dst.rb().code() * B11 |