Lines Matching refs:target
2834 void TurboAssembler::BranchTrueShortF(Label* target, BranchDelaySlot bd) {
2836 bc1nez(target, kDoubleCompareReg);
2838 bc1t(target);
2845 void TurboAssembler::BranchFalseShortF(Label* target, BranchDelaySlot bd) {
2847 bc1eqz(target, kDoubleCompareReg);
2849 bc1f(target);
2856 void TurboAssembler::BranchTrueF(Label* target, BranchDelaySlot bd) {
2858 target->is_bound() ? !is_near(target) : is_trampoline_emitted();
2862 BranchLong(target, bd);
2865 BranchTrueShortF(target, bd);
2869 void TurboAssembler::BranchFalseF(Label* target, BranchDelaySlot bd) {
2871 target->is_bound() ? !is_near(target) : is_trampoline_emitted();
2875 BranchLong(target, bd);
2878 BranchFalseShortF(target, bd);
2882 void TurboAssembler::BranchMSA(Label* target, MSABranchDF df,
2888 if (target) {
2890 target->is_bound() ? !is_near(target) : is_trampoline_emitted();
2895 BranchLong(target, bd);
2898 BranchShortMSA(df, target, cond, wt, bd);
2904 void TurboAssembler::BranchShortMSA(MSABranchDF df, Label* target,
2909 if (target) {
2914 bnz_d(wt, target);
2917 bnz_w(wt, target);
2920 bnz_h(wt, target);
2924 bnz_b(wt, target);
2928 bnz_v(wt, target);
2933 bz_d(wt, target);
2936 bz_w(wt, target);
2939 bz_h(wt, target);
2943 bz_b(wt, target);
2947 bz_v(wt, target);
3512 // target.
3728 // target.
4249 void TurboAssembler::Jump(Register target, Condition cond, Register rs,
4254 jic(target, 0);
4258 jic(target, 0);
4262 jr(target);
4266 jr(target);
4273 void TurboAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
4284 li(t9, Operand(target, rmode));
4290 void TurboAssembler::Jump(Address target, RelocInfo::Mode rmode, Condition cond,
4293 Jump(static_cast<intptr_t>(target), rmode, cond, rs, rt, bd);
4329 void TurboAssembler::Call(Register target, Condition cond, Register rs,
4334 jialc(target, 0);
4338 jialc(target, 0);
4342 jalr(target);
4346 jalr(target);
4368 void TurboAssembler::Call(Address target, RelocInfo::Mode rmode, Condition cond,
4371 li(t9, Operand(static_cast<int64_t>(target), rmode), ADDRESS_LOAD);
4436 void TurboAssembler::PatchAndJump(Address target) {
4448 *reinterpret_cast<uint64_t*>(pc_) = target; // pc_ should be align.
4456 void TurboAssembler::StoreReturnAddressAndCall(Register target) {
4490 mov(t9, target); // Function pointer to t9 to conform to ABI for PIC.
4669 void TurboAssembler::Call(Label* target) { BranchAndLink(target); }
4671 void TurboAssembler::LoadAddress(Register dst, Label* target) {
4672 uint64_t address = jump_address(target);
4990 // Clear the new.target register if not given.
5509 // if the target platform will need alignment, so this is controlled from a
6108 void TurboAssembler::CallForDeoptimization(Builtin target, int, Label* exit,
6114 MemOperand(kRootRegister, IsolateData::BuiltinEntrySlotOffset(target)));