Lines Matching refs:rd
338 void TurboAssembler::Addu(Register rd, Register rs, const Operand& rt) {
340 addu(rd, rs, rt.rm());
343 addiu(rd, rs, static_cast<int32_t>(rt.immediate()));
350 addu(rd, rs, scratch);
355 void TurboAssembler::Daddu(Register rd, Register rs, const Operand& rt) {
357 daddu(rd, rs, rt.rm());
360 daddiu(rd, rs, static_cast<int32_t>(rt.immediate()));
367 daddu(rd, rs, scratch);
372 void TurboAssembler::Subu(Register rd, Register rs, const Operand& rt) {
374 subu(rd, rs, rt.rm());
378 addiu(rd, rs,
388 addu(rd, rs, scratch);
392 subu(rd, rs, scratch);
398 void TurboAssembler::Dsubu(Register rd, Register rs, const Operand& rt) {
400 dsubu(rd, rs, rt.rm());
402 daddiu(rd, rs,
415 Daddu(rd, rs, scratch);
421 dsubu(rd, rs, scratch);
426 void TurboAssembler::Mul(Register rd, Register rs, const Operand& rt) {
428 mul(rd, rs, rt.rm());
435 mul(rd, rs, scratch);
439 void TurboAssembler::Mulh(Register rd, Register rs, const Operand& rt) {
443 mfhi(rd);
445 muh(rd, rs, rt.rm());
455 mfhi(rd);
457 muh(rd, rs, scratch);
462 void TurboAssembler::Mulhu(Register rd, Register rs, const Operand& rt) {
466 mfhi(rd);
468 muhu(rd, rs, rt.rm());
478 mfhi(rd);
480 muhu(rd, rs, scratch);
485 void TurboAssembler::Dmul(Register rd, Register rs, const Operand& rt) {
488 dmul(rd, rs, rt.rm());
491 mflo(rd);
500 dmul(rd, rs, scratch);
503 mflo(rd);
508 void TurboAssembler::Dmulh(Register rd, Register rs, const Operand& rt) {
511 dmuh(rd, rs, rt.rm());
514 mfhi(rd);
523 dmuh(rd, rs, scratch);
526 mfhi(rd);
619 void TurboAssembler::Mod(Register rd, Register rs, const Operand& rt) {
623 mfhi(rd);
625 mod(rd, rs, rt.rm());
635 mfhi(rd);
637 mod(rd, rs, scratch);
642 void TurboAssembler::Modu(Register rd, Register rs, const Operand& rt) {
646 mfhi(rd);
648 modu(rd, rs, rt.rm());
658 mfhi(rd);
660 modu(rd, rs, scratch);
678 void TurboAssembler::Ddiv(Register rd, Register rs, const Operand& rt) {
682 mflo(rd);
690 mflo(rd);
694 ddiv(rd, rs, rt.rm());
701 ddiv(rd, rs, scratch);
778 void TurboAssembler::Dmod(Register rd, Register rs, const Operand& rt) {
782 mfhi(rd);
790 mfhi(rd);
794 dmod(rd, rs, rt.rm());
801 dmod(rd, rs, scratch);
806 void TurboAssembler::Dmodu(Register rd, Register rs, const Operand& rt) {
810 mfhi(rd);
818 mfhi(rd);
822 dmodu(rd, rs, rt.rm());
829 dmodu(rd, rs, scratch);
834 void TurboAssembler::And(Register rd, Register rs, const Operand& rt) {
836 and_(rd, rs, rt.rm());
839 andi(rd, rs, static_cast<int32_t>(rt.immediate()));
846 and_(rd, rs, scratch);
851 void TurboAssembler::Or(Register rd, Register rs, const Operand& rt) {
853 or_(rd, rs, rt.rm());
856 ori(rd, rs, static_cast<int32_t>(rt.immediate()));
863 or_(rd, rs, scratch);
868 void TurboAssembler::Xor(Register rd, Register rs, const Operand& rt) {
870 xor_(rd, rs, rt.rm());
873 xori(rd, rs, static_cast<int32_t>(rt.immediate()));
880 xor_(rd, rs, scratch);
885 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) {
887 nor(rd, rs, rt.rm());
894 nor(rd, rs, scratch);
902 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) {
904 slt(rd, rs, rt.rm());
907 slti(rd, rs, static_cast<int32_t>(rt.immediate()));
915 slt(rd, rs, scratch);
920 void TurboAssembler::Sltu(Register rd, Register rs, const Operand& rt) {
922 sltu(rd, rs, rt.rm());
927 sltiu(rd, rs, static_cast<int32_t>(rt.immediate()));
931 sltiu(rd, rs, static_cast<uint16_t>(rt.immediate()));
939 sltu(rd, rs, scratch);
944 void TurboAssembler::Sle(Register rd, Register rs, const Operand& rt) {
946 slt(rd, rt.rm(), rs);
954 slt(rd, scratch, rs);
956 xori(rd, rd, 1);
959 void TurboAssembler::Sleu(Register rd, Register rs, const Operand& rt) {
961 sltu(rd, rt.rm(), rs);
969 sltu(rd, scratch, rs);
971 xori(rd, rd, 1);
974 void TurboAssembler::Sge(Register rd, Register rs, const Operand& rt) {
975 Slt(rd, rs, rt);
976 xori(rd, rd, 1);
979 void TurboAssembler::Sgeu(Register rd, Register rs, const Operand& rt) {
980 Sltu(rd, rs, rt);
981 xori(rd, rd, 1);
984 void TurboAssembler::Sgt(Register rd, Register rs, const Operand& rt) {
986 slt(rd, rt.rm(), rs);
994 slt(rd, scratch, rs);
998 void TurboAssembler::Sgtu(Register rd, Register rs, const Operand& rt) {
1000 sltu(rd, rt.rm(), rs);
1008 sltu(rd, scratch, rs);
1012 void TurboAssembler::Ror(Register rd, Register rs, const Operand& rt) {
1014 rotrv(rd, rs, rt.rm());
1020 rotr(rd, rs, ror_value);
1024 void TurboAssembler::Dror(Register rd, Register rs, const Operand& rt) {
1026 drotrv(rd, rs, rt.rm());
1031 drotr(rd, rs, dror_value);
1033 drotr32(rd, rs, dror_value - 32);
1042 void TurboAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa,
1046 lsa(rd, rt, rs, sa - 1);
1048 Register tmp = rd == rt ? scratch : rd;
1051 Addu(rd, rt, tmp);
1055 void TurboAssembler::Dlsa(Register rd, Register rt, Register rs, uint8_t sa,
1059 dlsa(rd, rt, rs, sa - 1);
1061 Register tmp = rd == rt ? scratch : rd;
1067 Daddu(rd, rt, tmp);
1125 void TurboAssembler::Ulw(Register rd, const MemOperand& rs) {
1126 DCHECK(rd != at);
1129 Lw(rd, rs);
1136 if (rd != source.rm()) {
1137 lwr(rd, MemOperand(source.rm(), source.offset() + kMipsLwrOffset));
1138 lwl(rd, MemOperand(source.rm(), source.offset() + kMipsLwlOffset));
1144 mov(rd, scratch);
1149 void TurboAssembler::Ulwu(Register rd, const MemOperand& rs) {
1151 Lwu(rd, rs);
1154 Ulw(rd, rs);
1155 Dext(rd, rd, 0, 32);
1159 void TurboAssembler::Usw(Register rd, const MemOperand& rs) {
1160 DCHECK(rd != at);
1162 DCHECK(rd != rs.rm());
1164 Sw(rd, rs);
1171 swr(rd, MemOperand(source.rm(), source.offset() + kMipsSwrOffset));
1172 swl(rd, MemOperand(source.rm(), source.offset() + kMipsSwlOffset));
1176 void TurboAssembler::Ulh(Register rd, const MemOperand& rs) {
1177 DCHECK(rd != at);
1180 Lh(rd, rs);
1190 Lb(rd, MemOperand(source.rm(), source.offset() + 1));
1193 Lb(rd, source);
1199 Lb(rd, MemOperand(source.rm(), source.offset() + 1));
1202 Lb(rd, source);
1205 dsll(rd, rd, 8);
1206 or_(rd, rd, scratch);
1210 void TurboAssembler::Ulhu(Register rd, const MemOperand& rs) {
1211 DCHECK(rd != at);
1214 Lhu(rd, rs);
1224 Lbu(rd, MemOperand(source.rm(), source.offset() + 1));
1227 Lbu(rd, source);
1233 Lbu(rd, MemOperand(source.rm(), source.offset() + 1));
1236 Lbu(rd, source);
1239 dsll(rd, rd, 8);
1240 or_(rd, rd, scratch);
1244 void TurboAssembler::Ush(Register rd, const MemOperand& rs, Register scratch) {
1245 DCHECK(rd != at);
1250 Sh(rd, rs);
1257 if (scratch != rd) {
1258 mov(scratch, rd);
1273 void TurboAssembler::Uld(Register rd, const MemOperand& rs) {
1274 DCHECK(rd != at);
1277 Ld(rd, rs);
1284 if (rd != source.rm()) {
1285 ldr(rd, MemOperand(source.rm(), source.offset() + kMipsLdrOffset));
1286 ldl(rd, MemOperand(source.rm(), source.offset() + kMipsLdlOffset));
1292 mov(rd, scratch);
1300 void MacroAssembler::LoadWordPair(Register rd, const MemOperand& rs,
1302 Lwu(rd, rs);
1305 Daddu(rd, rd, scratch);
1308 void TurboAssembler::Usd(Register rd, const MemOperand& rs) {
1309 DCHECK(rd != at);
1312 Sd(rd, rs);
1319 sdr(rd, MemOperand(source.rm(), source.offset() + kMipsSdrOffset));
1320 sdl(rd, MemOperand(source.rm(), source.offset() + kMipsSdlOffset));
1325 void MacroAssembler::StoreWordPair(Register rd, const MemOperand& rs,
1327 Sw(rd, rs);
1328 dsrl32(scratch, rd, 0);
1378 void TurboAssembler::Lb(Register rd, const MemOperand& rs) {
1381 lb(rd, source);
1384 void TurboAssembler::Lbu(Register rd, const MemOperand& rs) {
1387 lbu(rd, source);
1390 void TurboAssembler::Sb(Register rd, const MemOperand& rs) {
1393 sb(rd, source);
1396 void TurboAssembler::Lh(Register rd, const MemOperand& rs) {
1399 lh(rd, source);
1402 void TurboAssembler::Lhu(Register rd, const MemOperand& rs) {
1405 lhu(rd, source);
1408 void TurboAssembler::Sh(Register rd, const MemOperand& rs) {
1411 sh(rd, source);
1414 void TurboAssembler::Lw(Register rd, const MemOperand& rs) {
1417 lw(rd, source);
1420 void TurboAssembler::Lwu(Register rd, const MemOperand& rs) {
1423 lwu(rd, source);
1426 void TurboAssembler::Sw(Register rd, const MemOperand& rs) {
1429 sw(rd, source);
1432 void TurboAssembler::Ld(Register rd, const MemOperand& rs) {
1435 ld(rd, source);
1438 void TurboAssembler::Sd(Register rd, const MemOperand& rs) {
1441 sd(rd, source);
1468 void TurboAssembler::Ll(Register rd, const MemOperand& rs) {
1472 ll(rd, rs);
1478 ll(rd, MemOperand(scratch, 0));
1482 void TurboAssembler::Lld(Register rd, const MemOperand& rs) {
1486 lld(rd, rs);
1492 lld(rd, MemOperand(scratch, 0));
1496 void TurboAssembler::Sc(Register rd, const MemOperand& rs) {
1500 sc(rd, rs);
1506 sc(rd, MemOperand(scratch, 0));
1510 void TurboAssembler::Scd(Register rd, const MemOperand& rs) {
1514 scd(rd, rs);
1520 scd(rd, MemOperand(scratch, 0));
1560 void TurboAssembler::LiLower32BitHelper(Register rd, Operand j) {
1562 daddiu(rd, zero_reg, (j.immediate() & kImm16Mask));
1564 ori(rd, zero_reg, j.immediate() & kImm16Mask);
1566 lui(rd, j.immediate() >> kLuiShift & kImm16Mask);
1568 ori(rd, rd, j.immediate() & kImm16Mask);
1679 void TurboAssembler::li_optimized(Register rd, Operand j, LiFlags mode) {
1686 LiLower32BitHelper(rd, j);
1694 ori(rd, zero_reg, j.immediate() & kImm16Mask);
1695 dahi(rd, j.immediate() >> 32 & kImm16Mask);
1701 ori(rd, zero_reg, j.immediate() & kImm16Mask);
1702 dati(rd, j.immediate() >> 48 & kImm16Mask);
1708 lui(rd, j.immediate() >> kLuiShift & kImm16Mask);
1709 dahi(rd, ((j.immediate() >> 32) + bit31) & kImm16Mask);
1717 lui(rd, j.immediate() >> kLuiShift & kImm16Mask);
1718 dati(rd, ((j.immediate() >> 48) + bit31) & kImm16Mask);
1724 daddiu(rd, zero_reg, j.immediate() & kImm16Mask);
1725 dahi(rd, ((j.immediate() >> 32) + bit31) & kImm16Mask);
1732 daddiu(rd, zero_reg, j.immediate() & kImm16Mask);
1733 dati(rd, ((j.immediate() >> 48) + bit31) & kImm16Mask);
1739 daddiu(rd, zero_reg, -1);
1741 dsrl(rd, rd, shift_cnt);
1743 dsrl32(rd, rd, shift_cnt & 31);
1752 ori(rd, zero_reg, tmp & kImm16Mask);
1754 dsll(rd, rd, shift_cnt);
1756 dsll32(rd, rd, shift_cnt & 31);
1761 daddiu(rd, zero_reg, static_cast<int32_t>(tmp));
1763 dsll(rd, rd, shift_cnt);
1765 dsll32(rd, rd, shift_cnt & 31);
1771 LiLower32BitHelper(rd, j);
1772 Dins(rd, rd, 32, 32);
1777 lui(rd, tmp >> kLuiShift & kImm16Mask);
1778 ori(rd, rd, tmp & kImm16Mask);
1780 dsll(rd, rd, shift_cnt);
1782 dsll32(rd, rd, shift_cnt & 31);
1790 ori(rd, zero_reg, tmp & kImm16Mask);
1792 dsll(rd, rd, shift_cnt);
1794 dsll32(rd, rd, shift_cnt & 31);
1796 ori(rd, rd, j.immediate() & kImm16Mask);
1800 daddiu(rd, zero_reg, static_cast<int32_t>(tmp));
1802 dsll(rd, rd, shift_cnt);
1804 dsll32(rd, rd, shift_cnt & 31);
1806 ori(rd, rd, j.immediate() & kImm16Mask);
1810 LiLower32BitHelper(rd, j);
1811 Dins(rd, rd, 32, 32);
1817 LiLower32BitHelper(rd, j);
1820 dahi(rd, imm & kImm16Mask);
1824 dati(rd, imm & kImm16Mask);
1829 LiLower32BitHelper(rd, k);
1830 dsll(rd, rd, 16);
1832 ori(rd, rd, j.immediate() & kImm16Mask);
1836 LiLower32BitHelper(rd, k);
1838 dsll(rd, rd, 16);
1839 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask);
1840 dsll(rd, rd, 16);
1842 ori(rd, rd, j.immediate() & kImm16Mask);
1845 dsll32(rd, rd, 0);
1847 ori(rd, rd, j.immediate() & kImm16Mask);
1857 void TurboAssembler::li(Register rd, Operand j, LiFlags mode) {
1868 li_optimized(rd, Operand(-j.immediate()), mode);
1869 Dsubu(rd, zero_reg, rd);
1872 li_optimized(rd, Operand(~j.immediate()), mode);
1873 nor(rd, rd, rd);
1875 li_optimized(rd, j, mode);
1887 lui(rd, (immediate >> 32) & kImm16Mask);
1888 ori(rd, rd, (immediate >> 16) & kImm16Mask);
1889 dsll(rd, rd, 16);
1890 ori(rd, rd, immediate & kImm16Mask);
1894 lui(rd, (j.immediate() >> 32) & kImm16Mask);
1895 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask);
1896 dsll(rd, rd, 16);
1897 ori(rd, rd, j.immediate() & kImm16Mask);
1902 lui(rd, imm >> kLuiShift & kImm16Mask);
1903 ori(rd, rd, (imm & kImm16Mask));
1905 dahi(rd, imm & kImm16Mask & kImm16Mask);
1907 dati(rd, imm & kImm16Mask & kImm16Mask);
1909 lui(rd, (j.immediate() >> 48) & kImm16Mask);
1910 ori(rd, rd, (j.immediate() >> 32) & kImm16Mask);
1911 dsll(rd, rd, 16);
1912 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask);
1913 dsll(rd, rd, 16);
1914 ori(rd, rd, j.immediate() & kImm16Mask);
2304 void TurboAssembler::Trunc_uw_d(Register rd, FPURegister fs,
2307 DCHECK(rd != at);
2327 mfc1(rd, scratch);
2328 Or(rd, rd, 1 << 31);
2335 mfc1(rd, scratch);
2340 void TurboAssembler::Trunc_uw_s(Register rd, FPURegister fs,
2343 DCHECK(rd != at);
2358 // First we subtract 2^31 from fs, then trunc it to rd
2359 // and add 2^31 to rd.
2362 mfc1(rd, scratch);
2363 Or(rd, rd, 1 << 31);
2370 mfc1(rd, scratch);
2375 void TurboAssembler::Trunc_ul_d(Register rd, FPURegister fs,
2378 DCHECK(result.is_valid() ? !AreAliased(rd, result, at) : !AreAliased(rd, at));
2400 // First we subtract 2^63 from fs, then trunc it to rd
2401 // and add 2^63 to rd.
2404 dmfc1(rd, scratch);
2405 Or(rd, rd, Operand(1UL << 63));
2411 dmfc1(rd, scratch);
2430 void TurboAssembler::Trunc_ul_s(Register rd, FPURegister fs,
2433 DCHECK(result.is_valid() ? !AreAliased(rd, result, at) : !AreAliased(rd, at));
2459 // First we subtract 2^63 from fs, then trunc it to rd
2460 // and add 2^63 to rd.
2463 dmfc1(rd, scratch);
2464 Or(rd, rd, Operand(1UL << 63));
2470 dmfc1(rd, scratch);
3010 void TurboAssembler::Movz(Register rd, Register rs, Register rt) {
3014 mov(rd, rs);
3017 movz(rd, rs, rt);
3021 void TurboAssembler::Movn(Register rd, Register rs, Register rt) {
3025 mov(rd, rs);
3028 movn(rd, rs, rt);
3032 void TurboAssembler::LoadZeroOnCondition(Register rd, Register rs,
3037 mov(rd, zero_reg);
3042 LoadZeroIfConditionZero(rd, rt.rm());
3045 mov(rd, zero_reg);
3051 LoadZeroIfConditionZero(rd, rs);
3054 LoadZeroIfConditionZero(rd, t9);
3060 LoadZeroIfConditionNotZero(rd, rt.rm());
3063 mov(rd, zero_reg);
3069 LoadZeroIfConditionNotZero(rd, rs);
3072 LoadZeroIfConditionNotZero(rd, t9);
3079 LoadZeroIfConditionNotZero(rd, t9);
3083 LoadZeroIfConditionNotZero(rd, t9);
3088 LoadZeroIfConditionNotZero(rd, t9);
3093 LoadZeroIfConditionNotZero(rd, t9);
3100 LoadZeroIfConditionNotZero(rd, t9);
3106 LoadZeroIfConditionNotZero(rd, t9);
3111 LoadZeroIfConditionNotZero(rd, t9);
3116 LoadZeroIfConditionNotZero(rd, t9);
3160 void TurboAssembler::Movt(Register rd, Register rs, uint16_t cc) {
3161 movt(rd, rs, cc);
3164 void TurboAssembler::Movf(Register rd, Register rs, uint16_t cc) {
3165 movf(rd, rs, cc);
3168 void TurboAssembler::Clz(Register rd, Register rs) { clz(rd, rs); }
3170 void TurboAssembler::Dclz(Register rd, Register rs) { dclz(rd, rs); }
3172 void TurboAssembler::Ctz(Register rd, Register rs) {
3177 rotr(rd, rs, 16);
3178 wsbh(rd, rd);
3179 bitswap(rd, rd);
3180 Clz(rd, rd);
3187 Xor(rd, scratch, rs);
3188 And(rd, rd, scratch);
3190 Clz(rd, rd);
3194 Subu(rd, scratch, rd);
3198 void TurboAssembler::Dctz(Register rd, Register rs) {
3203 dsbh(rd, rs);
3204 dshd(rd, rd);
3205 dbitswap(rd, rd);
3206 dclz(rd, rd);
3213 Xor(rd, scratch, rs);
3214 And(rd, rd, scratch);
3216 dclz(rd, rd);
3220 Dsubu(rd, scratch, rd);
3224 void TurboAssembler::Popcnt(Register rd, Register rs) {
3263 And(rd, scratch, scratch2);
3266 Addu(scratch, rd, scratch);
3267 srl(rd, scratch, 4);
3268 Addu(rd, rd, scratch);
3270 And(rd, rd, scratch2);
3272 Mul(rd, rd, scratch);
3273 srl(rd, rd, shift);
3276 void TurboAssembler::Dpopcnt(Register rd, Register rs) {
3293 And(rd, scratch, scratch2);
3296 Daddu(scratch, rd, scratch);
3297 dsrl(rd, scratch, 4);
3298 Daddu(rd, rd, scratch);
3300 And(rd, rd, scratch2);
3302 Dmul(rd, rd, scratch);
3303 dsrl32(rd, rd, shift);